From mboxrd@z Thu Jan  1 00:00:00 1970
From: bje@sourceware.cygnus.com
To: src-cvs@sourceware.cygnus.com
Subject: Import 
Date: Thu, 27 Jul 2000 21:11:00 -0000
Message-id: <20000728041153.24899.qmail@sourceware.cygnus.com>
X-SW-Source: 2000-q3/msg00029.html
List-Id: <src-cvs.sourceware.org>

CVSROOT:	/cvs/src
Module name:	src
Changes by:	bje@sourceware.cygnus.com	2000-07-27 21:11:53

Log message:
    CGEN 1.0 import
    
    Status:
    
    Vendor Tag:	cygnus
    Release Tags:	cgen-1-0
    
    N src/cgen/COPYING.CGEN
    N src/cgen/dev.scm
    N src/cgen/AUTHORS
    N src/cgen/ChangeLog
    N src/cgen/INSTALL
    N src/cgen/Makefile.am
    N src/cgen/Makefile.in
    N src/cgen/NEWS
    N src/cgen/README
    N src/cgen/aclocal.m4
    N src/cgen/arm.cpu
    N src/cgen/arm.sim
    N src/cgen/arm7.cpu
    N src/cgen/attr.scm
    N src/cgen/cgen-gas.scm
    N src/cgen/cgen-opc.scm
    N src/cgen/cgen-sim.scm
    N src/cgen/cgen-stest.scm
    N src/cgen/configure
    N src/cgen/configure.in
    N src/cgen/cos.scm
    N src/cgen/decode.scm
    N src/cgen/desc-cpu.scm
    N src/cgen/desc.scm
    N src/cgen/enum.scm
    N src/cgen/fixup.scm
    N src/cgen/fr30.cpu
    N src/cgen/fr30.opc
    N src/cgen/gas-test.scm
    N src/cgen/hardware.scm
    N src/cgen/i960.cpu
    N src/cgen/i960.opc
    N src/cgen/ia32.cpu
    N src/cgen/ia64.cpu
    N src/cgen/ifield.scm
    N src/cgen/iformat.scm
    N src/cgen/insn.scm
    N src/cgen/m32r.cpu
    N src/cgen/m32r.opc
    N src/cgen/m68k.cpu
    N src/cgen/mach.scm
    N src/cgen/minsn.scm
    N src/cgen/mode.scm
    N src/cgen/model.scm
    N src/cgen/opc-asmdis.scm
    N src/cgen/opc-ibld.scm
    N src/cgen/opc-itab.scm
    N src/cgen/opc-opinst.scm
    N src/cgen/opcodes.scm
    N src/cgen/operand.scm
    N src/cgen/pgmr-tools.scm
    N src/cgen/play.cpu
    N src/cgen/pmacros.scm
    N src/cgen/read.scm
    N src/cgen/profile.scm
    N src/cgen/rtl-c.scm
    N src/cgen/rtl.scm
    N src/cgen/rtx-funcs.scm
    N src/cgen/sem-frags.scm
    N src/cgen/semantics.scm
    N src/cgen/sim-arch.scm
    N src/cgen/sim-cpu.scm
    N src/cgen/sim-decode.scm
    N src/cgen/sim-model.scm
    N src/cgen/sim-test.scm
    N src/cgen/sim.scm
    N src/cgen/simplify.inc
    N src/cgen/sparc.cpu
    N src/cgen/sparc.opc
    N src/cgen/sparc32.cpu
    N src/cgen/sparc64.cpu
    N src/cgen/sparccom.cpu
    N src/cgen/sparcfpu.cpu
    N src/cgen/stamp-h.in
    N src/cgen/thumb.cpu
    N src/cgen/types.scm
    N src/cgen/utils-cgen.scm
    N src/cgen/utils-gen.scm
    N src/cgen/utils-sim.scm
    N src/cgen/utils.scm
    N src/cgen/doc/Makefile.am
    N src/cgen/doc/Makefile.in
    N src/cgen/doc/app.texi
    N src/cgen/doc/cgen.texi
    N src/cgen/doc/credits.texi
    N src/cgen/doc/glossary.texi
    N src/cgen/doc/internals.texi
    N src/cgen/doc/intro.texi
    N src/cgen/doc/notes.texi
    N src/cgen/doc/opcodes.texi
    N src/cgen/doc/pmacros.texi
    N src/cgen/doc/porting.texi
    N src/cgen/doc/rtl.texi
    N src/cgen/doc/running.texi
    N src/cgen/doc/sim.texi
    N src/cgen/doc/stamp-vti
    N src/cgen/doc/version.texi
    N src/cgen/slib/genwrite.scm
    N src/cgen/slib/sort.scm
    N src/cgen/slib/pp.scm
    
    No conflicts created by this import
>>From bje@sourceware.cygnus.com Thu Jul 27 21:20:00 2000
From: bje@sourceware.cygnus.com
To: src-cvs@sourceware.cygnus.com
Subject: CVSROOT commitinfo loginfo
Date: Thu, 27 Jul 2000 21:20:00 -0000
Message-id: <20000728042031.28400.qmail@sourceware.cygnus.com>
X-SW-Source: 2000-q3/msg00030.html
Content-length: 400

CVSROOT:	/cvs/src
Module name:	CVSROOT
Changes by:	bje@sourceware.cygnus.com	2000-07-27 21:20:30

Modified files:
	.              : commitinfo loginfo 

Log message:
	Send cgen checkins to cgen-cvs@.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/CVSROOT/commitinfo.diff?cvsroot=src&r1=1.8&r2=1.9
http://sources.redhat.com/cgi-bin/cvsweb.cgi/CVSROOT/loginfo.diff?cvsroot=src&r1=1.13&r2=1.14