From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13960 invoked by alias); 10 Jun 2016 13:43:00 -0000 Mailing-List: contact systemtap-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: systemtap-owner@sourceware.org Received: (qmail 13944 invoked by uid 89); 10 Jun 2016 13:42:59 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=Pratyush, pratyush, H*i:sk:575A54D, H*f:sk:575A54D X-HELO: mail-qt0-f169.google.com Received: from mail-qt0-f169.google.com (HELO mail-qt0-f169.google.com) (209.85.216.169) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 10 Jun 2016 13:42:58 +0000 Received: by mail-qt0-f169.google.com with SMTP id 37so18573294qtc.3 for ; Fri, 10 Jun 2016 06:42:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=y0TYPps8hbuuqZQ+u+wz54svwbEvBzqrv6OGBtIy9pA=; b=bcwQVLZUh0H00lq9vZwfLaT+pYt7TO5rnUYPrh1uM03R2ulEOoFiq3VmRI56C3xkcx 4an4itSl0Ys4W7MW6MSqpub3q/h0Fbi2pF0plaVg120o4gVM24sL5iHvhyNfr10lSOjl 3U+BWILUt78cEoSHzcxIChC9FLBLNfFWtdWoCb+DUpiKS2Bs3sqGgIwH3hQHVFe7Mxm8 eEVk/5twB4GnvT0TdQI1Te9bF/g7P1rRCr0lrN5St5+qhCm0v8OvTr1R9i30UZopvgwH BPbo1lWA3rpM9fjHeVhdZCRebnfyUcMKcbqQALMuDOJkc6BabvhaegpOBF6iDA3YyLNb /YGg== X-Gm-Message-State: ALyK8tJ8M6Tw/uuhFDysz3HvGJEh/pyO3GkOIUXOMLjsSoO7jvhBIDVBUGbx7gd+DS7ii82D X-Received: by 10.200.42.22 with SMTP id k22mr1975566qtk.24.1465566176378; Fri, 10 Jun 2016 06:42:56 -0700 (PDT) Received: from localhost ([122.177.137.240]) by smtp.gmail.com with ESMTPSA id 90sm3118897qgh.28.2016.06.10.06.42.54 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 10 Jun 2016 06:42:55 -0700 (PDT) Date: Fri, 10 Jun 2016 13:43:00 -0000 From: Pratyush Anand To: David Long Cc: William Cohen , systemtap@sourceware.org, Mark Brown Subject: Re: exercising current aarch64 kprobe support with systemtap Message-ID: <20160610134251.GA15590@dhcppc6> References: <599229e0-49ad-1c8e-1055-81e38692e5ec@redhat.com> <575A54D6.2070801@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <575A54D6.2070801@linaro.org> User-Agent: Mutt/1.6.1 (2016-04-27) X-IsSubscribed: yes X-SW-Source: 2016-q2/txt/msg00207.txt.bz2 On 10/06/2016:01:49:10 AM, David Long wrote: > Attached are incremental diffs I hope will fix the latest systemtap > failures, without abandoning atomic sequence checking. I'm trying to avoid > the hex constants but I don't think the insn.c functions help in this case. It will save us from current problem by checking "stp x29,x30,[sp,...]" instruction and returning false if matches. However, we will have to find some way to recognize .word instructions. * An assembly function may not start with "stp x29,x30,[sp,...]", e.g. __dma_map_area(), _cpu_resume etc. However, it could be least likely that a .word instruction exists before start of assembly function and that too contains a word value which could be misleading. * But major issue is, what if someone instruments a kprobe at an address which contains .word values. Instruction will never hit, so probe function will not be called, but when real code reads that .word value, it reads a wrong value. Can GCC provide some compiler option where .word values are located into a specific area? ~Pratyush > > -dl > > diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c > index 28b9c5b..36b4ea5 100644 > --- a/arch/arm64/kernel/kprobes-arm64.c > +++ b/arch/arm64/kernel/kprobes-arm64.c > @@ -127,7 +127,9 @@ is_probed_address_atomic(kprobe_opcode_t *scan_start, kprobe_opcode_t *scan_end) > * atomic region starts from exclusive load and ends with > * exclusive store. > */ > - if (aarch64_insn_is_store_ex(le32_to_cpu(*scan_start))) > + if ((le32_to_cpu(*scan_start) & 0xffc07fff) == 0xa9807bfd) > + return false; > + else if (aarch64_insn_is_store_ex(le32_to_cpu(*scan_start))) > return false; > else if (aarch64_insn_is_load_ex(le32_to_cpu(*scan_start))) > return true;