From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4331 invoked by alias); 30 Oct 2006 22:07:03 -0000 Received: (qmail 4226 invoked by uid 22791); 30 Oct 2006 22:07:02 -0000 X-Spam-Status: No, hits=-2.5 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from mga03.intel.com (HELO mga03.intel.com) (143.182.124.21) by sourceware.org (qpsmtpd/0.31) with ESMTP; Mon, 30 Oct 2006 22:06:57 +0000 Received: from azsmga001.ch.intel.com ([10.2.17.19]) by mga03.intel.com with ESMTP; 30 Oct 2006 14:06:54 -0800 Received: from scsmsx332.sc.intel.com (HELO scsmsx332.amr.corp.intel.com) ([10.3.90.6]) by azsmga001.ch.intel.com with ESMTP; 30 Oct 2006 14:06:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: i="4.09,372,1157353200"; d="scan'208"; a="138396896:sNHT378685293" Received: from scsmsx413.amr.corp.intel.com ([10.3.90.32]) by scsmsx332.amr.corp.intel.com with Microsoft SMTPSVC(6.0.3790.211); Mon, 30 Oct 2006 14:06:05 -0800 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Subject: RE: Improvement for post-handler only case in kprobes Date: Mon, 30 Oct 2006 23:36:00 -0000 Message-ID: X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: Improvement for post-handler only case in kprobes Thread-Index: Acb7YsnKRQbqxfjzSrSnQCvaxh8bGQBCnmgw From: "Stone, Joshua I" To: "Jun Koi" Cc: X-OriginalArrivalTime: 30 Oct 2006 22:06:05.0460 (UTC) FILETIME=[985F7540:01C6FC6F] X-IsSubscribed: yes Mailing-List: contact systemtap-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Post: List-Help: , Sender: systemtap-owner@sourceware.org X-SW-Source: 2006-q4/txt/msg00287.txt.bz2 On Sunday, October 29, 2006 6:02 AM, Jun Koi wrote: > [...] > In case we only has post-handler (NOT pre-handler), we can eliminate > the single-mode step in the following way: > - Still put BreakPoint at the registered address. > - After the single-step, remove the old BreakPoint and put it at the > current EIP (this is the place we switch out with single-step). Next > time, we only need to handle the breakpoint, as it is hit right after > the "original" breakpoint. Hence we dont need to get into the > single-step mode any more. Of course this improves the performance. So you're basically suggesting to turn a post-handler on a instruction into a pre-handler on the following instruction? This is equivalent only if you can guarantee that the two instructions will always execute together. Thus the first instruction cannot be a control instruction (branch, jump, etc.), and the second cannot be the target of any control instruction. You would have to do full basic-block analysis to guarantee this condition. In any case, I don't think you'll save anything, because whatever instruction is replaced with a breakpoint still needs to be executed. This happens out-of-line and single-stepped. Josh