From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 27651 invoked by alias); 29 Jul 2005 08:44:05 -0000 Mailing-List: contact systemtap-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Post: List-Help: , Sender: systemtap-owner@sources.redhat.com Received: (qmail 27629 invoked by uid 22791); 29 Jul 2005 08:44:01 -0000 In-Reply-To: Subject: Re: Hitachi djprobe mechanism Sensitivity: To: Andi Kleen Cc: ak@suse.de, Mathieu Desnoyers , Masami Hiramatsu , Karim Yaghmour , Masami Hiramatsu , michel.dagenais@polymtl.ca, Roland McGrath , Satoshi Oshima , sugita@sdl.hitachi.co.jp, systemtap@sources.redhat.com X-Mailer: Lotus Notes Release 6.5.1IBM February 19, 2004 Message-ID: From: Richard J Moore Date: Fri, 29 Jul 2005 08:44:00 -0000 X-MIMETrack: Serialize by Router on D06ML065/06/M/IBM(Release 6.53HF247 | January 6, 2005) at 29/07/2005 09:43:56 MIME-Version: 1.0 Content-type: text/plain; charset=US-ASCII X-SW-Source: 2005-q3/txt/msg00160.txt.bz2 that's a very good point. cmpxchg is not always considered for atomic storing, though one does have to handle the complication of crossing page boundaries. - - Richard J Moore IBM Advanced Linux Response Team - Linux Technology Centre MOBEX: 264807; Mobile (+44) (0)7739-875237 Office: (+44) (0)1962-817072 Andi Kleen Sent by: To ak@suse.de Mathieu Desnoyers cc 29/07/2005 Karim Yaghmour , 08:54 Masami Hiramatsu , Masami Hiramatsu , Roland McGrath , Richard J Moore/UK/IBM@IBMGB, systemtap@sources.redhat.com, sugita@sdl.hitachi.co.jp, Satoshi Oshima , michel.dagenais@polymtl.ca bcc Subject Re: Hitachi djprobe mechanism Mathieu Desnoyers writes: > > And as the jmp instruction is 5 bytes, there seems to be no hope to find an > atomic operation that will write that. Any 64bit architecture can write 8 bytes mostly atomically (at least towards readers) and many 32bit architectures (like newer x86 with cmpxchg or sse) can too. An 8 byte read-modify-store is not protected against multiple writers, but that is no problem for probes which can protect against that with a different lock. x86 could actually do it atomically even for writers with cmpxchg8. -Andi