* [RFC 01/13] mips: Minimal build support
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
@ 2014-07-31 20:21 ` Crestez Dan Leonard
2014-07-31 20:21 ` [RFC 03/13] mips: Read _stp_deref and _stp_store_deref support Crestez Dan Leonard
` (13 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:21 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 349 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
runtime/linux/copy.c | 2 +-
runtime/linux/loc2c-runtime.h | 36 ++++++++++++++++++++++++++++++++++++
runtime/loc2c-runtime.h | 9 +++++++++
runtime/regs.h | 4 ++++
tapsets.cxx | 1 +
5 files changed, 51 insertions(+), 1 deletion(-)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0001-mips-Minimal-build-support.patch --]
[-- Type: text/x-patch; name="0001-mips-Minimal-build-support.patch", Size: 4360 bytes --]
diff --git a/runtime/linux/copy.c b/runtime/linux/copy.c
index 4e802b6..c870990 100644
--- a/runtime/linux/copy.c
+++ b/runtime/linux/copy.c
@@ -84,7 +84,7 @@ do { \
: "i"(-EFAULT), "0"(count), "1"(count), "3"(src), "4"(dst) \
: "memory"); \
} while (0)
-#elif defined (__powerpc__) || defined (__arm__)
+#elif defined (__powerpc__) || defined (__arm__) || defined(__mips__)
#define __stp_strncpy_from_user(dst,src,count,res) \
do { res = __strncpy_from_user(dst, src, count); } while(0)
diff --git a/runtime/linux/loc2c-runtime.h b/runtime/linux/loc2c-runtime.h
index a3bec58..dd1b002 100644
--- a/runtime/linux/loc2c-runtime.h
+++ b/runtime/linux/loc2c-runtime.h
@@ -575,6 +575,42 @@ extern void __store_deref_bad(void);
STORE_DEREF_FAULT(addr); \
})
+#elif defined __mips__
+
+#define _stp_deref(size, addr, seg) \
+ ({ \
+ int _bad = 0; \
+ intptr_t _v = 0; \
+ mm_segment_t _oldfs = get_fs(); \
+ set_fs(seg); \
+ pagefault_disable(); \
+ if (lookup_bad_addr((unsigned long)addr, size)) \
+ _bad = 1; \
+ else \
+ _bad = 1; \
+ pagefault_enable(); \
+ set_fs(_oldfs); \
+ if (_bad) \
+ DEREF_FAULT(addr); \
+ _v; \
+ })
+
+#define _stp_store_deref(size, addr, value, seg) \
+ ({ \
+ int _bad = 0; \
+ mm_segment_t _oldfs = get_fs(); \
+ set_fs(seg); \
+ pagefault_disable(); \
+ if (lookup_bad_addr((unsigned long)addr, size)) \
+ _bad = 1; \
+ else \
+ _bad = 1; \
+ pagefault_enable(); \
+ set_fs(_oldfs); \
+ if (_bad) \
+ STORE_DEREF_FAULT(addr); \
+ })
+
#elif defined (__aarch64__)
#define _stp_deref(size, addr, seg) \
diff --git a/runtime/loc2c-runtime.h b/runtime/loc2c-runtime.h
index bd13341..fe5a5c7 100644
--- a/runtime/loc2c-runtime.h
+++ b/runtime/loc2c-runtime.h
@@ -154,6 +154,15 @@
#define pt_regs_store_register(pt_regs,regno,value) \
(pt_regs->gpr[regno] = (value))
+#elif defined __mips__
+
+#undef pt_regs_fetch_register
+#undef pt_regs_store_register
+#define pt_regs_fetch_register(pt_regs,regno) \
+ ((intptr_t) pt_regs->regs[regno])
+#define pt_regs_store_register(pt_regs,regno,value) \
+ (pt_regs->regs[regno] = (value))
+
#elif defined (__aarch64__)
#undef pt_regs_fetch_register
diff --git a/runtime/regs.h b/runtime/regs.h
index 2f027ad..94680af 100644
--- a/runtime/regs.h
+++ b/runtime/regs.h
@@ -54,6 +54,10 @@
#define REG_SP(regs) regs->ARM_sp
#define REG_LINK(regs) regs->ARM_lr
+#elif defined (__mips__)
+#define REG_IP(regs_arg) ((regs_arg)->cp0_epc)
+#define REG_SP(regs_arg) ((regs_arg)->regs[29])
+
#elif defined (__s390__) || defined (__s390x__)
#ifndef __s390x__
diff --git a/tapsets.cxx b/tapsets.cxx
index 6604c27..3724a96 100644
--- a/tapsets.cxx
+++ b/tapsets.cxx
@@ -2294,6 +2294,7 @@ validate_module_elf (Dwfl_Module *mod, const char *name, base_query *q)
case EM_IA_64: expect_machine = "ia64"; break;
case EM_ARM: expect_machine = "arm*"; break;
case EM_AARCH64: expect_machine = "arm64"; break;
+ case EM_MIPS: expect_machine = "mips"; break;
// XXX: fill in some more of these
default: expect_machine = "?"; break;
}
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 03/13] mips: Read _stp_deref and _stp_store_deref support
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
2014-07-31 20:21 ` [RFC 01/13] mips: Minimal build support Crestez Dan Leonard
@ 2014-07-31 20:21 ` Crestez Dan Leonard
2014-07-31 20:21 ` [RFC 02/13] mips: Define TIF_32BIT if missing Crestez Dan Leonard
` (12 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:21 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 260 bytes --]
Based on an earlier patch by Victor Kamensky <kamensky@cisco.com>
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
runtime/linux/loc2c-runtime.h | 51 +++++++++++++++++++++++++++++++++++++++++--
1 file changed, 49 insertions(+), 2 deletions(-)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0003-mips-Read-_stp_deref-and-_stp_store_deref-support.patch --]
[-- Type: text/x-patch; name="0003-mips-Read-_stp_deref-and-_stp_store_deref-support.patch", Size: 5166 bytes --]
diff --git a/runtime/linux/loc2c-runtime.h b/runtime/linux/loc2c-runtime.h
index dd1b002..254eef3 100644
--- a/runtime/linux/loc2c-runtime.h
+++ b/runtime/linux/loc2c-runtime.h
@@ -577,6 +577,39 @@ extern void __store_deref_bad(void);
#elif defined __mips__
+#define __stp_get_user_asm(val, insn, addr, err) \
+{ \
+ __asm__ __volatile__( \
+ "1: " insn " %1, %3 \n" \
+ "2: \n" \
+ " .section .fixup,\"ax\" \n" \
+ "3: li %0, %4 \n" \
+ " j 2b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " "__UA_ADDR "\t1b, 3b \n" \
+ " .previous \n" \
+ : "=r" (err), "=r" (val) \
+ : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \
+}
+
+#define __stp_put_user_asm(val, insn, addr, err) \
+{ \
+ __asm__ __volatile__( \
+ "1: " insn " %z2, %3 # __put_user_asm\n" \
+ "2: \n" \
+ " .section .fixup,\"ax\" \n" \
+ "3: li %0, %4 \n" \
+ " j 2b \n" \
+ " .previous \n" \
+ " .section __ex_table,\"a\" \n" \
+ " " __UA_ADDR " 1b, 3b \n" \
+ " .previous \n" \
+ : "=r" (err) \
+ : "0" (0), "Jr" (val), "o" (__m(addr)), \
+ "i" (-EFAULT)); \
+}
+
#define _stp_deref(size, addr, seg) \
({ \
int _bad = 0; \
@@ -587,7 +620,14 @@ extern void __store_deref_bad(void);
if (lookup_bad_addr((unsigned long)addr, size)) \
_bad = 1; \
else \
- _bad = 1; \
+ switch (size) \
+ { \
+ case 1: __stp_get_user_asm(_v, "lb", addr, _bad); break; \
+ case 2: __stp_get_user_asm(_v, "lh", addr, _bad); break; \
+ case 4: __stp_get_user_asm(_v, "ld", addr, _bad); break; \
+ case 8: __stp_get_user_asm(_v, "lw", addr, _bad); break; \
+ default: __get_user_unknown(); break; \
+ } \
pagefault_enable(); \
set_fs(_oldfs); \
if (_bad) \
@@ -604,7 +644,14 @@ extern void __store_deref_bad(void);
if (lookup_bad_addr((unsigned long)addr, size)) \
_bad = 1; \
else \
- _bad = 1; \
+ switch (size) \
+ { \
+ case 1: __stp_put_user_asm(value, "sb", addr, _bad); break; \
+ case 2: __stp_put_user_asm(value, "sh", addr, _bad); break; \
+ case 4: __stp_put_user_asm(value, "sw", addr, _bad); break; \
+ case 8: __stp_put_user_asm(value, "sd", addr, _bad); break; \
+ default: __put_user_unknown(); break; \
+ } \
pagefault_enable(); \
set_fs(_oldfs); \
if (_bad) \
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 02/13] mips: Define TIF_32BIT if missing
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
2014-07-31 20:21 ` [RFC 01/13] mips: Minimal build support Crestez Dan Leonard
2014-07-31 20:21 ` [RFC 03/13] mips: Read _stp_deref and _stp_store_deref support Crestez Dan Leonard
@ 2014-07-31 20:21 ` Crestez Dan Leonard
2014-07-31 20:22 ` [RFC 07/13] loc2c: Add Dwarf pointer to location_context Crestez Dan Leonard
` (11 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:21 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 130 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
runtime/compatdefs.h | 8 ++++++++
1 file changed, 8 insertions(+)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0002-mips-Define-TIF_32BIT-if-missing.patch --]
[-- Type: text/x-patch; name="0002-mips-Define-TIF_32BIT-if-missing.patch", Size: 538 bytes --]
diff --git a/runtime/compatdefs.h b/runtime/compatdefs.h
index e256dcc..ba429b5 100644
--- a/runtime/compatdefs.h
+++ b/runtime/compatdefs.h
@@ -20,6 +20,14 @@
#if defined(__s390__) || defined(__s390x__)
#define TIF_32BIT TIF_31BIT
#endif
+#if defined (__mips__) && !defined(TIF_32BIT)
+ #ifdef CONFIG_MIPS32_O32
+ #define TIF_32BIT TIF_32BIT_REGS
+ #elif defined(CONFIG_MIPS32_N32)
+ #define TIF_32BIT TIF_32BIT_ADDR
+ #endif
+#endif
+
#if !defined(TIF_32BIT)
#error architecture not supported, no TIF_32BIT flag
#endif
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 07/13] loc2c: Add Dwarf pointer to location_context
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (2 preceding siblings ...)
2014-07-31 20:21 ` [RFC 02/13] mips: Define TIF_32BIT if missing Crestez Dan Leonard
@ 2014-07-31 20:22 ` Crestez Dan Leonard
2014-07-31 20:22 ` [RFC 05/13] mips: Special get_cycles for cavium octeon Crestez Dan Leonard
` (10 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:22 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 260 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
dwflpp.cxx | 10 +++++-----
loc2c-test.c | 27 +++++++++++++++++----------
loc2c.c | 20 +++++++++++++-------
loc2c.h | 9 ++++++---
4 files changed, 41 insertions(+), 25 deletions(-)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0007-loc2c-Add-Dwarf-pointer-to-location_context.patch --]
[-- Type: text/x-patch; name="0007-loc2c-Add-Dwarf-pointer-to-location_context.patch", Size: 9498 bytes --]
diff --git a/dwflpp.cxx b/dwflpp.cxx
index dea81b9..10f4abb 100644
--- a/dwflpp.cxx
+++ b/dwflpp.cxx
@@ -3095,7 +3095,7 @@ dwflpp::translate_location(struct obstack *pool,
if (dwarf_whatattr (attr) == DW_AT_const_value)
{
*tail = c_translate_constant (pool, &loc2c_error, this,
- &loc2c_emit_address, 0, pc, attr);
+ &loc2c_emit_address, 0, pc, attr, module_dwarf);
return *tail;
}
@@ -3173,7 +3173,7 @@ dwflpp::translate_location(struct obstack *pool,
return c_translate_location (pool, &loc2c_error, this,
&loc2c_emit_address,
1, 0 /* PR9768 */,
- pc, attr, expr, len, tail, fb_attr, cfa_ops);
+ pc, attr, expr, len, tail, fb_attr, cfa_ops, module_dwarf);
}
@@ -3767,7 +3767,7 @@ dwflpp::literal_stmt_for_local (vector<Dwarf_Die>& scopes,
head = c_translate_location (&pool, &loc2c_error, this,
&loc2c_emit_address,
1, 0, pc,
- NULL, &addr_loc, 1, &tail, NULL, NULL);
+ NULL, &addr_loc, 1, &tail, NULL, NULL, module_dwarf);
}
else
{
@@ -3869,7 +3869,7 @@ dwflpp::literal_stmt_for_return (Dwarf_Die *scope_die,
&loc2c_emit_address,
1, 0 /* PR9768 */,
pc, NULL, locops, nlocops,
- &tail, NULL, NULL);
+ &tail, NULL, NULL, module_dwarf);
/* Translate the ->bar->baz[NN] parts. */
@@ -3929,7 +3929,7 @@ dwflpp::literal_stmt_for_pointer (Dwarf_Die *start_typedie,
obstack_init (&pool);
struct location *head = c_translate_argument (&pool, &loc2c_error, this,
&loc2c_emit_address,
- 1, "STAP_ARG_pointer");
+ 1, "STAP_ARG_pointer", module_dwarf);
struct location *tail = head;
/* Translate the ->bar->baz[NN] parts. */
diff --git a/loc2c-test.c b/loc2c-test.c
index 282047e..370a40f 100644
--- a/loc2c-test.c
+++ b/loc2c-test.c
@@ -89,7 +89,8 @@ static void
handle_fields (struct obstack *pool,
struct location *head, struct location *tail,
Dwarf_Addr cubias, Dwarf_Die *vardie, Dwarf_Addr pc,
- char **fields)
+ char **fields,
+ Dwarf *dwarf)
{
Dwarf_Attribute attr_mem;
@@ -192,7 +193,7 @@ handle_fields (struct obstack *pool,
c_translate_location (pool, NULL, NULL, NULL,
1, cubias, pc, &attr_mem,
locexpr, locexpr_len,
- &tail, NULL, NULL);
+ &tail, NULL, NULL, dwarf);
}
++fields;
break;
@@ -294,7 +295,8 @@ handle_fields (struct obstack *pool,
static void
handle_variable (Dwarf_Die *lscopes, int lnscopes, int out,
Dwarf_Addr cubias, Dwarf_Die *vardie, Dwarf_Addr pc,
- Dwarf_Op *cfa_ops, char **fields)
+ Dwarf_Op *cfa_ops, char **fields,
+ Dwarf *dwarf)
{
struct obstack pool;
obstack_init (&pool);
@@ -345,7 +347,7 @@ handle_variable (Dwarf_Die *lscopes, int lnscopes, int out,
if (dwarf_attr_integrate (vardie, DW_AT_const_value, &attr_mem) != NULL)
/* There is no location expression, but a constant value instead. */
head = tail = c_translate_constant (&pool, &fail, NULL, NULL,
- 1, cubias, &attr_mem);
+ 1, cubias, &attr_mem, dwarf);
else
{
if (dwarf_attr_integrate (vardie, DW_AT_location, &attr_mem) == NULL)
@@ -359,10 +361,10 @@ handle_variable (Dwarf_Die *lscopes, int lnscopes, int out,
head = c_translate_location (&pool, &fail, NULL, NULL,
1, cubias, pc, &attr_mem,
locexpr, locexpr_len,
- &tail, fb_attr, cfa_ops);
+ &tail, fb_attr, cfa_ops, dwarf);
}
- handle_fields (&pool, head, tail, cubias, vardie, pc, fields);
+ handle_fields (&pool, head, tail, cubias, vardie, pc, fields, dwarf);
}
static void
@@ -656,8 +658,11 @@ In the fifth form, the access is a store rather than a fetch."
if (dwarf_tag (&scopes[i]) == DW_TAG_subprogram)
{
const Dwarf_Op *locexpr;
+ Dwfl_Module *mod = dwfl_addrmodule (dwfl, pc);
+ Dwarf_Addr bias;
+ Dwarf *dwarf = dwfl_module_getdwarf (mod, &bias);
int locexpr_len = dwfl_module_return_value_location
- (dwfl_addrmodule (dwfl, pc), &scopes[i], &locexpr);
+ (mod, &scopes[i], &locexpr);
if (locexpr_len < 0)
error (EXIT_FAILURE, 0,
"dwfl_module_return_value_location: %s",
@@ -668,9 +673,9 @@ In the fifth form, the access is a store rather than a fetch."
head = c_translate_location (&pool, &fail, NULL, NULL,
1, cubias, pc, NULL,
locexpr, locexpr_len,
- &tail, NULL, NULL);
+ &tail, NULL, NULL, dwarf);
handle_fields (&pool, head, tail, cubias, &scopes[i], pc,
- &argv[argi]);
+ &argv[argi], dwarf);
free (scopes);
dwfl_end (dwfl);
return 0;
@@ -709,6 +714,7 @@ In the fifth form, the access is a store rather than a fetch."
size_t cfa_nops;
Dwarf_Addr bias;
Dwfl_Module *module = dwfl_addrmodule (dwfl, pc);
+ Dwarf *dwarf = NULL;
if (module != NULL)
{
// Try debug_frame first, then fall back on eh_frame.
@@ -729,10 +735,11 @@ In the fifth form, the access is a store rather than a fetch."
dwarf_frame_cfa (frame, &cfa_ops, &cfa_nops);
}
}
+ dwarf = dwfl_module_getdwarf (module, &bias);
}
handle_variable (scopes, n, out, cubias, &vardie, pc, cfa_ops,
- &argv[argi]);
+ &argv[argi], dwarf);
}
}
diff --git a/loc2c.c b/loc2c.c
index aef999c..64f34e6 100644
--- a/loc2c.c
+++ b/loc2c.c
@@ -56,6 +56,7 @@ struct location_context
Dwarf_Addr pc;
Dwarf_Attribute *fb_attr;
const Dwarf_Op *cfa_ops;
+ Dwarf *dwarf;
};
struct location
@@ -140,7 +141,8 @@ new_context (struct obstack *pool,
struct obstack *, Dwarf_Addr),
Dwarf_Addr dwbias, Dwarf_Addr pc_address,
Dwarf_Attribute *attr, Dwarf_Attribute *fb_attr,
- const Dwarf_Op *cfa_ops)
+ const Dwarf_Op *cfa_ops,
+ Dwarf *dwarf)
{
struct location_context *ctx = obstack_alloc (pool, sizeof *ctx);
ctx->pool = pool;
@@ -152,6 +154,7 @@ new_context (struct obstack *pool,
ctx->pc = pc_address;
ctx->fb_attr = fb_attr;
ctx->cfa_ops = cfa_ops;
+ ctx->dwarf = dwarf;
return ctx;
}
\f
@@ -257,10 +260,11 @@ c_translate_constant (struct obstack *pool,
void (*emit_address) (void *fail_arg,
struct obstack *,
Dwarf_Addr),
- int indent, Dwarf_Addr dwbias, Dwarf_Attribute *attr)
+ int indent, Dwarf_Addr dwbias, Dwarf_Attribute *attr,
+ Dwarf *dwarf)
{
return translate_constant (new_context (pool, fail, fail_arg, emit_address,
- dwbias, 0, attr, NULL, NULL),
+ dwbias, 0, attr, NULL, NULL, dwarf),
indent, attr);
}
@@ -1428,14 +1432,15 @@ c_translate_location (struct obstack *pool,
Dwarf_Attribute *attr,
const Dwarf_Op *expr, size_t len,
struct location **input, Dwarf_Attribute *fb_attr,
- const Dwarf_Op *cfa_ops)
+ const Dwarf_Op *cfa_ops,
+ Dwarf *dwarf)
{
indent += 2;
struct location_context *ctx;
if (*input == NULL)
ctx = new_context (pool, fail, fail_arg, emit_address, dwbias, pc_address,
- attr, fb_attr, cfa_ops);
+ attr, fb_attr, cfa_ops, dwarf);
else
{
ctx = (*input)->context;
@@ -1486,7 +1491,8 @@ c_translate_argument (struct obstack *pool,
void *fail_arg,
void (*emit_address) (void *fail_arg,
struct obstack *, Dwarf_Addr),
- int indent, const char *value)
+ int indent, const char *value,
+ Dwarf *dwarf)
{
indent += 2;
@@ -1496,7 +1502,7 @@ c_translate_argument (struct obstack *pool,
struct location *loc = obstack_alloc (pool, sizeof *loc);
loc->context = new_context (pool, fail, fail_arg, emit_address, 0,
- 0, NULL, NULL, NULL);
+ 0, NULL, NULL, NULL, dwarf);
loc->next = NULL;
loc->ops = NULL;
loc->nops = 0;
diff --git a/loc2c.h b/loc2c.h
index 25d2839..92121ae 100644
--- a/loc2c.h
+++ b/loc2c.h
@@ -39,7 +39,8 @@ struct location *c_translate_location (struct obstack *,
size_t locexprlen,
struct location **input,
Dwarf_Attribute *fb_attr,
- const Dwarf_Op *cfa_ops);
+ const Dwarf_Op *cfa_ops,
+ Dwarf *dwarf);
/* Translate a fragment for a compile-time constant from DW_AT_const_value.
*/
@@ -53,7 +54,8 @@ struct location *c_translate_constant (struct obstack *,
struct obstack *,
Dwarf_Addr),
int indent, Dwarf_Addr dwbias,
- Dwarf_Attribute *attr);
+ Dwarf_Attribute *attr,
+ Dwarf *dwarf);
/* Translate a fragment to dereference the given DW_TAG_pointer_type DIE,
where *INPUT is the location of the pointer with that type. */
@@ -122,7 +124,8 @@ struct location *c_translate_argument (struct obstack *,
void (*emit_address) (void *fail_arg,
struct obstack *,
Dwarf_Addr),
- int indent, const char *value);
+ int indent, const char *value,
+ Dwarf *dwarf);
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 05/13] mips: Special get_cycles for cavium octeon
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (3 preceding siblings ...)
2014-07-31 20:22 ` [RFC 07/13] loc2c: Add Dwarf pointer to location_context Crestez Dan Leonard
@ 2014-07-31 20:22 ` Crestez Dan Leonard
2014-07-31 20:22 ` [RFC 10/13] Create debug_frame_hdr in target byte order Crestez Dan Leonard
` (9 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:22 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 210 bytes --]
Originally part of a bigger patch by Victor Kamensky <kamensky@cisco.com>
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
runtime/time.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0005-mips-Special-get_cycles-for-cavium-octeon.patch --]
[-- Type: text/x-patch; name="0005-mips-Special-get_cycles-for-cavium-octeon.patch", Size: 741 bytes --]
diff --git a/runtime/time.c b/runtime/time.c
index b4c2012..284f542 100644
--- a/runtime/time.c
+++ b/runtime/time.c
@@ -40,6 +40,22 @@ static int __stp_cpufreq_notifier_registered = 0;
STP_TIME_SYNC_INTERVAL_NOCPUFREQ)
#endif
+#ifdef CONFIG_CPU_CAVIUM_OCTEON
+/* Octeon supports a 64 bit cycle counter we might as well use it */
+static inline cycles_t octeon_get_cycles(void)
+{
+ cycles_t result;
+ asm volatile ("rdhwr %0,$31\n"
+#ifndef CONFIG_64BIT
+ "sll %0,0\n"
+#endif
+ : "=r" (result));
+ return result;
+}
+#define get_cycles octeon_get_cycles
+#endif /* CONFIG_CPU_CAVIUM_OCTEON */
+
+
#ifndef NSEC_PER_MSEC
#define NSEC_PER_MSEC 1000000L
#endif
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 10/13] Create debug_frame_hdr in target byte order
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (4 preceding siblings ...)
2014-07-31 20:22 ` [RFC 05/13] mips: Special get_cycles for cavium octeon Crestez Dan Leonard
@ 2014-07-31 20:22 ` Crestez Dan Leonard
2014-07-31 20:22 ` [RFC 08/13] mips: Fix fetching params of type long on mips kernel Crestez Dan Leonard
` (8 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:22 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 165 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
translate.cxx | 32 ++++++++++++++++++++++++--------
1 file changed, 24 insertions(+), 8 deletions(-)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0010-Create-debug_frame_hdr-in-target-byte-order.patch --]
[-- Type: text/x-patch; name="0010-Create-debug_frame_hdr-in-target-byte-order.patch", Size: 2479 bytes --]
diff --git a/translate.cxx b/translate.cxx
index ac6377b..158f76f 100644
--- a/translate.cxx
+++ b/translate.cxx
@@ -21,6 +21,7 @@
#include "runtime/k_syms.h"
#include "dwflpp.h"
#include "stapregex.h"
+#include <byteswap.h>
#include <cstdlib>
#include <iostream>
@@ -5537,6 +5538,17 @@ struct unwindsym_dump_context
set<string> undone_unwindsym_modules;
};
+static bool need_byte_swap_for_target (const unsigned char e_ident[])
+{
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+ return (e_ident[EI_DATA] == ELFDATA2MSB);
+#elif __BYTE_ORDER == __BIG_ENDIAN
+ return (e_ident[EI_DATA] == ELFDATA2LSB);
+#else
+ #error Bad host __BYTE_ORDER
+#endif
+}
+
static void create_debug_frame_hdr (const unsigned char e_ident[],
Elf_Data *debug_frame,
void **debug_frame_hdr,
@@ -5556,6 +5568,10 @@ static void create_debug_frame_hdr (const unsigned char e_ident[],
// So there is no need to read the CIEs. And the size is either 4
// or 8, depending on the elf class from e_ident.
int size = (e_ident[EI_CLASS] == ELFCLASS32) ? 4 : 8;
+ bool need_byte_swap = need_byte_swap_for_target (e_ident);
+#define host_to_target_64(x) (need_byte_swap ? bswap_64((x)) : (x))
+#define host_to_target_32(x) (need_byte_swap ? bswap_32((x)) : (x))
+
int res = 0;
Dwarf_Off off = 0;
Dwarf_CFI_Entry entry;
@@ -5620,23 +5636,23 @@ static void create_debug_frame_hdr (const unsigned char e_ident[],
if (size == 4)
{
uint32_t *table = (uint32_t *)(hdr + 4);
- *table++ = (uint32_t) 0; // eh_frame_ptr, unused
- *table++ = (uint32_t) fdes.size();
+ *table++ = host_to_target_32 ((uint32_t) 0); // eh_frame_ptr, unused
+ *table++ = host_to_target_32 ((uint32_t) fdes.size());
for (it = fdes.begin(); it != fdes.end(); it++)
{
- *table++ = (*it).first;
- *table++ = (*it).second;
+ *table++ = host_to_target_32 ((*it).first);
+ *table++ = host_to_target_32 ((*it).second);
}
}
else
{
uint64_t *table = (uint64_t *)(hdr + 4);
- *table++ = (uint64_t) 0; // eh_frame_ptr, unused
- *table++ = (uint64_t) fdes.size();
+ *table++ = host_to_target_64 ((uint64_t) 0); // eh_frame_ptr, unused
+ *table++ = host_to_target_64 ((uint64_t) fdes.size());
for (it = fdes.begin(); it != fdes.end(); it++)
{
- *table++ = (*it).first;
- *table++ = (*it).second;
+ *table++ = host_to_target_64 ((*it).first);
+ *table++ = host_to_target_64 ((*it).second);
}
}
}
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 08/13] mips: Fix fetching params of type long on mips kernel
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (5 preceding siblings ...)
2014-07-31 20:22 ` [RFC 10/13] Create debug_frame_hdr in target byte order Crestez Dan Leonard
@ 2014-07-31 20:22 ` Crestez Dan Leonard
2014-07-31 20:22 ` [RFC 11/13] mips64: Initial unwind support Crestez Dan Leonard
` (7 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:22 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 127 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
loc2c.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0008-mips-Fix-fetching-params-of-type-long-on-mips-kernel.patch --]
[-- Type: text/x-patch; name="0008-mips-Fix-fetching-params-of-type-long-on-mips-kernel.patch", Size: 921 bytes --]
diff --git a/loc2c.c b/loc2c.c
index 64f34e6..a9bdb1f 100644
--- a/loc2c.c
+++ b/loc2c.c
@@ -1917,6 +1917,15 @@ translate_base_fetch (struct obstack *pool, int indent,
*input = loc;
}
+static bool
+is_elf_mips64(Elf *elf)
+{
+ GElf_Ehdr ehdr_mem;
+ GElf_Ehdr* ehdr = gelf_getehdr (elf, &ehdr_mem);
+ return ehdr->e_machine == EM_MIPS &&
+ ehdr->e_ident[EI_CLASS] == ELFCLASS64;
+}
+
/* Determine the maximum size of a base type, from some DIE in the CU. */
static Dwarf_Word
max_fetch_size (struct location *loc, Dwarf_Die *die)
@@ -1929,6 +1938,13 @@ max_fetch_size (struct location *loc, Dwarf_Die *die)
FAIL (loc, N_("cannot determine CU address size from %s: %s"),
dwarf_diename (die), dwarf_errmsg (-1));
+ if (address_size == 4)
+ {
+ if (is_elf_mips64(dwarf_getelf (loc->context->dwarf)))
+ {
+ address_size = 8;
+ }
+ }
return address_size;
}
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 11/13] mips64: Initial unwind support
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (6 preceding siblings ...)
2014-07-31 20:22 ` [RFC 08/13] mips: Fix fetching params of type long on mips kernel Crestez Dan Leonard
@ 2014-07-31 20:22 ` Crestez Dan Leonard
2014-07-31 20:22 ` [RFC 09/13] mips: dwflpp hack for struct fields being DW_OP_constu instead of DW_OP_plus_uconst Crestez Dan Leonard
` (6 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:22 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 302 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
runtime/linux/runtime.h | 2 +-
runtime/unwind/mips64.h | 80 +++++++++++++++++++++++++++++++++++++++++++++++++
runtime/unwind/unwind.h | 2 ++
3 files changed, 83 insertions(+), 1 deletion(-)
create mode 100644 runtime/unwind/mips64.h
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0011-mips64-Initial-unwind-support.patch --]
[-- Type: text/x-patch; name="0011-mips64-Initial-unwind-support.patch", Size: 3336 bytes --]
diff --git a/runtime/linux/runtime.h b/runtime/linux/runtime.h
index 66710fc..bd45a80 100644
--- a/runtime/linux/runtime.h
+++ b/runtime/linux/runtime.h
@@ -157,7 +157,7 @@ static struct
Only define STP_USE_DWARF_UNWINDER when STP_NEED_UNWIND_DATA,
as set through a pragma:unwind in one of the [u]context-unwind.stp
functions. */
-#if (defined(__arm__) || defined(__i386__) || defined(__x86_64__) || defined(__powerpc64__)) || defined (__s390x__)
+#if (defined(__arm__) || defined(__i386__) || defined(__x86_64__) || defined(__powerpc64__)) || defined (__s390x__) || defined(__mips64)
#ifdef STP_NEED_UNWIND_DATA
#ifndef STP_USE_DWARF_UNWINDER
#define STP_USE_DWARF_UNWINDER
diff --git a/runtime/unwind/mips64.h b/runtime/unwind/mips64.h
new file mode 100644
index 0000000..562d12b
--- /dev/null
+++ b/runtime/unwind/mips64.h
@@ -0,0 +1,80 @@
+/* -*- linux-c -*-
+ *
+ * mips64 dwarf unwinder header file
+ *
+ * This file is part of systemtap, and is free software. You can
+ * redistribute it and/or modify it under the terms of the GNU General
+ * Public License (GPL); either version 2, or (at your option) any
+ * later version.
+ */
+#ifndef _STP_MIPS64_UNWIND_H
+#define _STP_MIPS64_UNWIND_H
+
+#include <linux/sched.h>
+#include <asm/ptrace.h>
+
+#define _stp_get_unaligned(ptr) (*(ptr))
+
+#define UNW_PC(frame) (frame)->regs.cp0_epc
+#define UNW_SP(frame) (frame)->regs.regs[29]
+
+#define STACK_LIMIT(ptr) (((ptr) - 1) & ~(THREAD_SIZE - 1))
+
+#define UNW_REGISTER_INFO \
+ PTREGS_INFO(regs[0]), \
+ PTREGS_INFO(regs[1]), \
+ PTREGS_INFO(regs[2]), \
+ PTREGS_INFO(regs[3]), \
+ PTREGS_INFO(regs[4]), \
+ PTREGS_INFO(regs[5]), \
+ PTREGS_INFO(regs[6]), \
+ PTREGS_INFO(regs[7]), \
+ PTREGS_INFO(regs[8]), \
+ PTREGS_INFO(regs[9]), \
+ PTREGS_INFO(regs[10]), \
+ PTREGS_INFO(regs[11]), \
+ PTREGS_INFO(regs[12]), \
+ PTREGS_INFO(regs[13]), \
+ PTREGS_INFO(regs[14]), \
+ PTREGS_INFO(regs[15]), \
+ PTREGS_INFO(regs[16]), \
+ PTREGS_INFO(regs[17]), \
+ PTREGS_INFO(regs[18]), \
+ PTREGS_INFO(regs[19]), \
+ PTREGS_INFO(regs[20]), \
+ PTREGS_INFO(regs[21]), \
+ PTREGS_INFO(regs[22]), \
+ PTREGS_INFO(regs[23]), \
+ PTREGS_INFO(regs[24]), \
+ PTREGS_INFO(regs[25]), \
+ PTREGS_INFO(regs[26]), \
+ PTREGS_INFO(regs[27]), \
+ PTREGS_INFO(regs[28]), \
+ PTREGS_INFO(regs[29]), \
+ PTREGS_INFO(regs[30]), \
+ PTREGS_INFO(regs[31]), \
+ PTREGS_INFO(cp0_status), \
+ PTREGS_INFO(hi), \
+ PTREGS_INFO(lo), \
+ PTREGS_INFO(cp0_epc)
+
+#define UNW_PC_IDX 35
+#define UNW_SP_IDX 29
+
+#define UNW_NR_REAL_REGS 36
+
+static inline void arch_unw_init_frame_info(struct unwind_frame_info *info,
+ /*const*/ struct pt_regs *regs,
+ int sanitize)
+{
+ if (&info->regs == regs) { /* happens when unwinding kernel->user */
+ info->call_frame = 1;
+ return;
+ }
+
+ memset(info, 0, sizeof(*info));
+ /* XXX handle sanitize??? */
+ info->regs = *regs;
+}
+
+#endif /* _STP_MIPS64_UNWIND_H */
diff --git a/runtime/unwind/unwind.h b/runtime/unwind/unwind.h
index ea3f266..e8f6d7d 100644
--- a/runtime/unwind/unwind.h
+++ b/runtime/unwind/unwind.h
@@ -30,6 +30,8 @@ struct unwind_frame_info
#include "s390x.h"
#elif defined (__arm__)
#include "arm.h"
+#elif defined (__mips64)
+#include "mips64.h"
#else
#error "Unsupported dwarf unwind architecture"
#endif
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 09/13] mips: dwflpp hack for struct fields being DW_OP_constu instead of DW_OP_plus_uconst
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (7 preceding siblings ...)
2014-07-31 20:22 ` [RFC 11/13] mips64: Initial unwind support Crestez Dan Leonard
@ 2014-07-31 20:22 ` Crestez Dan Leonard
2014-07-31 20:22 ` [RFC 04/13] mips: runtime and tapset code from cisco Crestez Dan Leonard
` (5 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:22 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 132 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
dwflpp.cxx | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0009-mips-dwflpp-hack-for-struct-fields-being-DW_OP_const.patch --]
[-- Type: text/x-patch; name="0009-mips-dwflpp-hack-for-struct-fields-being-DW_OP_const.patch", Size: 1046 bytes --]
diff --git a/dwflpp.cxx b/dwflpp.cxx
index 10f4abb..16e968a 100644
--- a/dwflpp.cxx
+++ b/dwflpp.cxx
@@ -3170,6 +3170,24 @@ dwflpp::translate_location(struct obstack *pool,
else
cfa_ops = NULL;
+ Dwarf_Op expr_hack[1];
+ if (len == 1 && expr[0].atom == DW_OP_constu && tail)
+ {
+ Dwarf_Addr bias;
+ Elf* elf = (dwarf_getelf (module_dwarf)
+ ?: dwfl_module_getelf (this->module, &bias));
+ GElf_Ehdr ehdr_mem;
+ GElf_Ehdr* ehdr = gelf_getehdr (elf, &ehdr_mem);
+ if (ehdr->e_machine == EM_MIPS)
+ {
+ /* Force sign extension */
+ if (sess.verbose > 2)
+ clog << "translate_location hack to interpret single DW_OP_constu as DW_OP_plus_uconst on mips" << endl;
+ expr_hack[0] = expr[0];
+ expr_hack[0].atom = DW_OP_plus_uconst;
+ expr = expr_hack;
+ }
+ }
return c_translate_location (pool, &loc2c_error, this,
&loc2c_emit_address,
1, 0 /* PR9768 */,
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 04/13] mips: runtime and tapset code from cisco
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (8 preceding siblings ...)
2014-07-31 20:22 ` [RFC 09/13] mips: dwflpp hack for struct fields being DW_OP_constu instead of DW_OP_plus_uconst Crestez Dan Leonard
@ 2014-07-31 20:22 ` Crestez Dan Leonard
2014-07-31 20:22 ` [RFC 06/13] Force sign-extend statement addresses on mips64 -msym32 Crestez Dan Leonard
` (4 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:22 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 758 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
runtime/linux/arith.c | 25 +++-
runtime/regs.c | 117 ++++++++++++++++++
runtime/stack-mips.c | 7 ++
runtime/stack.c | 2 +
runtime/syscall.h | 49 ++++++++
tapset/errno.stp | 2 +
tapset/linux/aux_syscalls.stp | 5 +-
tapset/linux/scheduler.stp | 2 +-
tapset/linux/syscalls2.stp | 8 ++
tapset/mips/aux_syscalls.stp | 44 +++++++
tapset/mips/registers.stp | 276 ++++++++++++++++++++++++++++++++++++++++++
11 files changed, 533 insertions(+), 4 deletions(-)
create mode 100644 runtime/stack-mips.c
create mode 100644 tapset/mips/aux_syscalls.stp
create mode 100644 tapset/mips/registers.stp
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0004-mips-runtime-and-tapset-code-from-cisco.patch --]
[-- Type: text/x-patch; name="0004-mips-runtime-and-tapset-code-from-cisco.patch", Size: 21345 bytes --]
diff --git a/runtime/linux/arith.c b/runtime/linux/arith.c
index b64984a..9f65711 100644
--- a/runtime/linux/arith.c
+++ b/runtime/linux/arith.c
@@ -21,7 +21,8 @@
/* Other 32-bit cpus will need to modify this file. */
#if defined (__i386__) || defined(__arm__) || \
- (defined(__powerpc__) && !defined(__powerpc64__))
+ (defined(__powerpc__) && !defined(__powerpc64__)) || \
+ (defined(__mips__) && !defined(__mips64))
static long long _div64 (long long u, long long v);
static long long _mod64 (long long u, long long v);
#endif
@@ -116,7 +117,8 @@ static int _stp_random_pm (unsigned n)
#if defined (__i386__) || defined (__arm__) || \
- (defined(__powerpc__) && !defined(__powerpc64__))
+ (defined(__powerpc__) && !defined(__powerpc64__)) || \
+ (defined(__mips__) && !defined(__mips64))
/* 64-bit division functions extracted from libgcc */
typedef long long DWtype;
@@ -248,6 +250,25 @@ typedef union
: "r" ((USItype) (a)), \
"r" ((USItype) (b)) __CLOBBER_CC );}
+#elif defined (__mips__)
+
+#define umul_ppmm(w1, w0, u, v) \
+ __asm__ ("multu %2,%3" \
+ : "=l" ((USItype) (w0)), \
+ "=h" ((USItype) (w1)) \
+ : "d" ((USItype) (u)), \
+ "d" ((USItype) (v)))
+
+#if !defined (sub_ddmmss)
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+ do { \
+ UWtype __x; \
+ __x = (al) - (bl); \
+ (sh) = (ah) - (bh) - (__x > (al)); \
+ (sl) = __x; \
+ } while (0)
+#endif
+
#endif
#define __udiv_qrnnd_c(q, r, n1, n0, d) \
diff --git a/runtime/regs.c b/runtime/regs.c
index ade3ad9..8a3f365 100644
--- a/runtime/regs.c
+++ b/runtime/regs.c
@@ -3,6 +3,7 @@
* Copyright (C) 2005, 2007 Red Hat Inc.
* Copyright (C) 2005 Intel Corporation.
* Copyright (C) 2007 Quentin Barnes.
+ * Copyright (C) 2009 Sony Corporation.
*
* This file is part of systemtap, and is free software. You can
* redistribute it and/or modify it under the terms of the GNU General
@@ -23,6 +24,122 @@
#include "dyninst/regs.c"
+#elif defined (__mips__)
+/*
+ * Only o32 application has 32bit registers. N32 and N64 both
+ * should use 64bit registers regardless of pointer size
+ */
+static int _stp_probing_app_with_32bit_regs(struct pt_regs *regs)
+{
+ if (!regs)
+ return 0;
+ return (user_mode(regs) &&
+ test_tsk_thread_flag(current, TIF_32BIT_REGS));
+}
+
+void _stp_print_regs(struct pt_regs * regs)
+{
+#ifdef MIPS_PRINT_REGS_SHOW_SYMBOLS
+ /* it is too much stack to do symbol translation by default */
+ char symbol_name[KSYM_SYMBOL_LEN];
+#endif /* MIPS_PRINT_REGS_SHOW_SYMBOLS */
+ const int field = 2 * sizeof(unsigned long);
+ unsigned int cause = regs->cp0_cause;
+ int i;
+
+ _stp_printf("Cpu %d\n", smp_processor_id());
+
+ /*
+ * Saved main processor registers
+ */
+ for (i = 0; i < 32;) {
+ if ((i % 4) == 0)
+ _stp_printf("$%2d :", i);
+ if (i == 0)
+ _stp_printf(" %0*lx", field, 0UL);
+ else if (i == 26 || i == 27)
+ _stp_printf(" %*s", field, "");
+ else
+ _stp_printf(" %0*lx", field, regs->regs[i]);
+
+ i++;
+ if ((i % 4) == 0)
+ _stp_printf("\n");
+ }
+
+ _stp_printf("Hi : %0*lx\n", field, regs->hi);
+ _stp_printf("Lo : %0*lx\n", field, regs->lo);
+
+ /*
+ * Saved cp0 registers
+ */
+ _stp_printf("epc : %0*lx ", field, regs->cp0_epc);
+#ifdef MIPS_PRINT_REGS_SHOW_SYMBOLSx
+ sprint_symbol(symbol_name, regs->cp0_epc);
+ _stp_printf("%s ", symbol_name);
+#endif /* MIPS_PRINT_REGS_SHOW_SYMBOLS */
+
+ _stp_printf("ra : %0*lx ", field, regs->regs[31]);
+#ifdef MIPS_PRINT_REGS_SHOW_SYMBOLS
+ sprint_symbol(symbol_name, regs->regs[31]);
+ _stp_printf("%s", symbol_name);
+#endif /* MIPS_PRINT_REGS_SHOW_SYMBOLS */
+ _stp_printf("\n");
+
+ _stp_printf("Status: %08x ", (uint32_t) regs->cp0_status);
+
+ if (current_cpu_data.isa_level == MIPS_CPU_ISA_I) {
+ if (regs->cp0_status & ST0_KUO)
+ _stp_printf("KUo ");
+ if (regs->cp0_status & ST0_IEO)
+ _stp_printf("IEo ");
+ if (regs->cp0_status & ST0_KUP)
+ _stp_printf("KUp ");
+ if (regs->cp0_status & ST0_IEP)
+ _stp_printf("IEp ");
+ if (regs->cp0_status & ST0_KUC)
+ _stp_printf("KUc ");
+ if (regs->cp0_status & ST0_IEC)
+ _stp_printf("IEc ");
+ } else {
+ if (regs->cp0_status & ST0_KX)
+ _stp_printf("KX ");
+ if (regs->cp0_status & ST0_SX)
+ _stp_printf("SX ");
+ if (regs->cp0_status & ST0_UX)
+ _stp_printf("UX ");
+ switch (regs->cp0_status & ST0_KSU) {
+ case KSU_USER:
+ _stp_printf("USER ");
+ break;
+ case KSU_SUPERVISOR:
+ _stp_printf("SUPERVISOR ");
+ break;
+ case KSU_KERNEL:
+ _stp_printf("KERNEL ");
+ break;
+ default:
+ _stp_printf("BAD_MODE ");
+ break;
+ }
+ if (regs->cp0_status & ST0_ERL)
+ _stp_printf("ERL ");
+ if (regs->cp0_status & ST0_EXL)
+ _stp_printf("EXL ");
+ if (regs->cp0_status & ST0_IE)
+ _stp_printf("IE ");
+ }
+
+ _stp_printf("\n");
+
+ _stp_printf("Cause : %08x\n", cause);
+
+ cause = (((cause) & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE);
+ if (1 <= cause && cause <= 5)
+ _stp_printf("BadVA : %0*lx\n", field, regs->cp0_badvaddr);
+
+ _stp_printf("PrId : %08x\n", read_c0_prid());
+}
#endif
diff --git a/runtime/stack-mips.c b/runtime/stack-mips.c
new file mode 100644
index 0000000..e1eb995
--- /dev/null
+++ b/runtime/stack-mips.c
@@ -0,0 +1,7 @@
+static void __stp_stack_print (struct pt_regs *regs, int verbose, int levels,
+ struct task_struct *tsk,
+ struct unwind_context *context,
+ struct uretprobe_instance *ri, int uregs_valid)
+{
+ /* TODO: fix, it is just stub for now */
+}
diff --git a/runtime/stack.c b/runtime/stack.c
index 769f7bc..ba47f37 100644
--- a/runtime/stack.c
+++ b/runtime/stack.c
@@ -78,6 +78,8 @@ static int _stp_valid_pc_addr(unsigned long addr, struct task_struct *tsk)
#include "stack-ia64.c"
#elif defined (__arm__)
#include "stack-arm.c"
+#elif defined (__mips__)
+#include "stack-mips.c"
#elif defined (__s390__)
#include "stack-s390.c"
#else
diff --git a/runtime/syscall.h b/runtime/syscall.h
index 32af78c..447adb1 100644
--- a/runtime/syscall.h
+++ b/runtime/syscall.h
@@ -77,6 +77,55 @@
#define MREMAP_SYSCALL_NO(tsk) 1156
#endif
+#if defined(__mips__)
+/* n64 values: scall64-64.S */
+#define MMAP_SYSCALL_NO_MIPS_N64 5009
+#define MMAP2_SYSCALL_NO_MIPS_N64 ((unsigned long)-1) /* does not exits */
+#define MPROTECT_SYSCALL_NO_MIPS_N64 5010
+#define MUNMAP_SYSCALL_NO_MIPS_N64 5011
+#define MREMAP_SYSCALL_NO_MIPS_N64 5024
+
+/* n32 values: scall64-n32.S */
+#define MMAP_SYSCALL_NO_MIPS_N32 6009
+#define MMAP2_SYSCALL_NO_MIPS_N32 ((unsigned long)-1) /* does not exits */
+#define MPROTECT_SYSCALL_NO_MIPS_N32 6010
+#define MUNMAP_SYSCALL_NO_MIPS_N32 6011
+#define MREMAP_SYSCALL_NO_MIPS_N32 6024
+
+/* o32 values: scall32-o32.S */
+#define MMAP_SYSCALL_NO_MIPS_O32 4090
+#define MMAP2_SYSCALL_NO_MIPS_O32 4210
+#define MPROTECT_SYSCALL_NO_MIPS_O32 4125
+#define MUNMAP_SYSCALL_NO_MIPS_O32 4091
+#define MREMAP_SYSCALL_NO_MIPS_O32 4167
+
+#define MMAP_SYSCALL_NO(tsk) ((test_tsk_thread_flag((tsk), TIF_32BIT_ADDR)) ? \
+ ((test_tsk_thread_flag((tsk), TIF_32BIT_REGS)) ? \
+ (MMAP_SYSCALL_NO_MIPS_O32) : \
+ (MMAP_SYSCALL_NO_MIPS_N32)) : \
+ (MMAP_SYSCALL_NO_MIPS_N64))
+#define MMAP2_SYSCALL_NO(tsk) ((test_tsk_thread_flag((tsk), TIF_32BIT_ADDR)) ? \
+ ((test_tsk_thread_flag((tsk), TIF_32BIT_REGS)) ? \
+ (MMAP2_SYSCALL_NO_MIPS_O32) : \
+ (MMAP2_SYSCALL_NO_MIPS_N32)) : \
+ (MMAP2_SYSCALL_NO_MIPS_N64))
+#define MPROTECT_SYSCALL_NO(tsk) ((test_tsk_thread_flag((tsk), TIF_32BIT_ADDR)) ? \
+ ((test_tsk_thread_flag((tsk), TIF_32BIT_REGS)) ? \
+ (MPROTECT_SYSCALL_NO_MIPS_O32) : \
+ (MPROTECT_SYSCALL_NO_MIPS_N32)) : \
+ (MPROTECT_SYSCALL_NO_MIPS_N64))
+#define MUNMAP_SYSCALL_NO(tsk) ((test_tsk_thread_flag((tsk), TIF_32BIT_ADDR)) ? \
+ ((test_tsk_thread_flag((tsk), TIF_32BIT_REGS)) ? \
+ (MUNMAP_SYSCALL_NO_MIPS_O32) : \
+ (MUNMAP_SYSCALL_NO_MIPS_N32)) : \
+ (MUNMAP_SYSCALL_NO_MIPS_N64))
+#define MREMAP_SYSCALL_NO(tsk) ((test_tsk_thread_flag((tsk), TIF_32BIT_ADDR)) ? \
+ ((test_tsk_thread_flag((tsk), TIF_32BIT_REGS)) ? \
+ (MREMAP_SYSCALL_NO_MIPS_O32) : \
+ (MREMAP_SYSCALL_NO_MIPS_N32)) : \
+ (MREMAP_SYSCALL_NO_MIPS_N64))
+#endif
+
#if defined(__s390__) || defined(__s390x__)
#define MMAP_SYSCALL_NO(tsk) 90
#define MMAP2_SYSCALL_NO(tsk) 192
diff --git a/tapset/errno.stp b/tapset/errno.stp
index df1ccbd..7e1d2f4 100644
--- a/tapset/errno.stp
+++ b/tapset/errno.stp
@@ -390,6 +390,8 @@ static long _stp_returnval(struct pt_regs *regs) {
return regs->regs[0];
#elif defined (__arm__)
return regs->ARM_r0;
+#elif defined (__mips__)
+ return regs->regs[2];
#else
_stp_error("returnval() not defined for this architecture");
return 0;
diff --git a/tapset/linux/aux_syscalls.stp b/tapset/linux/aux_syscalls.stp
index 53e73f8..a5e7b56 100644
--- a/tapset/linux/aux_syscalls.stp
+++ b/tapset/linux/aux_syscalls.stp
@@ -2745,7 +2745,7 @@ static void _stp_sigaction_str(struct sigaction *act, char *ptr, int len)
strlcat (ptr, ", ", len);
_stp_lookup_or_str(_stp_sa_flags_list, act->sa_flags, ptr, len);
strlcat (ptr, ", ", len);
-#if !defined (__ia64__)
+#if !defined (__ia64__) && !defined (__mips__)
slen = strlen(ptr);
_stp_snprintf(ptr + slen, len - slen,
"0x%lx, [", (long)act->sa_restorer);
@@ -3085,6 +3085,9 @@ function __is_user_regs:long (regs:long)
#elif defined(__arm__)
long cpsr = kread(®s->ARM_cpsr);
STAP_RETVALUE = ((cpsr & 0xf) == 0);
+#elif defined(__mips__) /* TODO kamensky: need to test */
+ unsigned long cp0 = kread(®s->cp0_status);
+ THIS->__retvalue = ((cp0 & 0x08) == 8);
#elif defined(__s390__) || defined(__s390x__)
unsigned long mask = kread(®s->psw.mask);
STAP_RETVALUE = ((mask & PSW_MASK_PSTATE) != 0);
diff --git a/tapset/linux/scheduler.stp b/tapset/linux/scheduler.stp
index 7596a46..d45116b 100644
--- a/tapset/linux/scheduler.stp
+++ b/tapset/linux/scheduler.stp
@@ -117,7 +117,7 @@ probe scheduler.balance = kernel.function("idle_balance") ?
*/
probe scheduler.ctxswitch = kernel.trace("sched_switch") !,
-%( arch != "x86_64" && arch != "ia64" && arch != "arm" %?
+%( arch != "x86_64" && arch != "ia64" && arch != "arm" && arch != "mips" %?
kernel.function("__switch_to")
%:
kernel.function("context_switch")
diff --git a/tapset/linux/syscalls2.stp b/tapset/linux/syscalls2.stp
index 08d4e36..7832dd4 100644
--- a/tapset/linux/syscalls2.stp
+++ b/tapset/linux/syscalls2.stp
@@ -1553,7 +1553,11 @@ probe syscall.rt_sigreturn.return =
kernel.function("sys32_rt_sigreturn").return ?
{
name = "rt_sigreturn"
+%( arch == "mips" %?
+ retstr = "void"
+%:
retstr = return_str(1, $return)
+%)
}
# rt_sigsuspend ______________________________________________
@@ -3143,7 +3147,11 @@ probe syscall.sigreturn.return = kernel.function("sys_sigreturn").return ?,
kernel.function("sys32_sigreturn").return ?
{
name = "sigreturn"
+%( arch == "mips" %?
+ retstr = "void"
+%:
retstr = return_str(1, $return)
+%)
}
# sigsuspend _________________________________________________
diff --git a/tapset/mips/aux_syscalls.stp b/tapset/mips/aux_syscalls.stp
new file mode 100644
index 0000000..5de5485
--- /dev/null
+++ b/tapset/mips/aux_syscalls.stp
@@ -0,0 +1,44 @@
+# arch-specific requests of ptrace ___________________________
+#
+function _arch_ptrace_argstr(request, pid, addr, data)
+{
+ if (request == %{ PTRACE_GETREGS %})
+ // TODO: Retrieve *data in .return
+ return sprintf ("PTRACE_GETREGS, %d, data=%p", pid, data)
+ if (request == %{ PTRACE_SETREGS %})
+ // TODO: Retrieve *data here
+ return sprintf ("PTRACE_SETREGS, %d, data=%p", pid, data)
+ if (request == %{ PTRACE_GETFPREGS %})
+ // TODO: Retrieve *data in .return
+ return sprintf ("PTRACE_GETFPREGS, %d, data=%p", pid, data)
+ if (request == %{ PTRACE_SETFPREGS %})
+ // TODO: Retrieve *data here
+ return sprintf ("PTRACE_SETFPREGS, %d, data=%p", pid, data)
+ if (request == %{ PTRACE_PEEKTEXT_3264 %})
+ // TODO: Retrieve *data in .return
+ return sprintf ("PTRACE_PEEKTEXT_3264, %d, *addr=%p, data=%p", pid, user_long(addr), data)
+ if (request == %{ PTRACE_PEEKDATA_3264 %})
+ // TODO: Retrieve *data in .return
+ return sprintf ("PTRACE_PEEKDATA_3264, %d, *addr=%p, data=%p", pid, user_long(addr), data)
+ if (request == %{ PTRACE_POKETEXT_3264 %})
+ return sprintf ("PTRACE_POKETEXT_3264, %d, *addr=%p, data=%p", pid, user_long(addr), data)
+ if (request == %{ PTRACE_POKEDATA_3264 %})
+ return sprintf ("PTRACE_POKEDATA_3264, %d, *addr=%p, data=%p", pid, user_long(addr), data)
+ if (request == %{ PTRACE_GET_THREAD_AREA %})
+ // TODO: Retrieve *data in .return
+ return sprintf ("PTRACE_GET_THREAD_AREA, %d, index=%d, data=%p", pid, addr, data)
+ if (request == %{ PTRACE_GET_THREAD_AREA_3264 %})
+ // TODO: Retrieve *data in .return
+ return sprintf ("PTRACE_GET_THREAD_AREA_3264, %d, index=%d, data=%p", pid, addr, data)
+ if (request == %{ PTRACE_GET_WATCH_REGS %})
+ // TODO: Retrieve *data in .return
+ return sprintf ("PTRACE_GET_WATCH_REGS, %d, data=%p", pid, data)
+ if (request == %{ PTRACE_SET_WATCH_REGS %})
+ // TODO: Retrieve *data here
+ return sprintf ("PTRACE_SET_WATCH_REGS, %d, data=%p", pid, data)
+}
+
+function _ptrace_return_arch_prctl_addr:long(request:long, addr:long, data:long)
+{
+ return 0
+}
diff --git a/tapset/mips/registers.stp b/tapset/mips/registers.stp
new file mode 100644
index 0000000..be50f76
--- /dev/null
+++ b/tapset/mips/registers.stp
@@ -0,0 +1,276 @@
+/* Dwarfless register access for mips */
+
+global _reg_offsets, _stp_regs_registered
+
+function _stp_register_regs() {
+%( CONFIG_64BIT == "y" %?
+ /* n32/n64 registers naming scheme */
+ /* Same order as struct pt_regs */
+ _reg_offsets["zero"] = 0
+ _reg_offsets["at"] = 8
+ _reg_offsets["v0"] = 16
+ _reg_offsets["v1"] = 24
+ _reg_offsets["a0"] = 32
+ _reg_offsets["a1"] = 40
+ _reg_offsets["a2"] = 48
+ _reg_offsets["a3"] = 56
+ _reg_offsets["a4"] = 64
+ _reg_offsets["a5"] = 72
+ _reg_offsets["a6"] = 80
+ _reg_offsets["a7"] = 88
+ _reg_offsets["t0"] = 96
+ _reg_offsets["t1"] = 104
+ _reg_offsets["t2"] = 112
+ _reg_offsets["t3"] = 120
+ _reg_offsets["s0"] = 128
+ _reg_offsets["s1"] = 136
+ _reg_offsets["s2"] = 144
+ _reg_offsets["s3"] = 152
+ _reg_offsets["s4"] = 160
+ _reg_offsets["s5"] = 168
+ _reg_offsets["s6"] = 176
+ _reg_offsets["s7"] = 184
+ _reg_offsets["t8"] = 192
+ _reg_offsets["t9"] = 200
+ _reg_offsets["k0"] = 208
+ _reg_offsets["k1"] = 216
+ _reg_offsets["gp"] = 224
+ _reg_offsets["sp"] = 232
+ _reg_offsets["s8"] = 240 _reg_offsets["fp"] = 240
+ _reg_offsets["ra"] = 248
+
+ _reg_offsets["status"] = 256
+ _reg_offsets["hi"] = 264
+ _reg_offsets["lo"] = 272
+
+ /*
+ * no CONFIG_CPU_HAS_SMARTMIPS support for now, if it is
+ * enabled below values will be wrong
+ */
+
+ _reg_offsets["badvaddr"] = 280
+ _reg_offsets["cause"] = 288
+ _reg_offsets["epc"] = 296
+
+ /* no cp0_tcstatus register for now */
+ /* no mpl and mtp registers for now */
+%:
+ /* o32 registers naming scheme */
+ /* Same order as struct pt_regs */
+ _reg_offsets["zero"] = 24
+ _reg_offsets["at"] = 28
+ _reg_offsets["v0"] = 32
+ _reg_offsets["v1"] = 36
+ _reg_offsets["a0"] = 40
+ _reg_offsets["a1"] = 44
+ _reg_offsets["a2"] = 48
+ _reg_offsets["a3"] = 52
+ _reg_offsets["t0"] = 56
+ _reg_offsets["t1"] = 60
+ _reg_offsets["t2"] = 64
+ _reg_offsets["t3"] = 68
+ _reg_offsets["t4"] = 72
+ _reg_offsets["t5"] = 76
+ _reg_offsets["t6"] = 80
+ _reg_offsets["t7"] = 84
+ _reg_offsets["s0"] = 88
+ _reg_offsets["s1"] = 92
+ _reg_offsets["s2"] = 96
+ _reg_offsets["s3"] = 100
+ _reg_offsets["s4"] = 104
+ _reg_offsets["s5"] = 108
+ _reg_offsets["s6"] = 112
+ _reg_offsets["s7"] = 116
+ _reg_offsets["t8"] = 120
+ _reg_offsets["t9"] = 124
+ _reg_offsets["k0"] = 128
+ _reg_offsets["k1"] = 132
+ _reg_offsets["gp"] = 136
+ _reg_offsets["sp"] = 140
+ _reg_offsets["s8"] = 144 _reg_offsets["fp"] = 144
+ _reg_offsets["ra"] = 148
+
+ _reg_offsets["status"] = 152
+ _reg_offsets["hi"] = 156
+ _reg_offsets["lo"] = 160
+
+ /*
+ * no CONFIG_CPU_HAS_SMARTMIPS support for now, if it is
+ * enabled below values will be wrong
+ */
+ _reg_offsets["badvaddr"] = 164
+ _reg_offsets["cause"] = 168
+ _reg_offsets["epc"] = 172
+
+ /* no cp0_tcstatus register for now */
+ /* no mpl and mtp registers for now */
+%)
+ _stp_regs_registered = 1
+}
+
+function probing_app_with_32bit_regs() %{ /* pure */
+ THIS->__retvalue = _stp_probing_app_with_32bit_regs(CONTEXT->regs);
+%}
+
+function _stp_get_register_by_offset:long (offset:long) %{ /* pure */
+ long value;
+ if (!CONTEXT->regs) {
+ CONTEXT->last_error = "No registers available in this context";
+ return;
+ }
+ if (THIS->offset < 0 || THIS->offset > sizeof(struct pt_regs) - sizeof(long)) {
+ snprintf(CONTEXT->error_buffer, sizeof(CONTEXT->error_buffer),
+ "Bad register offset: %lld",
+ (long long)THIS->offset);
+ CONTEXT->last_error = CONTEXT->error_buffer;
+ return;
+ }
+ memcpy(&value, ((char *)CONTEXT->regs) + THIS->offset, sizeof(value));
+ THIS->__retvalue = value;
+%}
+
+function _stp_sign_extend32:long (value:long) {
+ if (value & 0x80000000)
+ value |= (0xffffffff << 32)
+ return value
+}
+
+function _stp_register:long (name:string, sign_extend:long) {
+ if (!registers_valid()) {
+ error("cannot access CPU registers in this context")
+ return 0
+ }
+ if (!_stp_regs_registered)
+ _stp_register_regs()
+ offset = _reg_offsets[name]
+ if (offset == 0 && !(name in _reg_offsets)) {
+ error("Unknown register: " . name)
+ return 0
+ }
+ value = _stp_get_register_by_offset(offset)
+%( CONFIG_64BIT == "y" %?
+ if (probing_app_with_32bit_regs()) {
+%)
+ if (sign_extend)
+ value = _stp_sign_extend32(value)
+ else
+ value &= 0xffffffff
+%( CONFIG_64BIT == "y" %?
+ }
+%)
+ return value
+}
+
+/* Return the named register value as a signed value. */
+function register:long (name:string) {
+ return _stp_register(name, 1)
+}
+
+/*
+ * Return the named register value as an unsigned value. Specifically,
+ * don't sign-extend the register value when promoting it to 64 bits.
+ */
+function u_register:long (name:string) {
+ return _stp_register(name, 0)
+}
+
+/*
+ * Return the value of function arg #argnum (1=first arg).
+ * If truncate=1, mask off the top 32 bits.
+ * If sign_extend=1 and (truncate=1 or the probepoint we've hit is in a
+ * 32-bit app), sign-extend the 32-bit value.
+ */
+function _stp_arg:long (argnum:long, sign_extend:long, truncate:long) {
+ val = 0
+ if (argnum < 1 || argnum > 8) {
+ error(sprintf("Cannot access arg(%d)", argnum))
+ return 0
+ }
+
+ if (argnum == 1)
+ val = u_register("a0")
+ else if (argnum == 2)
+ val = u_register("a1")
+ else if (argnum == 3)
+ val = u_register("a2")
+ else if (argnum == 4)
+ val = u_register("a3")
+ else if (argnum == 5)
+ val = u_register("a4")
+ else if (argnum == 6)
+ val = u_register("a5")
+ else if (argnum == 7)
+ val = u_register("a6")
+ else if (argnum == 8)
+ val = u_register("a7")
+
+ if (truncate) {
+ if (sign_extend)
+ val = _stp_sign_extend32(val)
+ else
+ /* High bits may be garbage. */
+ val = (val & 0xffffffff);
+ }
+ return val;
+}
+
+/* Return the value of function arg #argnum (1=first arg) as a signed int. */
+function int_arg:long (argnum:long) {
+ return _stp_arg(argnum, 1, 1)
+}
+
+/* Return the value of function arg #argnum (1=first arg) as an unsigned int. */
+function uint_arg:long (argnum:long) {
+ return _stp_arg(argnum, 0, 1)
+}
+
+function long_arg:long (argnum:long) {
+ return _stp_arg(argnum, 1, 0)
+}
+
+function ulong_arg:long (argnum:long) {
+ return _stp_arg(argnum, 0, 0)
+}
+
+function longlong_arg:long (argnum:long) {
+ if (probing_app_with_32bit_regs()) {
+ lowbits = _stp_arg(argnum, 0, 1)
+ highbits = _stp_arg(argnum+1, 0, 1)
+ return ((highbits << 32) | lowbits)
+ } else
+ return _stp_arg(argnum, 0, 0)
+}
+
+function ulonglong_arg:long (argnum:long) {
+ return longlong_arg(argnum)
+}
+
+function pointer_arg:long (argnum:long) {
+ return _stp_arg(argnum, 0, 0)
+}
+
+function s32_arg:long (argnum:long) {
+ return int_arg(argnum)
+}
+
+function u32_arg:long (argnum:long) {
+ return uint_arg(argnum)
+}
+
+function s64_arg:long (argnum:long) {
+ return longlong_arg(argnum)
+}
+
+function u64_arg:long (argnum:long) {
+ return ulonglong_arg(argnum)
+}
+
+function asmlinkage() %{ /* pure */ %}
+
+function fastcall() %{ /* pure */ %}
+
+function regparm() %{
+ snprintf(CONTEXT->error_buffer, sizeof(CONTEXT->error_buffer),
+ "regparm is invalid on mips.");
+ CONTEXT->last_error = CONTEXT->error_buffer;
+%}
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 06/13] Force sign-extend statement addresses on mips64 -msym32
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (9 preceding siblings ...)
2014-07-31 20:22 ` [RFC 04/13] mips: runtime and tapset code from cisco Crestez Dan Leonard
@ 2014-07-31 20:22 ` Crestez Dan Leonard
2014-07-31 20:23 ` [RFC 13/13] runtime: Hack to interpret mips64 FDEs as 32bit for unwind Crestez Dan Leonard
` (3 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:22 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 203 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
dwflpp.cxx | 34 ++++++++++++++++++++++++++++++++++
dwflpp.h | 1 +
tapsets.cxx | 14 ++++++++++++++
3 files changed, 49 insertions(+)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0006-Force-sign-extend-statement-addresses-on-mips64-msym.patch --]
[-- Type: text/x-patch; name="0006-Force-sign-extend-statement-addresses-on-mips64-msym.patch", Size: 2586 bytes --]
diff --git a/dwflpp.cxx b/dwflpp.cxx
index e53d5f2..dea81b9 100644
--- a/dwflpp.cxx
+++ b/dwflpp.cxx
@@ -3054,6 +3054,31 @@ dwflpp::die_location_as_function_string(Dwarf_Addr pc, Dwarf_Die *die)
return locstr;
}
+static bool
+is_elf_mips64(Elf *elf)
+{
+ GElf_Ehdr ehdr_mem;
+ GElf_Ehdr* ehdr = gelf_getehdr (elf, &ehdr_mem);
+ return ehdr->e_machine == EM_MIPS &&
+ ehdr->e_ident[EI_CLASS] == ELFCLASS64;
+}
+
+bool
+dwflpp::is_mips64_msym32(Dwarf_Die *die)
+{
+ Dwarf_Addr bias;
+ Elf* elf = (dwarf_getelf (module_dwarf)
+ ?: dwfl_module_getelf (this->module, &bias));
+ if (!::is_elf_mips64(elf)) {
+ return false;
+ }
+
+ Dwarf_Die cu_mem;
+ uint8_t address_size;
+ dwarf_diecu (die, &cu_mem, &address_size, NULL);
+ return (address_size == 4);
+}
+
struct location *
dwflpp::translate_location(struct obstack *pool,
Dwarf_Attribute *attr, Dwarf_Die *die,
@@ -3084,6 +3109,15 @@ dwflpp::translate_location(struct obstack *pool,
to be passed in, but instead should now be zero for the same reason. */
retry:
+ if (is_mips64_msym32(die))
+ {
+ /* Force sign extension */
+ if (sess.verbose > 2)
+ clog << "query_statement truncate pc=" << hex << pc
+ << " to " << hex << (uint32_t)pc
+ << " for lookup on mips64 with 32bit symbols" << endl;
+ pc = (uint32_t)pc;
+ }
switch (dwarf_getlocation_addr (attr, pc /*+ module_bias*/, &expr, &len, 1))
{
case 1: /* Should always happen. */
diff --git a/dwflpp.h b/dwflpp.h
index 2546acf..a411ed4 100644
--- a/dwflpp.h
+++ b/dwflpp.h
@@ -649,6 +649,7 @@ private:
public:
Dwarf_Addr pr15123_retry_addr (Dwarf_Addr pc, Dwarf_Die* var);
+ bool is_mips64_msym32(Dwarf_Die *die);
};
// Template <void> specializations for iterate_over_* functions
diff --git a/tapsets.cxx b/tapsets.cxx
index 3724a96..97d4b7e 100644
--- a/tapsets.cxx
+++ b/tapsets.cxx
@@ -1610,6 +1610,20 @@ query_statement (string const & func,
Dwarf_Addr stmt_addr,
dwarf_query * q)
{
+ if (1)
+ {
+ if (q->dw.is_mips64_msym32(scope_die))
+ {
+ /* Force sign extension */
+ if (q->sess.verbose > 2)
+ clog << "query_statement " << func << "@" << file << ":" << line
+ << " sign-extend stmt_addr " << hex << stmt_addr
+ << " to " << hex << ((int64_t)((int32_t)stmt_addr))
+ << " because were on mips64 with 32bit symbols" << endl;
+ stmt_addr = (int32_t)stmt_addr;
+ }
+ }
+
try
{
q->add_probe_point(func, file ? file : "",
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 13/13] runtime: Hack to interpret mips64 FDEs as 32bit for unwind
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (10 preceding siblings ...)
2014-07-31 20:22 ` [RFC 06/13] Force sign-extend statement addresses on mips64 -msym32 Crestez Dan Leonard
@ 2014-07-31 20:23 ` Crestez Dan Leonard
2014-07-31 20:23 ` [RFC 12/13] translator: " Crestez Dan Leonard
` (2 subsequent siblings)
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:23 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 133 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
runtime/unwind.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0013-runtime-Hack-to-interpret-mips64-FDEs-as-32bit-for-u.patch --]
[-- Type: text/x-patch; name="0013-runtime-Hack-to-interpret-mips64-FDEs-as-32bit-for-u.patch", Size: 1199 bytes --]
diff --git a/runtime/unwind.c b/runtime/unwind.c
index d0c280a..f3ba786 100644
--- a/runtime/unwind.c
+++ b/runtime/unwind.c
@@ -15,6 +15,11 @@
#include "unwind/unwind.h"
+/* This should perhaps be passed in through the debug_frame_hdr */
+#ifdef __mips64
+#define STP_MIPS64_MSYM32
+#endif
+
static uleb128_t get_uleb128(const u8 **pcur, const u8 *end)
{
const u8 *cur = *pcur;
@@ -319,6 +324,9 @@ static int parse_fde_cie(const u32 *fde, const u32 *cie,
/* Read augmentation string to determine frame_call and ptrType. */
*call_frame = 1;
*ptrType = DW_EH_PE_absptr;
+#ifdef STP_MIPS64_MSYM32
+ *ptrType = DW_EH_PE_data4;
+#endif
while (*aug) {
if (ciePtr > *cieStart) {
_stp_warn("Augmentation data runs past end\n");
@@ -365,6 +373,11 @@ static int parse_fde_cie(const u32 *fde, const u32 *cie,
*locRange = read_pointer(&fdePtr, *fdeEnd,
*ptrType & (DW_EH_PE_FORM | DW_EH_PE_signed),
user, compat_task);
+#ifdef STP_MIPS64_MSYM32
+ dbug_unwind(2, "sign-extend startLoc: %lx to %lx\n",
+ *startLoc, (long)((int32_t)*startLoc));
+ *startLoc = (int32_t)*startLoc;
+#endif
dbug_unwind(2, "startLoc: %lx, locrange: %lx\n",
*startLoc, *locRange);
^ permalink raw reply [flat|nested] 21+ messages in thread* [RFC 12/13] translator: Hack to interpret mips64 FDEs as 32bit for unwind
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (11 preceding siblings ...)
2014-07-31 20:23 ` [RFC 13/13] runtime: Hack to interpret mips64 FDEs as 32bit for unwind Crestez Dan Leonard
@ 2014-07-31 20:23 ` Crestez Dan Leonard
2014-08-01 11:16 ` [RFC 00/13] MIPS64 support Mark Wielaard
2014-08-15 1:27 ` Victor Kamensky
14 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-07-31 20:23 UTC (permalink / raw)
To: systemtap
[-- Attachment #1: Type: text/plain, Size: 44 bytes --]
This is a multi-part message in MIME format.
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
Signed-off-by: Crestez Dan Leonard <cdleonard@gmail.com>
---
translate.cxx | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: 0012-translator-Hack-to-interpret-mips64-FDEs-as-32bit-fo.patch --]
[-- Type: text/x-patch; name="0012-translator-Hack-to-interpret-mips64-FDEs-as-32bit-fo.patch", Size: 2273 bytes --]
diff --git a/translate.cxx b/translate.cxx
index 158f76f..93917a5 100644
--- a/translate.cxx
+++ b/translate.cxx
@@ -5549,7 +5549,7 @@ static bool need_byte_swap_for_target (const unsigned char e_ident[])
#endif
}
-static void create_debug_frame_hdr (const unsigned char e_ident[],
+static void create_debug_frame_hdr (GElf_Ehdr *ehdr,
Elf_Data *debug_frame,
void **debug_frame_hdr,
size_t *debug_frame_hdr_len,
@@ -5567,11 +5567,20 @@ static void create_debug_frame_hdr (const unsigned char e_ident[],
// In the .debug_frame the FDE encoding is always DW_EH_PE_absptr.
// So there is no need to read the CIEs. And the size is either 4
// or 8, depending on the elf class from e_ident.
+ const unsigned char *e_ident = ehdr->e_ident;
int size = (e_ident[EI_CLASS] == ELFCLASS32) ? 4 : 8;
bool need_byte_swap = need_byte_swap_for_target (e_ident);
#define host_to_target_64(x) (need_byte_swap ? bswap_64((x)) : (x))
#define host_to_target_32(x) (need_byte_swap ? bswap_32((x)) : (x))
+ int fde_addr_size = size;
+ bool mips64_msym32 = false;
+ /* Should also check the CU address_size somehow. */
+ if (ehdr->e_machine == EM_MIPS && size == 8)
+ {
+ fde_addr_size = 4;
+ mips64_msym32 = true;
+ }
int res = 0;
Dwarf_Off off = 0;
Dwarf_CFI_Entry entry;
@@ -5588,10 +5597,16 @@ static void create_debug_frame_hdr (const unsigned char e_ident[],
else
{
Dwarf_Addr addr;
- if (size == 4)
+ if (fde_addr_size == 4)
addr = (*((uint32_t *) entry.fde.start));
else
addr = (*((uint64_t *) entry.fde.start));
+ if (mips64_msym32)
+ {
+ if (session.verbose > 1)
+ clog << "sign-extend FDE initial_address=" << hex << addr << endl;
+ addr = (int32_t)(host_to_target_32((uint32_t)addr));
+ }
fdes.insert(pair<Dwarf_Addr, Dwarf_Off>(addr, off));
}
}
@@ -5744,7 +5759,7 @@ static void get_unwind_data (Dwfl_Module *m,
}
if (*debug_frame != NULL && *debug_len > 0)
- create_debug_frame_hdr (ehdr->e_ident, data,
+ create_debug_frame_hdr (ehdr, data,
debug_frame_hdr, debug_frame_hdr_len,
debug_frame_off, session, m);
}
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [RFC 00/13] MIPS64 support
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (12 preceding siblings ...)
2014-07-31 20:23 ` [RFC 12/13] translator: " Crestez Dan Leonard
@ 2014-08-01 11:16 ` Mark Wielaard
2014-08-01 12:02 ` Crestez Dan Leonard
2014-08-14 20:58 ` Josh Stone
2014-08-15 1:27 ` Victor Kamensky
14 siblings, 2 replies; 21+ messages in thread
From: Mark Wielaard @ 2014-08-01 11:16 UTC (permalink / raw)
To: Crestez Dan Leonard, jistone; +Cc: systemtap
Hi,
I didn't review any of the patches yet, but noticed this:
On Thu, Jul 31, 2014 at 11:21:05PM +0300, Crestez Dan Leonard wrote:
> Inside loc2c the CU address_size is used to determine the max_fetch_size,
> this becomes incorrect with -msym32. Handling this (patch 8) requires
> access to the elf header which requires a lot of code churn (patch 7).
> This could be avoided if elfutils exported a dwarf_die_getdwarf but this
> would be a new elfutils API.
I believe Josh Stone also wanted a function like that (although I don't
remember for what, so maybe I am wrong). I think it would be reasonable
to have such a new function to get at the Dwarf from either a Dwarf_Die
or Dwarf_CU (which might be helpful if all you have is an Dwarf_Attribute).
> Apparently -msym32 also affects the FDE data for unwind support. It's not
> clear how to detect it cleanly in there. Apparently an "address_size" field
> can be included in the CIE, but I don't have it. Both eu-readelf and
> binutils readelf show corrupt FDEs. Patches 12 and 13 are evil hacks.
> Presumably I could try to interpret initial_address both ways and attempt
> to lookup the CU?
Do you have an example ELF/DWARF file that shows this issue?
Thanks,
Mark
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [RFC 00/13] MIPS64 support
2014-08-01 11:16 ` [RFC 00/13] MIPS64 support Mark Wielaard
@ 2014-08-01 12:02 ` Crestez Dan Leonard
2014-08-14 20:58 ` Josh Stone
1 sibling, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-08-01 12:02 UTC (permalink / raw)
To: Mark Wielaard, jistone; +Cc: systemtap
[-- Attachment #1: Type: text/plain, Size: 4686 bytes --]
On 08/01/2014 02:15 PM, Mark Wielaard wrote:
>> Apparently -msym32 also affects the FDE data for unwind support. It's not
>> clear how to detect it cleanly in there. Apparently an "address_size" field
>> can be included in the CIE, but I don't have it. Both eu-readelf and
>> binutils readelf show corrupt FDEs. Patches 12 and 13 are evil hacks.
>> Presumably I could try to interpret initial_address both ways and attempt
>> to lookup the CU?
>
> Do you have an example ELF/DWARF file that shows this issue?
I attached lib/sort.o from linux ~3.10 compiled for mips64. It's small but shows the issues involved.
The header says ELF64:
ELF Header:
Magic: 7f 45 4c 46 02 02 01 00 00 00 00 00 00 00 00 00
Class: ELF64
Data: 2's complement, big endian
Version: 1 (current)
OS/ABI: UNIX - System V
ABI Version: 0
Type: REL (Relocatable file)
Machine: MIPS R3000
However the compilation unit has a pointer size of 4:
Compilation Unit @ offset 0x0:
Length: 0x142e (32-bit)
Version: 2
Abbrev Offset: 0x0
Pointer Size: 4
The CIE/FDE data has no address size data so the FDEs are interpreted as 64bit. Here's what binutils readelf shows:
00000000 000000000000000c ffffffff CIE
Version: 1
Augmentation: ""
Code alignment factor: 1
Data alignment factor: -4
Return address column: 31
DW_CFA_def_cfa: r29 ofs 0
00000010 000000000000000c 00000000 FDE cie=00000000 pc=0000000000000014..0000000c00000014
00000020 000000000000000c 00000000 FDE cie=00000000 pc=0000001400000028..0000003c00000028
00000030 0000000000000028 00000000 FDE cie=00000000 pc=0000003c00000200..480e803d4897089e
DW_CFA_advance_loc4: 1217727048 to 0000003c48950c48
DW_CFA_offset: r19 at cfa-56
DW_CFA_advance_loc: 32 to 0000003c48950c68
DW_CFA_offset: r16 at cfa-80
DW_CFA_offset: r17 at cfa-72
DW_CFA_offset: r18 at cfa-64
DW_CFA_offset: r20 at cfa-48
DW_CFA_offset: r22 at cfa-32
DW_CFA_offset: r31 at cfa-8
It's pretty clear that FDE data makes much more sense if you interpret the initial_address and address_range as 32bit. Here's what I get with a hacked version of eu-readelf which interprets all FDE data as 32bit:
DWARF section [17] '.debug_frame' at offset 0x1d88:
hack ptr_size=4
[ 0] CIE length=12
CIE_id: 18446744073709551615
version: 1
augmentation: ""
code_alignment_factor: 1
data_alignment_factor: -4
return_address_register: 31
Program:
def_cfa r29 (reg29) at offset 0
[ 10] FDE length=12 cie=[ 0]
CIE_pointer: 0
initial_location: .text+0000000000 <u32_swap>
address_range: 0x14
Program:
[ 20] FDE length=12 cie=[ 0]
CIE_pointer: 0
initial_location: .text+0x00000014 <generic_swap>
address_range: 0x28
Program:
[ 30] FDE length=40 cie=[ 0]
CIE_pointer: 0
initial_location: .text+0x0000003c <sort>
address_range: 0x200
Program:
advance_loc 8 to 0x8
def_cfa_offset 128
advance_loc 8 to 0x10
offset r23 (reg23) at cfa-24
offset r30 (reg30) at cfa-16
advance_loc 8 to 0x18
offset r21 (reg21) at cfa-40
advance_loc 8 to 0x20
offset r19 (reg19) at cfa-56
advance_loc 32 to 0x40
offset r16 (reg16) at cfa-80
offset r17 (reg17) at cfa-72
offset r18 (reg18) at cfa-64
offset r20 (reg20) at cfa-48
offset r22 (reg22) at cfa-32
offset r31 (reg31) at cfa-8
This file also shows structs with DW_op_constu data_member_locations:
<1><54>: Abbrev Number: 8 (DW_TAG_structure_type)
<55> DW_AT_name : (indirect string, offset: 0x873): kernel_symbol
<59> DW_AT_byte_size : 16
<5a> DW_AT_decl_file : 2
<5b> DW_AT_decl_line : 27
<5c> DW_AT_sibling : <0x7d>
<2><60>: Abbrev Number: 9 (DW_TAG_member)
<61> DW_AT_name : (indirect string, offset: 0x311): value
<65> DW_AT_decl_file : 2
<66> DW_AT_decl_line : 28
<67> DW_AT_type : <0x21>
<6b> DW_AT_data_member_location: 2 byte block: 10 0 (DW_OP_constu: 0)
<2><6e>: Abbrev Number: 9 (DW_TAG_member)
<6f> DW_AT_name : (indirect string, offset: 0x846): name
<73> DW_AT_decl_file : 2
<74> DW_AT_decl_line : 29
<75> DW_AT_type : <0x3b>
<79> DW_AT_data_member_location: 2 byte block: 10 8 (DW_OP_constu: 8)
Regards,
Leonard
[-- Attachment #2: sort.o --]
[-- Type: application/x-object, Size: 21872 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [RFC 00/13] MIPS64 support
2014-08-01 11:16 ` [RFC 00/13] MIPS64 support Mark Wielaard
2014-08-01 12:02 ` Crestez Dan Leonard
@ 2014-08-14 20:58 ` Josh Stone
1 sibling, 0 replies; 21+ messages in thread
From: Josh Stone @ 2014-08-14 20:58 UTC (permalink / raw)
To: Mark Wielaard, Crestez Dan Leonard; +Cc: systemtap
FYI for @redhat.com folks, if you got a bounce message from sourceware
today, I believe it's complaining about this message:
https://sourceware.org/ml/systemtap/2014-q3/msg00114.html
Apparently sourceware was happy to accept that .o attachment, but
redhat.com rejects it as "virus Heuristics.Broken.Executable".
On 08/01/2014 04:15 AM, Mark Wielaard wrote:
> Hi,
>
> I didn't review any of the patches yet, but noticed this:
>
> On Thu, Jul 31, 2014 at 11:21:05PM +0300, Crestez Dan Leonard wrote:
>> Inside loc2c the CU address_size is used to determine the max_fetch_size,
>> this becomes incorrect with -msym32. Handling this (patch 8) requires
>> access to the elf header which requires a lot of code churn (patch 7).
>> This could be avoided if elfutils exported a dwarf_die_getdwarf but this
>> would be a new elfutils API.
>
> I believe Josh Stone also wanted a function like that (although I don't
> remember for what, so maybe I am wrong). I think it would be reasonable
> to have such a new function to get at the Dwarf from either a Dwarf_Die
> or Dwarf_CU (which might be helpful if all you have is an Dwarf_Attribute).
>
>> Apparently -msym32 also affects the FDE data for unwind support. It's not
>> clear how to detect it cleanly in there. Apparently an "address_size" field
>> can be included in the CIE, but I don't have it. Both eu-readelf and
>> binutils readelf show corrupt FDEs. Patches 12 and 13 are evil hacks.
>> Presumably I could try to interpret initial_address both ways and attempt
>> to lookup the CU?
>
> Do you have an example ELF/DWARF file that shows this issue?
>
> Thanks,
>
> Mark
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [RFC 00/13] MIPS64 support
2014-07-31 20:21 [RFC 00/13] MIPS64 support Crestez Dan Leonard
` (13 preceding siblings ...)
2014-08-01 11:16 ` [RFC 00/13] MIPS64 support Mark Wielaard
@ 2014-08-15 1:27 ` Victor Kamensky
2014-09-01 13:47 ` Crestez Dan Leonard
14 siblings, 1 reply; 21+ messages in thread
From: Victor Kamensky @ 2014-08-15 1:27 UTC (permalink / raw)
To: Crestez Dan Leonard; +Cc: systemtap, Victor Kamensky
[replying from my Linaro account, since it is the one I
use to subscribe to systemtap mailing list, but my
parent company account @cisco.com still works :)]
Hi Leonard,
Just caught this looking through systemtap mailing list messages.
Thank you for picking it up! As usual swamped by immediate issues
I never found time to follow up on our initial post :(
My parent company focus is drifting from MIPS, but we have bunch
of older MIPS boxes and we have ongoing migration to newer versions
of kernel and systemtap, so these patches are still interesting to us.
I believe now I can find spare some time to work with you on review
and cleaning this up.
I looked that patches briefly. First couple things to notice:
o posted patches are in unusual form: all diffs are in attachments (I
hope it is not my mailer glitch). It is difficult to comment inline in
such case. Could you please repost it using with 'git send-mail'.
Also for patches posted by "git send-mail" I can pick them up into
my git and test it. If you need help with it please let me know
of the list.
o commit messages are a bit terse or absent. For pieces that came
from 487cb1bffaf4b56 I can help you to write those messages. I think
proper commit message would be needed if we want it to be included
in mainline systemtap tree.
More inline.
On 31 July 2014 13:21, Crestez Dan Leonard <cdleonard@gmail.com> wrote:
>
> I've been playing with systemtap on mips64 and finally got most of what I need
> from it to work:
> - kprobe insertion
> - examining structs via dwarf data
> - stack unwinding
>
> I did not test userspace support at all.
Above would be quite noticeable endeavor - MIPS kernel does not have uprobes
support. Previous uprobes patches that we posted were on top of previous version
of uprobes that was included in systemtap tree and was relying on utrace patch.
Linux kernel moved to newer uprobes and gradually and support for different CPU
types appears in the kernel. My colleague at Linaro, Dave Long, recently added
ARM v7 uprobes kernel to mainline tree.
I was mulling idea of moving our old MIPS uprobes patches to newer in kernel
uprobes layer, but it seems to be not a small task. Anyone one this mailing list
if you aware about any MIPS uprobes work please let me know.
Anyway MIPS support by systemtap could move in phases, first get kernel
tracing only, then see if we have time for uprobes and user land.
> I know about the earlier patches by cisco from the systemtap-1.6-cisco-patches
> branch. Only commit 487cb1bffaf4b5661f42798d2e4047ec986b7438 was actually
> interesting to me, but it's a big one and I split off some small chunks. I
> think only patches 1, 2, 3 are strictly required. I don't particularly care
> about syscall probing or implementing print_regs. Patch 5 could probably be
> dropped off entirely. If it helps I could split this patch further.
>
> I was able to handle cross-compiling by writing a python wrapper which passes
> correct -g and -B CROSS_COMPILE=* arguments to stap itself. Cisco posted some
> "cross-compilation helpers" but I did not use them.
>
> One obvious cross-compiling issue I found is that unwind data is written in the
> translator's byte order. I believe patch 10 applies to all scenarios where the
> host and target have different byte orders.
>
> Some hacks are required because of some unusual behavior of gcc on mips64. I
> believe these hacks are not specific to my local setup but affect a wide range
> of released gcc versions. It's not clear to me why cisco didn't hit these
> issues. Maybe they used mips32 or were not interested in dwarf support?
>
> The first issue is that a 64bit mips kernel is compiled with -msym32 which
> results in 32bit dwarf symbols. These need to be detected and handled
> specially. I think that checking for address_size == 4 from dwarf_diecu on a
> target which is otherwise 64bit is correct. The way I'm checking this (patch 6)
> might slow down translation.
>
> Inside loc2c the CU address_size is used to determine the max_fetch_size, this
> becomes incorrect with -msym32. Handling this (patch 8) requires access to the
> elf header which requires a lot of code churn (patch 7). This could be avoided
> if elfutils exported a dwarf_die_getdwarf but this would be a new elfutils API.
>
> Apparently -msym32 also affects the FDE data for unwind support. It's not clear
> how to detect it cleanly in there. Apparently an "address_size" field can be
> included in the CIE, but I don't have it. Both eu-readelf and binutils readelf
> show corrupt FDEs. Patches 12 and 13 are evil hacks. Presumably I could try to
> interpret initial_address both ways and attempt to lookup the CU?
>
> Another issue is that struct fields are generated with a single DW_OP_constu
> instead of DW_OP_plus_uconst. Handling this is isolated in patch 9.
I just looked at our tree, we do have patches in elfutils that deal
with at least
with some if not all of above problems ... the issue is that I need
to go through
my parent company open source process approval for elfutils contributions.
Even if I start now it will take time :(.
I agree with opinion expressed on this or similar thread above problems are
better to be solved in elfutils layer.
Thanks,
Victor
> The patches are against systemtap's current HEAD. It would be great if you
> could include this mips support in systemtap upstream. I realize that some
> of the hacks would require some reworking. Suggestions are welcome.
>
> Crestez Dan Leonard (12):
> mips: Minimal build support
> mips: Define TIF_32BIT if missing
> mips: Read _stp_deref and _stp_store_deref support
> mips: Special get_cycles for cavium octeon
> Force sign-extend statement addresses on mips64 -msym32
> loc2c: Add Dwarf pointer to location_context
> mips: Fix fetching params of type long on mips kernel
> mips: dwflpp hack for struct fields being DW_OP_constu instead of
> DW_OP_plus_uconst
> Create debug_frame_hdr in target byte order
> mips64: Initial unwind support
> translator: Hack to interpret mips64 FDEs as 32bit for unwind
> runtime: Hack to interpret mips64 FDEs as 32bit for unwind
>
> Victor Kamensky (1):
> mips: runtime and tapset code from cisco
>
> dwflpp.cxx | 62 +++++++++-
> dwflpp.h | 1 +
> loc2c-test.c | 27 +++--
> loc2c.c | 36 ++++--
> loc2c.h | 9 +-
> runtime/compatdefs.h | 8 ++
> runtime/linux/arith.c | 25 +++-
> runtime/linux/copy.c | 2 +-
> runtime/linux/loc2c-runtime.h | 83 +++++++++++++
> runtime/linux/runtime.h | 2 +-
> runtime/loc2c-runtime.h | 9 ++
> runtime/regs.c | 117 ++++++++++++++++++
> runtime/regs.h | 4 +
> runtime/stack-mips.c | 7 ++
> runtime/stack.c | 2 +
> runtime/syscall.h | 49 ++++++++
> runtime/time.c | 16 +++
> runtime/unwind.c | 13 ++
> runtime/unwind/mips64.h | 80 ++++++++++++
> runtime/unwind/unwind.h | 2 +
> tapset/errno.stp | 2 +
> tapset/linux/aux_syscalls.stp | 5 +-
> tapset/linux/scheduler.stp | 2 +-
> tapset/linux/syscalls2.stp | 8 ++
> tapset/mips/aux_syscalls.stp | 44 +++++++
> tapset/mips/registers.stp | 276 ++++++++++++++++++++++++++++++++++++++++++
> tapsets.cxx | 15 +++
> translate.cxx | 53 ++++++--
> 28 files changed, 917 insertions(+), 42 deletions(-)
> create mode 100644 runtime/stack-mips.c
> create mode 100644 runtime/unwind/mips64.h
> create mode 100644 tapset/mips/aux_syscalls.stp
> create mode 100644 tapset/mips/registers.stp
>
> --
> 2.0.1
>
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [RFC 00/13] MIPS64 support
2014-08-15 1:27 ` Victor Kamensky
@ 2014-09-01 13:47 ` Crestez Dan Leonard
2014-09-02 18:05 ` Josh Stone
0 siblings, 1 reply; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-09-01 13:47 UTC (permalink / raw)
To: Victor Kamensky; +Cc: systemtap
Hello,
It's not clear exactly what it takes to add a new architecture to
systemtap. Could somebody from the core systemtap team explain what it
would take to merge these patches?
Right now there is no upstream elfutils support for mips and the
patches were only tested in an cross-compilation setup internal to my
company. It's not clear if this is OK.
I pushed an updated version of the mips patches to github:
https://github.com/cdleonard/systemtap/commits/mips . The patches are
ordered roughly by hackiness. The first 7 (up to and including
b0c93e569acca2db978c7c557ad929fa041b8669) should be mostly
uncontroversial and add basic mips support. Maybe we could get those
in and then discuss the rest? I would very much like to merge this, I
have no desire to maintain these patches separately.
More replies inline:
On Fri, Aug 15, 2014 at 4:27 AM, Victor Kamensky
<victor.kamensky@linaro.org> wrote:
> I looked that patches briefly. First couple things to notice:
>
> o posted patches are in unusual form: all diffs are in attachments (I
> hope it is not my mailer glitch). It is difficult to comment inline in
> such case. Could you please repost it using with 'git send-mail'.
> Also for patches posted by "git send-mail" I can pick them up into
> my git and test it. If you need help with it please let me know
> of the list.
I did use git send-email but with format.attach = true. I will remove
that setting when sending to the systemtap list if it helps.
> o commit messages are a bit terse or absent. For pieces that came
> from 487cb1bffaf4b56 I can help you to write those messages. I think
> proper commit message would be needed if we want it to be included
> in mainline systemtap tree.
Are you refering the later patches for backtracing suport? They are
clearly labeled as hacks and I am looking for better solutions.
> On 31 July 2014 13:21, Crestez Dan Leonard <cdleonard@gmail.com> wrote:
> > I did not test userspace support at all.
>
> Above would be quite noticeable endeavor - MIPS kernel does not have uprobes
> support. Previous uprobes patches that we posted were on top of previous version
> of uprobes that was included in systemtap tree and was relying on utrace patch.
> Linux kernel moved to newer uprobes and gradually and support for different CPU
> types appears in the kernel. My colleague at Linaro, Dave Long, recently added
> ARM v7 uprobes kernel to mainline tree.
>
> I was mulling idea of moving our old MIPS uprobes patches to newer in kernel
> uprobes layer, but it seems to be not a small task. Anyone one this mailing list
> if you aware about any MIPS uprobes work please let me know.
I did not investigate uprobes support at all. But if you post even old
patches somewhere they might be useful to somebody some day. Probably
not soon.
> I just looked at our tree, we do have patches in elfutils that deal
> with at least
> with some if not all of above problems ... the issue is that I need
> to go through
> my parent company open source process approval for elfutils contributions.
> Even if I start now it will take time :(.
>
> I agree with opinion expressed on this or similar thread above problems are
> better to be solved in elfutils layer.
The new release of elfutils 0.160 adds an API which can be used to
avoid patch 7 "loc2c: Add Dwarf pointer to location_context". I'll
rewrite that part, if it helps to get the patch into upstream. Other
than that it's not clear that it's elfutils job to fix the other
issues. I chose to restrict my patches to one project.
In particular the systemtap runtime has it's own code which parses
FDEs for backtracing, outside of elfutils. As far as I can tell it
works on the raw content of the .debug_frame/.eh_frame sections.
--
Regards,
Leonard
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [RFC 00/13] MIPS64 support
2014-09-01 13:47 ` Crestez Dan Leonard
@ 2014-09-02 18:05 ` Josh Stone
2014-09-02 19:10 ` Crestez Dan Leonard
0 siblings, 1 reply; 21+ messages in thread
From: Josh Stone @ 2014-09-02 18:05 UTC (permalink / raw)
To: Crestez Dan Leonard, Victor Kamensky; +Cc: systemtap
On 09/01/2014 06:47 AM, Crestez Dan Leonard wrote:
> Hello,
>
> It's not clear exactly what it takes to add a new architecture to
> systemtap. Could somebody from the core systemtap team explain what it
> would take to merge these patches?
We don't have a formal process. I've been meaning to review your
patches, just haven't got around to it, sorry.
> Right now there is no upstream elfutils support for mips and the
> patches were only tested in an cross-compilation setup internal to my
> company. It's not clear if this is OK.
I think we can accept that, as long as we document the steps to get mips
working. A page on the wiki is probably enough.
> I pushed an updated version of the mips patches to github:
> https://github.com/cdleonard/systemtap/commits/mips . The patches are
> ordered roughly by hackiness. The first 7 (up to and including
> b0c93e569acca2db978c7c557ad929fa041b8669) should be mostly
> uncontroversial and add basic mips support. Maybe we could get those
> in and then discuss the rest? I would very much like to merge this, I
> have no desire to maintain these patches separately.
Ok, I'll review from there when I can, hopefully next week sometime. I
definitely understand not wanting to carry patches separately. But even
when it's merged, please understand that most of us Red Hat folks don't
work with mips machines, so we'll still have to rely on interested
parties like yourself to make sure it doesn't regress.
>>> I did not test userspace support at all.
>>
>> Above would be quite noticeable endeavor - MIPS kernel does not have uprobes
>> support. Previous uprobes patches that we posted were on top of previous version
>> of uprobes that was included in systemtap tree and was relying on utrace patch.
>> Linux kernel moved to newer uprobes and gradually and support for different CPU
>> types appears in the kernel. My colleague at Linaro, Dave Long, recently added
>> ARM v7 uprobes kernel to mainline tree.
>>
>> I was mulling idea of moving our old MIPS uprobes patches to newer in kernel
>> uprobes layer, but it seems to be not a small task. Anyone one this mailing list
>> if you aware about any MIPS uprobes work please let me know.
> I did not investigate uprobes support at all. But if you post even old
> patches somewhere they might be useful to somebody some day. Probably
> not soon.
Just from the perspective of merging, we don't have to have complete
feature coverage. It would be great for the kernel to get mips uprobes
support, but in stap we'll just work with what's available now.
>> I just looked at our tree, we do have patches in elfutils that deal
>> with at least
>> with some if not all of above problems ... the issue is that I need
>> to go through
>> my parent company open source process approval for elfutils contributions.
>> Even if I start now it will take time :(.
>>
>> I agree with opinion expressed on this or similar thread above problems are
>> better to be solved in elfutils layer.
> The new release of elfutils 0.160 adds an API which can be used to
> avoid patch 7 "loc2c: Add Dwarf pointer to location_context". I'll
> rewrite that part, if it helps to get the patch into upstream. Other
> than that it's not clear that it's elfutils job to fix the other
> issues. I chose to restrict my patches to one project.
I think the 0.160 API is a better way to go, especially since the main
Dwarf may not even be the right container for a given DIE when things
like .gnu_debugaltlink are considered. That shouldn't be an issue for
is_elf_mips64(), but might matter if we ever want loc2c to make other
queries on the Dwarf structure.
But do guard that with _ELFUTILS_PREREQ please, so we don't force the
new minimum elfutils on everyone. Whatever mips-stap documentation you
write can explain under what circumstances this is really necessary.
Josh
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [RFC 00/13] MIPS64 support
2014-09-02 18:05 ` Josh Stone
@ 2014-09-02 19:10 ` Crestez Dan Leonard
0 siblings, 0 replies; 21+ messages in thread
From: Crestez Dan Leonard @ 2014-09-02 19:10 UTC (permalink / raw)
To: Josh Stone; +Cc: Victor Kamensky, systemtap
On Tue, Sep 2, 2014 at 9:05 PM, Josh Stone <jistone@redhat.com> wrote:
> On 09/01/2014 06:47 AM, Crestez Dan Leonard wrote:
>> I pushed an updated version of the mips patches to github:
>> https://github.com/cdleonard/systemtap/commits/mips . The patches are
>> ordered roughly by hackiness. The first 7 (up to and including
>> b0c93e569acca2db978c7c557ad929fa041b8669) should be mostly
>> uncontroversial and add basic mips support. Maybe we could get those
>> in and then discuss the rest? I would very much like to merge this, I
>> have no desire to maintain these patches separately.
>
> Ok, I'll review from there when I can, hopefully next week sometime. I
> definitely understand not wanting to carry patches separately. But even
> when it's merged, please understand that most of us Red Hat folks don't
> work with mips machines, so we'll still have to rely on interested
> parties like yourself to make sure it doesn't regress.
Sounds great. Let me know if you would rather have me post those 7
patches as individual emails to the list. It's a little spammy but
very useful for reviewing.
>> The new release of elfutils 0.160 adds an API which can be used to
>> avoid patch 7 "loc2c: Add Dwarf pointer to location_context". I'll
>> rewrite that part, if it helps to get the patch into upstream. Other
>> than that it's not clear that it's elfutils job to fix the other
>> issues. I chose to restrict my patches to one project.
>
> I think the 0.160 API is a better way to go, especially since the main
> Dwarf may not even be the right container for a given DIE when things
> like .gnu_debugaltlink are considered. That shouldn't be an issue for
> is_elf_mips64(), but might matter if we ever want loc2c to make other
> queries on the Dwarf structure.
>
> But do guard that with _ELFUTILS_PREREQ please, so we don't force the
> new minimum elfutils on everyone. Whatever mips-stap documentation you
> write can explain under what circumstances this is really necessary.
I will adjust my patch using the new elfutils API and avoid bumping
elfutils globally. It's not strictly required for minimal mips
support.
--
Regards,
Leonard
^ permalink raw reply [flat|nested] 21+ messages in thread