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* [SCM]  archer-sergiodj-lazier-debuginfo-reading: Renaming command `auto-solib-add', deprecating it, renaming some variables, adding documentation.
@ 2011-07-13 16:59 sergiodj
  0 siblings, 0 replies; only message in thread
From: sergiodj @ 2011-07-13 16:59 UTC (permalink / raw)
  To: archer-commits

The branch, archer-sergiodj-lazier-debuginfo-reading has been updated
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       via  5a61a6268f973cc777edbb870d97959ab150ff01 (commit)
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       via  5d6fe8093b914786c3d9e6fc93dc901feb5fce6a (commit)
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       via  d6bcd1c0b9730519d97d559d9905818062ec56b5 (commit)
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       via  8af6418532e40bb80c8dcf065c04871e8efd5cd8 (commit)
       via  2366743823756e915b0c886c0579328086f277e5 (commit)
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       via  90ed58afe1256fbb9d8df73e90bb84c9c913f3f3 (commit)
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       via  4d94e6000b0422ddd3a3d0ff17542e46c7e402b2 (commit)
       via  566bcdbe9056e31964e0a04299dc3e8730c9f4e3 (commit)
       via  d2ab7481bab242fa9beb5a8272fe783278c717c0 (commit)
       via  e1133e8a8ffc55105d7489b507559536577c515a (commit)
       via  057a947749d6e63a9e380b80274357b5923b386f (commit)
       via  2ece73a482778b13e84d8d79e92f00a20ee65d34 (commit)
       via  04351cba945af33368c50f54cbfd85d0da1dcce1 (commit)
       via  d906de3bd973c9b0b1dcfd101c2041b30efc7068 (commit)
       via  fd2c06813b72628b87cdf3a26c83b4a1677a5781 (commit)
       via  0a988f86ebf30f057ee16b5d407f58ba38003967 (commit)
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       via  4e27712e560a52f3c5bb617af8d0c7e22e54bd8b (commit)
       via  c1aa50354b133be073be1de53cc342da9a77f003 (commit)
       via  f02360a7c4836cb874e428cdb20c6e506b8f3f94 (commit)
       via  b6b2c802d9d6d67548ab24c517e5e1bc83d83ab1 (commit)
       via  42080002c7e83b6e2b7d4de2fd89fc16fe4fc6b4 (commit)
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       via  0280b9139093f51dba98e1cb1aee79149ef0ef34 (commit)
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       via  08af17fe8d80b3cffdc819f3cf122c4a5a56e9bc (commit)
       via  6da81da76a02b50b635495a6b5e63bc0a4bcb35a (commit)
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       via  2825bb9e506bf3cd5bc3e01bb414c8afd0f86ea6 (commit)
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       via  578efa3a315d4844ad34833fd72c5a42b3203643 (commit)
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       via  67c8fd78188c91edabfa0edf99d1e283d4316656 (commit)
       via  fcde33c235fa5ba9e6cb35933f1cb1733c8a7276 (commit)
      from  c4a724253a9681bc5bdd821448f72ab2dc1b94c3 (commit)

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- Log -----------------------------------------------------------------
commit f932f5dc20b98db8806486988d2b329b1ebedce5
Author: Sergio Durigan Junior <sergiodj@redhat.com>
Date:   Wed Jul 13 13:58:42 2011 -0300

    Renaming command `auto-solib-add', deprecating it, renaming some
    variables, adding documentation.

commit 0d0d2e9d98a53c198699f57dc44d9e9c8820d389
Merge: 45d948c 5051b74
Author: Sergio Durigan Junior <sergiodj@redhat.com>
Date:   Wed Jul 13 13:58:21 2011 -0300

    Merge remote-tracking branch 'origin/master' into gdb-sergio-improve-debuginfo-reading

commit 5051b741af115cf297fa03f91c9894bc3664eae3
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date:   Wed Jul 13 15:18:12 2011 +0000

    gdb/testsuite/
    	* gdb.dwarf2/dw2-op-call.S (array1): Use the real label; do not
    	reference undefined label.

commit aaf99e37f69b06a5964b2ed498ba31720422a932
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date:   Wed Jul 13 15:15:36 2011 +0000

    gdb/
    	Code cleanup.
    	* dwarf2loc.c (dwarf_expr_frame_base_1, dwarf2_evaluate_loc_desc_full):
    	Indent prototypes so they do not get into tags.

commit fcc51a3385b147c074ff0abb0ddfcdece40d100e
Author: gdbadmin <gdbadmin@sourceware.org>
Date:   Wed Jul 13 00:00:33 2011 +0000

    *** empty log message ***

commit c4f0e1880e986f8a359b5f9a3d837587706cfd4a
Author: Alan Modra <amodra@bigpond.net.au>
Date:   Wed Jul 13 00:00:08 2011 +0000

    daily update

commit 45d948ca1be7692b6e3515b48e5d44a12ec61b9b
Merge: c4a7242 d80c734
Author: Sergio Durigan Junior <sergiodj@redhat.com>
Date:   Tue Jul 12 16:18:00 2011 -0300

    Merge remote-tracking branch 'origin/master' into gdb-sergio-improve-debuginfo-reading

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog                                          |   17 +
 bfd/ChangeLog                                      |  756 +
 bfd/Makefile.am                                    |   22 +-
 bfd/Makefile.in                                    |   29 +-
 bfd/aix386-core.c                                  |    3 +-
 bfd/aout-adobe.c                                   |    4 +-
 bfd/aout-arm.c                                     |    8 +-
 bfd/aout-target.h                                  |    6 +-
 bfd/aout-tic30.c                                   |    6 +-
 bfd/aoutx.h                                        |   23 +-
 bfd/archive.c                                      |   98 +-
 bfd/archures.c                                     |   45 +-
 bfd/bfd-in2.h                                      |  212 +-
 bfd/bfd.c                                          |    6 +-
 bfd/bfdio.c                                        |   25 +-
 bfd/binary.c                                       |    4 +-
 bfd/bout.c                                         |    6 +-
 bfd/cache.c                                        |   31 +-
 bfd/cisco-core.c                                   |   11 +-
 bfd/coff-alpha.c                                   |    6 +-
 bfd/coff-i386.c                                    |    3 +-
 bfd/coff-i860.c                                    |    1 +
 bfd/coff-i960.c                                    |    4 +-
 bfd/coff-ia64.c                                    |    3 +-
 bfd/coff-mcore.c                                   |    4 +-
 bfd/coff-mips.c                                    |    8 +-
 bfd/coff-or32.c                                    |    3 +-
 bfd/coff-ppc.c                                     |    5 +-
 bfd/coff-rs6000.c                                  |    6 +-
 bfd/coff-sh.c                                      |    2 +
 bfd/coff-stgo32.c                                  |    8 +-
 bfd/coff-tic30.c                                   |    3 +-
 bfd/coff-tic54x.c                                  |    8 +-
 bfd/coff-x86_64.c                                  |    4 +-
 bfd/coff64-rs6000.c                                |    6 +-
 bfd/coffcode.h                                     |    9 +-
 bfd/cofflink.c                                     |   18 +-
 bfd/config.bfd                                     |   15 +-
 bfd/configure                                      |   18 +-
 bfd/configure.in                                   |   18 +-
 bfd/cpu-tilegx.c                                   |   39 +
 bfd/cpu-tilepro.c                                  |   39 +
 bfd/ecoff.c                                        |   19 +-
 bfd/elf-bfd.h                                      |   23 +-
 bfd/elf-eh-frame.c                                 |   64 +-
 bfd/elf-m10300.c                                   |   21 +-
 bfd/elf.c                                          |   72 +-
 bfd/elf32-arm.c                                    |   86 +-
 bfd/elf32-avr.c                                    |   51 +-
 bfd/elf32-bfin.c                                   |    3 -
 bfd/elf32-cris.c                                   |   11 +-
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 sim/testsuite/sim/bfin/zeroflagrnd.s               |   37 +
 sim/v850/ChangeLog                                 |    4 +
 sim/v850/interp.c                                  |   19 -
 1443 files changed, 288586 insertions(+), 22393 deletions(-)
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 create mode 100644 sim/testsuite/sim/bfin/c_dsp32alu_sgn.s
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 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_ih.s
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 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_iu.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_m.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_t.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_tu.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_u.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_ih.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_is.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_iu.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_m.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_t.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_tu.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_u.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1a0.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1a0_iutsh.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_dr_a1a0_m.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_mix.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a0.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a0_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a0_is.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a0_m.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a0_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a0_u.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_is.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_m.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_u.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0_is.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0_m.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0_u.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mac_pair_mix.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_ih.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_is.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_iu.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_m.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_m_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_m_iutsh.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_m_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_m_t.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_m_u.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_mix.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_t.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_tu.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_dr_u.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair_is.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair_m.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair_m_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair_m_is.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair_m_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair_m_u.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32mult_pair_u.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_a0alr.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_af.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_af_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahalf_ln.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahalf_ln_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahalf_lp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahalf_lp_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahalf_rn.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahalf_rn_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahalf_rp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahalf_rp_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahh.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ahh_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_align16.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_align24.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_align8.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_amix.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_bitmux.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_bxor.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_expadj_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_expadj_l.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_expadj_r.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_expexp_r.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_fdepx.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_fextx.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_lf.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_lhalf_ln.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_lhalf_lp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_lhalf_rn.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_lhalf_rp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_lhh.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_lmix.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_ones.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_pack.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_rot.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_rot_mix.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_signbits_r.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_signbits_rh.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_signbits_rl.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_vmax.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shift_vmaxvmax.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_a0alr.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_af.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_af_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_ln.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_ln_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_lp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_lp_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_rn.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_rn_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_rp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_rp_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahh.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_ahh_s.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_amix.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_lf.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_lhalf_ln.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_lhalf_lp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_lhalf_rn.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_lhalf_rp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_lhh.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_lmix.s
 create mode 100644 sim/testsuite/sim/bfin/c_dsp32shiftim_rot.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_ld_dr_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_ld_dr_ipp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_ld_dr_ippm.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_ld_drhi_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_ld_drhi_ipp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_ld_drlo_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_ld_drlo_ipp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_st_dr_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_st_dr_ipp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_st_dr_ippm.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_st_drhi_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_st_drhi_ipp.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_st_drlo_i.s
 create mode 100644 sim/testsuite/sim/bfin/c_dspldst_st_drlo_ipp.s
 create mode 100644 sim/testsuite/sim/bfin/c_except_illopcode.S
 create mode 100644 sim/testsuite/sim/bfin/c_except_sys_sstep.S
 create mode 100644 sim/testsuite/sim/bfin/c_except_user_mode.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_disable.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_disable_enable.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_excpt.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_loopsetup_stld.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_nested.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_nmi.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_pending.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_pending_2.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_timer.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_timer_reload.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_timer_tcount.S
 create mode 100644 sim/testsuite/sim/bfin/c_interr_timer_tscale.S
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_dreg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_drhi.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_drlo.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_h_dr.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_h_ibml.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_h_pr.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_l_dr.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_l_ibml.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_l_pr.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_lz_dr.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_lz_ibml.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_lz_pr.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_lzhi_dr.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_lzhi_ibml.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_lzhi_pr.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldimmhalf_pibml.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_b.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm_b.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm_xb.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm_xh.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp_b.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp_xb.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp_xh.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_ppmm_hbx.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_xb.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_d_p_xh.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_p_p.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_p_p_mm.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_ld_p_p_pp.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_d.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_d_b.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_d_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_d_mm.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_d_mm_b.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_d_mm_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_d_pp.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_d_pp_b.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_d_pp_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_p.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_p_mm.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldst_st_p_p_pp.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_ld_dr_b.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_ld_dr_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_ld_dr_xb.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_ld_dr_xh.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_ld_dreg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_ld_preg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_st_dr_b.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_st_dr_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_st_dreg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstidxl_st_preg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstii_ld_dr_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstii_ld_dr_xh.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstii_ld_dreg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstii_ld_preg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstii_st_dr_h.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstii_st_dreg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstii_st_preg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstiifp_ld_dreg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstiifp_ld_preg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstiifp_st_dreg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstiifp_st_preg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstpmod_ld_dr_hi.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstpmod_ld_dr_lo.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstpmod_ld_dreg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstpmod_ld_h_xh.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstpmod_ld_lohi.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstpmod_st_dr_hi.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstpmod_st_dr_lo.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstpmod_st_dreg.s
 create mode 100644 sim/testsuite/sim/bfin/c_ldstpmod_st_lohi.s
 create mode 100644 sim/testsuite/sim/bfin/c_linkage.s
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_alshft_mix.s
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_arith_shft.s
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_bitclr.s
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_bitset.s
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_bittgl.s
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_bittst.s
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_log_l_shft.s
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_log_l_shft_astat.S
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_log_r_shft.s
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_log_r_shft_astat.S
 create mode 100644 sim/testsuite/sim/bfin/c_logi2op_nbittst.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_nested.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_nested_bot.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_nested_prelc.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_nested_top.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_overlap.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_preg_div2_lc0.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_preg_div2_lc1.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_preg_lc0.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_preg_lc1.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_preg_stld.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_prelc.s
 create mode 100644 sim/testsuite/sim/bfin/c_loopsetup_topbotcntr.s
 create mode 100644 sim/testsuite/sim/bfin/c_mmr_interr_ctl.s
 create mode 100644 sim/testsuite/sim/bfin/c_mmr_loop.S
 create mode 100644 sim/testsuite/sim/bfin/c_mmr_loop_user_except.S
 create mode 100644 sim/testsuite/sim/bfin/c_mmr_ppop_illegal_adr.S
 create mode 100644 sim/testsuite/sim/bfin/c_mmr_ppopm_illegal_adr.S
 create mode 100644 sim/testsuite/sim/bfin/c_mmr_timer.S
 create mode 100644 sim/testsuite/sim/bfin/c_mode_supervisor.S
 create mode 100644 sim/testsuite/sim/bfin/c_mode_user.S
 create mode 100644 sim/testsuite/sim/bfin/c_mode_user_superivsor.S
 create mode 100644 sim/testsuite/sim/bfin/c_multi_issue_dsp_ld_ld.s
 create mode 100644 sim/testsuite/sim/bfin/c_multi_issue_dsp_ldst_1.s
 create mode 100644 sim/testsuite/sim/bfin/c_multi_issue_dsp_ldst_2.s
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_call_pcpr.s
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_call_pr.s
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_clisti_interr.S
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_csync_mmr.S
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_except_rtx.S
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_excpt.S
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_jump_pcpr.s
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_jump_pr.s
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_nop.s
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_raise_rt_i_n.S
 create mode 100644 sim/testsuite/sim/bfin/c_progctrl_rts.s
 create mode 100644 sim/testsuite/sim/bfin/c_ptr2op_pr_neg_pr.s
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First 500 lines of diff:
diff --git a/ChangeLog b/ChangeLog
index 028f718..8e96373 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,20 @@
+2011-07-07  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	PR target/39150
+	* configure.ac (i[3456789]86-*-solaris2*): Also accept
+	x86_64-*-solaris2.1[0-9]*.
+	* configure: Regenerate.
+
+2011-06-13  Walter Lee <walt@tilera.com>
+
+	* configure.ac (tilepro-*-*) New case.
+	(tilegx-*-*): Likewise.
+	* configure: Regenerate.
+
+2011-06-06  Nick Clifton  <nickc@redhat.com>
+
+	* config.sub: Sync from upstream.
+
 2011-05-08  Doug Kwan  <dougkwan@google.com>
 
 	Merge from gcc:
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 02b47d4..be2cea2 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,759 @@
+2011-07-12  Nick Clifton  <nickc@redhat.com>
+
+	* elf32-arm.c (elf32_arm_section_flags): Delete.
+	(elf_backend_section_flags): Remove.
+
+2011-07-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/12982
+	* elflink.c (bfd_elf_size_dynamic_sections): Also skip BFD_PLUGIN
+	when setting stack_flags.
+
+2011-07-11  Catherine Moore  <clm@codesourcery.com>
+
+	* aout-adobe.c (aout_32_bfd_lookup_section_flags): New definition.
+	* aout-target.h (MY_bfd_lookup_section_flags): New definition.
+	* aout-tic30.c (MY_bfd_lookup_section_flags): New definition.
+        * bfd-in2.h: Regenerated.
+	* bfd.c (bfd_lookup_section_flags): New definition.
+	* binary.c (binary_bfd_lookup_section_flags): New definition.
+	* bout.c (b_out_bfd_lookup_section_flags): New definition.
+	* coff-alpha.c (_bfd_ecoff_bfd_lookup_section_flags): New definition.
+	* coff-mips.c (_bfd_ecoff_bfd_lookup_section_flags): New definition.
+	* coff-rs6000.c (rs6000coff_vec): Include
+	bfd_generic_lookup_section_flags.
+	(pmac_xcoff_vec): Likewise.
+	* coffcode.h (coff_bfd_lookup_section_flags): New definition.
+	* coff64-rs6000.c (rs6000coff64_vec): Include
+	bfd_generic_lookup_section_flags.
+	(aix5coff64_vec): Likewise.
+	* ecoff.c (bfd_debug_section): Initialize flag_info field.
+	* elf-bfd.h (elf_backend_lookup_section_flags_hook): Declare.
+	(bfd_elf_lookup_section_flags): Declare.
+	* elflink.c (bfd_elf_lookup_section_flags): New function.
+	* elfxx-target.h (bfd_elfNN_bfd_lookup_section_flags): Define.
+	(elf_backend_lookup_section_flags_hook): Define.
+	(elf_backend_data): Add elf_backend_lookup_section_flags_hook.
+	* i386msdos.c (msdos_bfd_lookup_section_flags): New define.
+	* i386os9k.c (os9k_bfd_lookup_section_flags): New define.
+	* ieee.c (ieee_bfd_lookup_section_flags): New define.
+	* ihex.c (ihex_bfd_lookup_section_flags): New define.
+	* libbfd-in.h (_bfd_nolink_bfd_lookup_section_flags): Declare.
+	(bfd_generic_lookup_section_flags): Declare.
+	* libbfd.h: Regenerated.
+	* mach-o-target.c (bfd_mach_o_bfd_lookup_section_flags): New.
+	* mmo.c (mmo_bfd_lookup_section_flags): New definition.
+	* nlm-target.h (nlm_bfd_lookup_section_flags): New definition.
+	* oasys.c (oasys_bfd_lookup_section_flags): New definition.
+	* pef.c (bfd_pef_bfd_lookup_section_flags): New definition.
+	* plugin.c (bfd_plugin_bfd_lookup_section_flags): New definition.
+	* ppcboot.c (ppcboot_bfd_lookup_section_flags): New definition.
+	* reloc.c (bfd_generic_lookup_section_flags): New function.
+	* som.c (som_bfd_lookup_section_flags): New definition.
+	* srec.c (srec_bfd_lookup_section_flags): New definition.
+	* targets.c (flag_info): Declare.
+	(NAME##_bfd_lookup_section_flags): Add to LINK jump table.
+	(_bfd_lookup_section_flags): New.
+	* tekhex.c (tekhex_bfd_lookup_section_flags): New definition.
+	* versados.c (versados_bfd_lookup_section_flags): New definition.
+	* vms-alpha.c (alpha_vms_bfd_lookup_section_flag): New definition.
+	* xsym.c (bfd_sym_bfd_lookup_section_flags): New definition.
+
+2011-07-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/12978
+	* elfnn-ia64.c (count_dyn_reloc): Fix a typo.
+
+2011-07-09  Alan Modra  <amodra@gmail.com>
+
+	PR ld/12942
+	* elflink.c (elf_link_add_object_symbols): Use elf_discarded_section
+	rather than kept_section to determine whether a symbol is from
+	a discarded section.
+	* cofflink.c (coff_link_add_symbols): Make symbols from discarded
+	sections appear undefined.
+
+2011-07-09  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR ld/12942
+	* elf-bfd.h (_bfd_elf_section_already_linked): Replace
+	"asection *" with "struct already_linked *".
+	* libbfd-in.h (_bfd_nolink_section_already_linked): Likewise.
+	(_bfd_generic_section_already_linked): Likewise.
+	(bfd_section_already_linked_table_insert): Likewise.
+	(struct already_linked): New.
+	(struct bfd_section_already_linked): Use it.
+	* elflink.c (_bfd_elf_section_already_linked): Replace.
+	"asection *" with "struct already_linked *".  Replace the plugin
+	dummy with the LTO output.
+	* linker.c (_bfd_generic_section_already_linked): Likewise.
+	* targets.c (struct already_linked): Add forward declaration.
+	(bfd_target): Replace "struct bfd_section *" with
+	"struct already_linked *" in _section_already_linked.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+
+2011-07-06  Tristan Gingold  <gingold@adacore.com>
+
+	* mach-o.h: Move loader related definitions to
+	include/mach-o/loader.h.  Include it.
+
+2011-07-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c (elf_backend_post_process_headers): Always
+	define to _bfd_elf_set_osabi.
+
+2011-07-03  Samuel Thibault  <samuel.thibault@gnu.org>
+	    Thomas Schwinge  <thomas@schwinge.name>
+
+	PR binutils/12913
+	* elf.c (_bfd_elf_set_osabi): Use ELFOSABI_GNU name instead of
+	ELFOSABI_LINUX alias.
+	* elf32-hppa.c: Likewise.
+	* elf32-i370.c: Likewise.
+	* elf64-hppa.c: Likewise.
+
+2011-07-01  Ian Lance Taylor  <iant@google.com>
+
+	* elf32-i386.c (elf_i386_eh_frame_plt): Correct expression: change
+	DW_OP_lit3 to DW_OP_lit2.
+
+2011-07-01  Alan Modra  <amodra@gmail.com>
+
+	* elf32-ppc.c (ppc_elf_copy_indirect_symbol): Don't look at
+	dyn relocs when called to copy flags for a weak sym.
+	* elf64-ppc.c (ppc64_elf_copy_indirect_symbol): Likewise.
+	(ppc64_elf_merge_private_bfd_data): Delete.
+	(bfd_elf64_bfd_merge_private_bfd_data): Define as
+	_bfd_generic_verify_endian_match.
+
+2011-06-30  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* bfd/elf32-tic6x.c (elf32_tic6x_set_osabi): Also set it if
+	link_info is NULL.
+
+2011-06-28  Tristan Gingold  <gingold@adacore.com>
+
+	* vms-alpha.c (vms_private_data_struct): Make vms_linkage_index
+	unsigned int.
+	(_bfd_vms_write_etir): Write linkage index from reloc.
+
+2011-06-28  Fawzi Mohamed <fawzi.mohamed@nokia.com>
+
+	* mach-o.c (bfd_mach_o_read_command): Also ignore
+	BFD_MACH_O_LC_ROUTINES_64.
+
+2011-06-27  Tristan Gingold  <gingold@adacore.com>
+
+	* vms-alpha.c (_bfd_vms_write_etir): Use 'section' to get current
+	section target index.
+
+2011-06-27  Nick Clifton  <nickc@redhat.com>
+
+	* cisco-core.c (cisco_core_little_vec): Add initialization of
+	match_priority field.
+
+2011-06-27  Tristan Gingold  <gingold@adacore.com>
+
+	* cache.c: Include bfd_stdint.h.
+	(cache_bmmap): Change profile.  Return region start and size.
+	* bfdio.c (struct bfd_iovec): Change bmmap profile.
+	(bfd_mmap): Change profile and adjust.   Update comment.
+	(memory_bmmap): Change profile.
+	* opncls.c (opncls_bmmap): Change profile.
+	* vms-lib.c (vms_lib_bmmap): Likewise.
+	* libbfd.h: Regenerate.
+	* bfd-in2.h: Regenerate.
+
+2011-06-27  Tristan Gingold  <gingold@adacore.com>
+
+	* vms-misc.c (vms_time_to_time_t): Adjust overflow detection.
+	Add comment.
+
+2011-06-25  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c (elf_backend_post_process_headers): Don't
+	define for FreeBSD/x86-64 nor FreeBSD/L1OM.  Define for L1OM.
+
+2011-06-25  Jan Kratochvil  <jan.kratochvil@redhat.com>
+
+	* elf64-x86-64.c (elf_x86_64_link_hash_table_create): Initialize
+	PLT_EH_FRAME.
+	* elf32-i386.c (elf_i386_link_hash_table): Likewise.
+
+2011-06-24  Richard Henderson  <rth@redhat.com>
+
+	PR ld/12928
+	* elf64-alpha.c (elf64_alpha_relax_tls_get_addr): Recover the
+	tlsgd insn before swapping adjacent insns.
+
+2011-06-24  Tristan Gingold  <gingold@adacore.com>
+
+	* vms-alpha.c (alpha_vms_slurp_relocs): Add a guard for relocs in the
+	absolute section.
+
+2011-06-24  Alan Modra  <amodra@gmail.com>
+
+	PR ld/12921
+	* elf.c (assign_file_positions_for_load_sections): Don't align
+	sh_offset for all SHT_NOBITS sections here, just .tbss sections
+	that don't get a PT_LOAD.
+
+2011-06-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
+
+	* elf32-sh.c (sh_elf_relocate_section): Allow R_SH_TLS_LE_32 for PIE.
+	(sh_elf_check_relocs): Likewise.
+
+2011-06-22  Richard Henderson  <rth@redhat.com>
+
+	* elf64-alpha.c (elf64_alpha_check_relocs): No dynamic reloc for
+	TPREL in a PIE image.
+	(alpha_dynamic_entries_for_reloc): Likewise.
+	(elf64_alpha_relocate_section): Allow TPREL in PIE images.
+	(elf64_alpha_relax_got_load): Likewise.
+
+2011-06-22  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>
+
+	* elf32-arm.c (elf32_arm_final_link_relocate): Allow R_ARM_TLS_LE32
+	for PIE.
+
+2011-06-22  Alan Modra  <amodra@gmail.com>
+
+	* elflink.c (_bfd_elf_merge_symbol): Allow type changes for
+	plugin symbols.  Fix segfault on linker scrip defined syms.
+
+2011-06-20  Jakub Jelinek  <jakub@redhat.com>
+
+	PR ld/12570
+	* elf-eh-frame.c (_bfd_elf_parse_eh_frame): Allow no relocations
+	at all for linker created .eh_frame sections.
+	(_bfd_elf_discard_section_eh_frame): Handle linker created
+	.eh_frame sections with no relocations.
+	* elf64-x86-64.c: Include dwarf2.h.
+	(elf_x86_64_eh_frame_plt): New variable.
+	(PLT_CIE_LENGTH, PLT_FDE_LENGTH, PLT_FDE_START_OFFSET,
+	PLT_FDE_LEN_OFFSET): Define.
+	(struct elf_x86_64_link_hash_table): Add plt_eh_frame field.
+	(elf_x86_64_create_dynamic_sections): Create and fill in
+	.eh_frame section for .plt section.
+	(elf_x86_64_size_dynamic_sections): Write .plt section size
+	into .eh_frame FDE covering .plt section.
+	(elf_x86_64_finish_dynamic_sections): Write .plt section
+	start into .eh_frame FDE covering .plt section.  Call
+	_bfd_elf_write_section_eh_frame on htab->plt_eh_frame section.
+	(elf_backend_plt_alignment): Define to 4.
+	* elf32-i386.c: Include dwarf2.h.
+	(elf_i386_eh_frame_plt): New variable.
+	(PLT_CIE_LENGTH, PLT_FDE_LENGTH, PLT_FDE_START_OFFSET,
+	PLT_FDE_LEN_OFFSET): Define.
+	(struct elf_i386_link_hash_table): Add plt_eh_frame field.
+	(elf_i386_create_dynamic_sections): Create and fill in
+	.eh_frame section for .plt section.
+	(elf_i386_size_dynamic_sections): Write .plt section size
+	into .eh_frame FDE covering .plt section.
+	(elf_i386_finish_dynamic_sections): Write .plt section
+	start into .eh_frame FDE covering .plt section.  Call
+	_bfd_elf_write_section_eh_frame on htab->plt_eh_frame section.
+	(elf_backend_plt_alignment): Define to 4.
+
+2011-06-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c (elf_backend_post_process_headers): Defined
+	for x32.
+
+2011-06-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c: Include <stdarg.h> and CORE_HEADER if
+	CORE_HEADER is defined.
+	(elf_x86_64_write_core_note): New.
+	(elf_backend_write_core_note): Likewise.
+
+	* hosts/x86-64linux.h (uint64_t): New.
+	(user_regsx32_struct): Likewise.
+	(elf_gregx32_t): Likewise.
+	(ELF_NGREGX32): Likewise.
+	(elf_gregsetx32_t): Likewise.
+	(elf_prstatusx32): Likewise.
+	(prstatusx32_t): Likewise.
+	(user_fpregs32_struct): Removed.
+	(user_fpxregs32_struct): Likewise.
+	(user32): Likewise.
+	(elf_fpregset32_t): Likewise.
+	(elf_fpxregset32_t): Likewise.
+	(prgregset32_t): Likewise.
+	(prfpregset32_t): Likewise.
+
+2011-06-16  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* elf64-x86-64.c (elf_x86_64_grok_prstatus): Support x32.
+	(elf_x86_64_grok_psinfo): Likewise.
+
+2011-06-16  Nick Clifton  <nickc@redhat.com>
+
+	* elf.c (elf_find_function): Fail if not provided with a symbol
+	table.
+
+2011-06-15  Ulrich Weigand  <ulrich.weigand@linaro.org>
+
+	* elf-bfd.h (elfcore_write_arm_vfp): Add prototype.
+	* elf.c (elfcore_grok_arm_vfp): New function.
+	(elfcore_grok_note): Call it to handle NT_ARM_VFP notes.
+	(elfcore_write_arm_vfp): New function.
+	(elfcore_write_register_note): Call it to handle .reg-arm-vfp.
+
+2011-06-14  Richard Henderson  <rth@redhat.com>
+
+	* elf64-alpha.c (elf64_alpha_copy_indirect_symbol): Rename from
+	elf64_alpha_merge_ind_symbols; adjust for the generic interface.
+	(elf64_alpha_always_size_sections): Don't call
+	elf64_alpha_merge_ind_symbols.
+	(elf_backend_copy_indirect_symbol): New.
+
+2011-06-14  Alan Modra  <amodra@gmail.com>
+
+	PR ld/12887
+	* elf-eh-frame.c (_bfd_elf_parse_eh_frame): Check sec_info_type
+	before doing anything.
+	(_bfd_elf_discard_section_eh_frame): Likewise.
+
+2011-06-14  Alan Modra  <amodra@gmail.com>
+
+	* Makefile.am: Formatting.
+	* Makefile.in: Regenerate.
+	* configure.in (bfd_elf64_tilegx_vec): Add elfxx-tilegx.lo.
+	* po/SRC-POTFILES.in: Regnerate.
+
+2011-06-14  Alan Modra  <amodra@gmail.com>
+
+	* elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Don't use PTR.
+	(allocate_dynrelocs, readonly_dynrelocs): Replace PTR with void *.
+	Don't handle warning symbols here.
+	* elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): As above.
+	(allocate_dynrelocs, readonly_dynrelocs): As above.
+
+2011-06-14  Alan Modra  <amodra@gmail.com>
+
+	PR ld/12851
+	* elflink.c (_bfd_elf_gc_mark_extra_sections): New function.
+	(elf_gc_sweep): Don't treat debug and sections like .comment
+	specially here.
+	(bfd_elf_gc_sections): Treat note sections as gc roots only when
+	not part of a group.  Always call gc_mark_extra_sections.
+	* elf-bfd.h (_bfd_elf_gc_mark_extra_sections): Declare.
+	* elfxx-target.h (elf_backend_gc_mark_extra_sections): Default to
+	_bfd_elf_gc_mark_extra_sections.
+	* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Call
+	_bfd_elf_gc_mark_extra_sections.
+	* elf32-tic6x.c (elf32_tic6x_gc_mark_extra_sections): Likewise.
+
+2011-06-13  Nick Clifton  <nickc@redhat.com>
+
+	* elf32-tilepro.c (tilepro_elf_check_relocs): Delete unused local
+	variable 'local_got_offsets'.
+	* elfxx-tilegx.c (tilegx_elf_check_relocs): Likewise.
+	(tilegx_finish_dyn): Delete unused local variable 'abi_64_p'.
+
+2011-06-13  Walter Lee  <walt@tilera.com>
+
+	* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
+	(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
+	(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
+	and elfxx-tilegx.lo.
+	(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
+	elfxx-tilegx.c.
+	(BFD64_BACKENDS): Add elf64-tilegx.lo.
+	(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
+	* Makefile.in: Regenerate.
+	* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
+	bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
+	(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
+	(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
+	bfd-in2.h: Regenerate.
+	* config.bfd: Handle tilegx-*-* and tilepro-*-*.
+	* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
+	and bfd_elf64_tilegx_vec.
+	* configure: Regenerate.
+	* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
+	TILEPRO_ELF_DATA.
+	* libbfd.h: Regenerate.
+	* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
+	RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
+	IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
+	IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
+	IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
+	IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
+	IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
+	IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
+	IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
+	IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
+	MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
+	IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
+	IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
+	IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
+	IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
+	IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
+	IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
+	Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
+	HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
+	JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
+	DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
+	SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
+	IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
+	IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
+	IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
+	IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
+	IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
+	IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
+	IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
+	IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
+	IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
+	IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
+	IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
+	IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
+	IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
+	IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
+	IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
+	IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
+	IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
+	IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
+	IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
+	IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
+	IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
+	IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
+	IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
+	IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
+	IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
+	IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
+	IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
+	TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
+	* targets.c (bfd_elf32_tilegx_vec): Declare.
+	(bfd_elf32_tilepro_vec): Declare.
+	(bfd_elf64_tilegx_vec): Declare.
+	(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
+	and bfd_elf64_tilegx_vec.
+	* cpu-tilegx.c: New file.
+	* cpu-tilepro.c: New file.
+	* elf32-tilepro.h: New file.
+	* elf32-tilepro.c: New file.
+	* elf32-tilegx.c: New file.
+	* elf32-tilegx.h: New file.
+	* elf64-tilegx.c: New file.
+	* elf64-tilegx.h: New file.
+	* elfxx-tilegx.c: New file.
+	* elfxx-tilegx.h: New file.
+
+2011-06-13  Alan Modra  <amodra@gmail.com>
+
+	* linker.c (bfd_link_hash_traverse): Follow warning symbol link.
+	(_bfd_generic_link_write_global_symbol, fix_syms): Don't handle
+	warning symbols here.
+	* elf-m10300.c (elf32_mn10300_finish_hash_table_entry): Likewise.
+	* elf32-arm.c (allocate_dynrelocs_for_symbol,
+	elf32_arm_readonly_dynrelocs): Likewise.
+	* elf32-bfin.c (bfin_discard_copies): Likewise.
+	* elf32-cris.c (elf_cris_adjust_gotplt_to_got,
+	elf_cris_discard_excess_dso_dynamics,
+	elf_cris_discard_excess_program_dynamics): Likewise.
+	* elf32-hppa.c (allocate_plt_static, allocate_dynrelocs,
+	clobber_millicode_symbols, readonly_dynrelocs): Likewise.
+	* elf32-i370.c (i370_elf_adjust_dynindx): Likewise.
+	* elf32-i386.c (elf_i386_allocate_dynrelocs,
+	elf_i386_readonly_dynrelocs): Likewise.
+	* elf32-lm32.c (allocate_dynrelocs, readonly_dynrelocs): Likewise.
+	* elf32-m32c.c (m32c_relax_plt_check, m32c_relax_plt_realloc): Likewise.
+	* elf32-m32r.c (allocate_dynrelocs, readonly_dynrelocs): Likewise.
+	* elf32-m68k.c (elf_m68k_discard_copies): Likewise.
+	* elf32-microblaze.c (allocate_dynrelocs): Likewise.
+	* elf32-ppc.c (allocate_dynrelocs, maybe_set_textrel): Likewise.
+	* elf32-s390.c (allocate_dynrelocs, readonly_dynrelocs): Likewise.
+	* elf32-score.c (score_elf_sort_hash_table_f): Likewise.
+	* elf32-score7.c (score_elf_sort_hash_table_f): Likewise.


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2011-07-13 16:59 [SCM] archer-sergiodj-lazier-debuginfo-reading: Renaming command `auto-solib-add', deprecating it, renaming some variables, adding documentation sergiodj

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