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From: jkratoch@sourceware.org
To: archer-commits@sourceware.org
Subject: [SCM] archer-jankratochvil-watchpoint3: Merge remote-tracking branch 'gdb/master' into archer-jankratochvil-watchpoint3
Date: Wed, 20 Jul 2011 22:24:00 -0000 [thread overview]
Message-ID: <20110720222433.26035.qmail@sourceware.org> (raw)
The branch, archer-jankratochvil-watchpoint3 has been updated
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- Log -----------------------------------------------------------------
commit 542da12e83373801c8f05ce2a6ebf836dd4d2b49
Merge: 831c34d 8d62a69
Author: Jan Kratochvil <jan.kratochvil@redhat.com>
Date: Thu Jul 21 00:22:01 2011 +0200
Merge remote-tracking branch 'gdb/master' into archer-jankratochvil-watchpoint3
Conflicts:
gdb/ppc-linux-nat.c
-----------------------------------------------------------------------
Summary of changes:
ChangeLog | 240 +
Makefile.def | 79 +-
Makefile.in |52559 +++++++-------------
Makefile.tpl | 4 +-
bfd/ChangeLog | 1367 +
bfd/Makefile.am | 24 +-
bfd/Makefile.in | 31 +-
bfd/aix386-core.c | 3 +-
bfd/aout-adobe.c | 4 +-
bfd/aout-arm.c | 8 +-
bfd/aout-target.h | 6 +-
bfd/aout-tic30.c | 6 +-
bfd/aoutx.h | 23 +-
bfd/archive.c | 102 +-
bfd/archures.c | 45 +-
bfd/bfd-in.h | 14 +-
bfd/bfd-in2.h | 246 +-
bfd/bfd.c | 13 +-
bfd/bfdio.c | 29 +-
bfd/binary.c | 4 +-
bfd/bout.c | 6 +-
bfd/cache.c | 31 +-
bfd/cisco-core.c | 11 +-
bfd/coff-alpha.c | 6 +-
bfd/coff-aux.c | 5 +-
bfd/coff-i386.c | 12 +-
bfd/coff-i860.c | 1 +
bfd/coff-i960.c | 4 +-
bfd/coff-ia64.c | 3 +-
bfd/coff-mcore.c | 4 +-
bfd/coff-mips.c | 8 +-
bfd/coff-or32.c | 3 +-
bfd/coff-pmac.c | 34 -
bfd/coff-ppc.c | 5 +-
bfd/coff-rs6000.c | 630 +-
bfd/coff-sh.c | 2 +
bfd/coff-stgo32.c | 32 +-
bfd/coff-tic30.c | 3 +-
bfd/coff-tic54x.c | 8 +-
bfd/coff-x86_64.c | 4 +-
bfd/coff64-rs6000.c | 374 +-
bfd/coffcode.h | 60 +-
bfd/coffgen.c | 13 +-
bfd/cofflink.c | 47 +-
bfd/compress.c | 8 +-
bfd/config.bfd | 72 +-
bfd/config.in | 12 +
bfd/configure | 170 +-
bfd/configure.com | 11 +-
bfd/configure.in | 26 +-
bfd/cpu-tilegx.c | 39 +
bfd/cpu-tilepro.c | 39 +
bfd/dwarf2.c | 3 +-
bfd/ecoff.c | 19 +-
bfd/elf-bfd.h | 50 +-
bfd/elf-eh-frame.c | 64 +-
bfd/elf-m10300.c | 21 +-
bfd/elf.c | 139 +-
bfd/elf32-arm.c | 103 +-
bfd/elf32-avr.c | 51 +-
bfd/elf32-bfin.c | 3 -
bfd/elf32-cris.c | 11 +-
bfd/elf32-frv.c | 185 +-
bfd/elf32-hppa.c | 39 +-
bfd/elf32-i370.c | 7 +-
bfd/elf32-i386.c | 146 +-
bfd/elf32-lm32.c | 11 +-
bfd/elf32-m32c.c | 8 +-
bfd/elf32-m32r.c | 11 +-
bfd/elf32-m68hc1x.c | 4 +-
bfd/elf32-m68k.c | 6 +-
bfd/elf32-mcore.c | 4 +-
bfd/elf32-mep.c | 2 +-
bfd/elf32-microblaze.c | 10 +-
bfd/elf32-mt.c | 4 +-
bfd/elf32-ppc.c | 190 +-
bfd/elf32-rx.c | 122 +-
bfd/elf32-s390.c | 13 +-
bfd/elf32-score.c | 6 +-
bfd/elf32-score7.c | 5 +-
bfd/elf32-sh.c | 15 +-
bfd/elf32-sparc.c | 5 +-
bfd/elf32-tic6x.c | 2942 +-
bfd/elf32-tic6x.h | 11 +-
bfd/elf32-tilegx.c | 132 +
bfd/elf32-tilegx.h | 38 +
bfd/elf32-tilepro.c | 3604 ++
bfd/elf32-tilepro.h | 38 +
bfd/elf32-vax.c | 6 +-
bfd/elf32-xstormy16.c | 8 +-
bfd/elf32-xtensa.c | 7 +-
bfd/elf64-alpha.c | 190 +-
bfd/elf64-hppa.c | 35 +-
bfd/elf64-ppc.c | 339 +-
bfd/elf64-ppc.h | 4 +-
bfd/elf64-s390.c | 11 +-
bfd/elf64-sh64.c | 5 +-
bfd/elf64-sparc.c | 5 +-
bfd/elf64-tilegx.c | 132 +
bfd/elf64-tilegx.h | 38 +
bfd/elf64-x86-64.c | 288 +-
bfd/elfcode.h | 88 +-
bfd/elflink.c | 739 +-
bfd/elfnn-ia64.c | 5457 ++
bfd/elfxx-ia64.c | 5842 +---
bfd/elfxx-ia64.h | 34 +
bfd/elfxx-mips.c | 45 +-
bfd/elfxx-sparc.c | 12 +-
bfd/elfxx-target.h | 22 +-
bfd/elfxx-tilegx.c | 3957 ++
bfd/elfxx-tilegx.h | 97 +
bfd/format.c | 40 +-
bfd/hash.c | 76 +-
bfd/hosts/x86-64linux.h | 123 +-
bfd/hpux-core.c | 9 +-
bfd/i386linux.c | 5 +-
bfd/i386msdos.c | 4 +-
bfd/i386os9k.c | 4 +-
bfd/ieee.c | 4 +-
bfd/ihex.c | 4 +-
bfd/irix-core.c | 5 +-
bfd/libbfd-in.h | 24 +-
bfd/libbfd.c | 25 +-
bfd/libbfd.h | 209 +-
bfd/libcoff-in.h | 5 +-
bfd/libcoff.h | 5 +-
bfd/libxcoff.h | 22 +
bfd/linker.c | 257 +-
bfd/m68klinux.c | 6 +-
bfd/mach-o-target.c | 4 +-
bfd/mach-o.c | 1 +
bfd/mach-o.h | 305 +-
bfd/makefile.vms | 10 +-
bfd/mipsbsd.c | 4 +-
bfd/mmo.c | 4 +-
bfd/netbsd.h | 6 +-
bfd/nlm-target.h | 5 +-
bfd/nlmcode.h | 4 +-
bfd/oasys.c | 4 +-
bfd/opncls.c | 6 +-
bfd/osf-core.c | 9 +-
bfd/pdp11.c | 20 +-
bfd/pe-mips.c | 3 +-
bfd/peXXigen.c | 22 +-
bfd/pef.c | 3 +
bfd/plugin.c | 4 +-
bfd/po/SRC-POTFILES.in | 9 +-
bfd/po/bfd.pot | 2116 +-
bfd/po/da.po | 6502 ++-
bfd/ppcboot.c | 4 +-
bfd/reloc.c | 376 +-
bfd/sco5-core.c | 10 +-
bfd/section.c | 18 +-
bfd/simple.c | 7 +-
bfd/som.c | 2 +
bfd/sparclinux.c | 6 +-
bfd/srec.c | 5 +-
bfd/sunos.c | 5 +-
bfd/targets.c | 29 +-
bfd/tekhex.c | 4 +-
bfd/trad-core.c | 9 +-
bfd/verilog.c | 3 +-
bfd/versados.c | 4 +-
bfd/version.h | 2 +-
bfd/vms-alpha.c | 124 +-
bfd/vms-lib.c | 15 +-
bfd/vms-misc.c | 16 +-
bfd/xcoff-target.h | 194 -
bfd/xcofflink.c | 54 +-
bfd/xsym.c | 4 +-
config.guess | 12 +-
config.sub | 18 +-
config/ChangeLog | 8 +
config/bootstrap-lto.mk | 5 +-
config/elf.m4 | 4 +-
configure | 780 +-
configure.ac | 776 +-
gdb/.gitignore | 17 +
gdb/ChangeLog | 3366 ++-
gdb/ChangeLog-2003 | 2 +-
gdb/MAINTAINERS | 32 +-
gdb/Makefile.in | 54 +-
gdb/NEWS | 76 +-
gdb/README | 2 +-
gdb/ada-exp.y | 6 +-
gdb/ada-lang.c | 788 +-
gdb/ada-lang.h | 13 -
gdb/ada-tasks.c | 253 +-
gdb/ada-typeprint.c | 105 +-
gdb/ada-valprint.c | 5 +-
gdb/alpha-nat.c | 9 +
gdb/alpha-tdep.c | 11 +-
gdb/amd64-tdep.c | 9 +-
gdb/amd64-tdep.h | 2 +-
gdb/annotate.c | 4 +-
gdb/arm-linux-nat.c | 20 -
gdb/arm-linux-tdep.c | 148 +-
gdb/arm-linux-tdep.h | 9 +
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sim/testsuite/sim/bfin/c_brcc_bp3.s | 47 +
sim/testsuite/sim/bfin/c_brcc_bp4.s | 46 +
sim/testsuite/sim/bfin/c_brcc_brf_bp.s | 46 +
sim/testsuite/sim/bfin/c_brcc_brf_brt_bp.s | 47 +
sim/testsuite/sim/bfin/c_brcc_brf_brt_nbp.s | 46 +
sim/testsuite/sim/bfin/c_brcc_brf_fbkwd.s | 46 +
sim/testsuite/sim/bfin/c_brcc_brf_nbp.s | 45 +
sim/testsuite/sim/bfin/c_brcc_brt_bp.s | 46 +
sim/testsuite/sim/bfin/c_brcc_brt_nbp.s | 45 +
sim/testsuite/sim/bfin/c_brcc_kills_dhits.s | 136 +
sim/testsuite/sim/bfin/c_brcc_kills_dmiss.s | 137 +
sim/testsuite/sim/bfin/c_cactrl_iflush_pr.s | 102 +
sim/testsuite/sim/bfin/c_cactrl_iflush_pr_pp.s | 100 +
sim/testsuite/sim/bfin/c_calla_ljump.s | 31 +
sim/testsuite/sim/bfin/c_calla_subr.s | 28 +
sim/testsuite/sim/bfin/c_cc2dreg.s | 56 +
sim/testsuite/sim/bfin/c_cc2stat_cc_ac.S | 240 +
sim/testsuite/sim/bfin/c_cc2stat_cc_an.s | 243 +
sim/testsuite/sim/bfin/c_cc2stat_cc_aq.s | 243 +
sim/testsuite/sim/bfin/c_cc2stat_cc_av0.S | 241 +
sim/testsuite/sim/bfin/c_cc2stat_cc_av1.S | 240 +
sim/testsuite/sim/bfin/c_cc2stat_cc_az.s | 243 +
sim/testsuite/sim/bfin/c_cc_flag_ccmv_depend.S | 80 +
sim/testsuite/sim/bfin/c_cc_flagdreg_mvbrsft.s | 87 +
sim/testsuite/sim/bfin/c_cc_flagdreg_mvbrsft_s1.s | 99 +
sim/testsuite/sim/bfin/c_cc_flagdreg_mvbrsft_sn.s | 118 +
sim/testsuite/sim/bfin/c_cc_regmvlogi_mvbrsft.s | 83 +
sim/testsuite/sim/bfin/c_cc_regmvlogi_mvbrsft_s1.s | 98 +
sim/testsuite/sim/bfin/c_cc_regmvlogi_mvbrsft_sn.S | 127 +
sim/testsuite/sim/bfin/c_ccflag_a0a1.S | 143 +
sim/testsuite/sim/bfin/c_ccflag_dr_dr.s | 299 +
sim/testsuite/sim/bfin/c_ccflag_dr_dr_uu.s | 299 +
sim/testsuite/sim/bfin/c_ccflag_dr_imm3.s | 224 +
sim/testsuite/sim/bfin/c_ccflag_dr_imm3_uu.s | 221 +
sim/testsuite/sim/bfin/c_ccflag_pr_imm3.s | 539 +
sim/testsuite/sim/bfin/c_ccflag_pr_imm3_uu.s | 238 +
sim/testsuite/sim/bfin/c_ccflag_pr_pr.s | 262 +
sim/testsuite/sim/bfin/c_ccflag_pr_pr_uu.s | 212 +
sim/testsuite/sim/bfin/c_ccmv_cc_dr_dr.s | 124 +
sim/testsuite/sim/bfin/c_ccmv_cc_dr_pr.s | 61 +
sim/testsuite/sim/bfin/c_ccmv_cc_pr_pr.s | 111 +
sim/testsuite/sim/bfin/c_ccmv_ncc_dr_dr.s | 123 +
sim/testsuite/sim/bfin/c_ccmv_ncc_dr_pr.s | 60 +
sim/testsuite/sim/bfin/c_ccmv_ncc_pr_pr.s | 111 +
sim/testsuite/sim/bfin/c_comp3op_dr_and_dr.s | 412 +
sim/testsuite/sim/bfin/c_comp3op_dr_minus_dr.s | 412 +
sim/testsuite/sim/bfin/c_comp3op_dr_mix.s | 237 +
sim/testsuite/sim/bfin/c_comp3op_dr_or_dr.s | 412 +
sim/testsuite/sim/bfin/c_comp3op_dr_plus_dr.s | 412 +
sim/testsuite/sim/bfin/c_comp3op_dr_xor_dr.s | 412 +
sim/testsuite/sim/bfin/c_comp3op_pr_plus_pr_sh1.s | 302 +
sim/testsuite/sim/bfin/c_comp3op_pr_plus_pr_sh2.s | 302 +
sim/testsuite/sim/bfin/c_compi2opd_dr_add_i7_n.s | 164 +
sim/testsuite/sim/bfin/c_compi2opd_dr_add_i7_p.s | 147 +
sim/testsuite/sim/bfin/c_compi2opd_dr_eq_i7_n.s | 166 +
sim/testsuite/sim/bfin/c_compi2opd_dr_eq_i7_p.s | 147 +
sim/testsuite/sim/bfin/c_compi2opd_flags.S | 600 +
sim/testsuite/sim/bfin/c_compi2opd_flags_2.S | 600 +
sim/testsuite/sim/bfin/c_compi2opp_pr_add_i7_n.s | 149 +
sim/testsuite/sim/bfin/c_compi2opp_pr_add_i7_p.s | 116 +
sim/testsuite/sim/bfin/c_compi2opp_pr_eq_i7_n.s | 161 +
sim/testsuite/sim/bfin/c_compi2opp_pr_eq_i7_p.s | 131 +
sim/testsuite/sim/bfin/c_dagmodik_lnz_imgebl.s | 290 +
sim/testsuite/sim/bfin/c_dagmodik_lnz_imltbl.s | 289 +
sim/testsuite/sim/bfin/c_dagmodik_lz_inc_dec.s | 140 +
sim/testsuite/sim/bfin/c_dagmodim_lnz_imgebl.s | 108 +
sim/testsuite/sim/bfin/c_dagmodim_lnz_imltbl.s | 109 +
sim/testsuite/sim/bfin/c_dagmodim_lz_inc_dec.s | 98 +
sim/testsuite/sim/bfin/c_dsp32alu_a0_pm_a1.s | 39 +
sim/testsuite/sim/bfin/c_dsp32alu_a0a1s.s | 82 +
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sim/testsuite/sim/bfin/c_dsp32alu_a_neg_a.s | 34 +
sim/testsuite/sim/bfin/c_dsp32alu_aa_absabs.s | 35 +
sim/testsuite/sim/bfin/c_dsp32alu_aa_negneg.s | 35 +
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sim/testsuite/sim/bfin/c_dsp32alu_absabs.s | 62 +
sim/testsuite/sim/bfin/c_dsp32alu_alhwx.s | 128 +
sim/testsuite/sim/bfin/c_dsp32alu_awx.s | 61 +
sim/testsuite/sim/bfin/c_dsp32alu_byteop1ew.s | 136 +
sim/testsuite/sim/bfin/c_dsp32alu_byteop2.s | 76 +
sim/testsuite/sim/bfin/c_dsp32alu_byteop3.s | 76 +
sim/testsuite/sim/bfin/c_dsp32alu_bytepack.s | 77 +
sim/testsuite/sim/bfin/c_dsp32alu_byteunpack.s | 113 +
sim/testsuite/sim/bfin/c_dsp32alu_disalnexcpt.s | 255 +
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sim/testsuite/sim/bfin/c_dsp32alu_maxmax.s | 261 +
sim/testsuite/sim/bfin/c_dsp32alu_min.s | 261 +
sim/testsuite/sim/bfin/c_dsp32alu_minmin.s | 261 +
sim/testsuite/sim/bfin/c_dsp32alu_mix.s | 137 +
sim/testsuite/sim/bfin/c_dsp32alu_r_lh_a0pa1.s | 75 +
sim/testsuite/sim/bfin/c_dsp32alu_r_negneg.s | 88 +
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sim/testsuite/sim/bfin/c_dsp32alu_rh_p.s | 263 +
sim/testsuite/sim/bfin/c_dsp32alu_rh_rnd12_m.s | 258 +
sim/testsuite/sim/bfin/c_dsp32alu_rh_rnd12_p.s | 262 +
sim/testsuite/sim/bfin/c_dsp32alu_rh_rnd20_m.s | 258 +
sim/testsuite/sim/bfin/c_dsp32alu_rh_rnd20_p.s | 258 +
sim/testsuite/sim/bfin/c_dsp32alu_rl_m.s | 263 +
sim/testsuite/sim/bfin/c_dsp32alu_rl_p.s | 263 +
sim/testsuite/sim/bfin/c_dsp32alu_rl_rnd12_m.s | 261 +
sim/testsuite/sim/bfin/c_dsp32alu_rl_rnd12_p.s | 262 +
sim/testsuite/sim/bfin/c_dsp32alu_rl_rnd20_m.s | 262 +
sim/testsuite/sim/bfin/c_dsp32alu_rl_rnd20_p.s | 258 +
sim/testsuite/sim/bfin/c_dsp32alu_rlh_rnd.s | 66 +
sim/testsuite/sim/bfin/c_dsp32alu_rm.s | 262 +
sim/testsuite/sim/bfin/c_dsp32alu_rmm.s | 264 +
sim/testsuite/sim/bfin/c_dsp32alu_rmp.s | 264 +
sim/testsuite/sim/bfin/c_dsp32alu_rp.s | 262 +
sim/testsuite/sim/bfin/c_dsp32alu_rpm.s | 264 +
sim/testsuite/sim/bfin/c_dsp32alu_rpp.s | 266 +
sim/testsuite/sim/bfin/c_dsp32alu_rr_lph_a1a0.s | 33 +
sim/testsuite/sim/bfin/c_dsp32alu_rrpm.s | 265 +
sim/testsuite/sim/bfin/c_dsp32alu_rrpm_aa.s | 70 +
sim/testsuite/sim/bfin/c_dsp32alu_rrpmmp.s | 263 +
sim/testsuite/sim/bfin/c_dsp32alu_rrpmmp_sft.s | 262 +
sim/testsuite/sim/bfin/c_dsp32alu_rrpmmp_sft_x.s | 261 +
sim/testsuite/sim/bfin/c_dsp32alu_rrppmm.s | 263 +
sim/testsuite/sim/bfin/c_dsp32alu_rrppmm_sft.s | 261 +
sim/testsuite/sim/bfin/c_dsp32alu_rrppmm_sft_x.s | 261 +
sim/testsuite/sim/bfin/c_dsp32alu_saa.s | 70 +
sim/testsuite/sim/bfin/c_dsp32alu_sat_aa.S | 41 +
sim/testsuite/sim/bfin/c_dsp32alu_search.s | 74 +
sim/testsuite/sim/bfin/c_dsp32alu_sgn.s | 39 +
sim/testsuite/sim/bfin/c_dsp32mac_a1a0.s | 255 +
sim/testsuite/sim/bfin/c_dsp32mac_a1a0_iuw32.s | 1014 +
sim/testsuite/sim/bfin/c_dsp32mac_a1a0_m.s | 340 +
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sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_i.s | 119 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_ih.s | 119 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_is.s | 119 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_iu.s | 119 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_m.s | 127 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_s.s | 119 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_t.s | 119 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_tu.s | 119 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a0_u.s | 119 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a1.s | 213 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_i.s | 273 +
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sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_is.s | 145 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_iu.s | 145 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_m.s | 206 +
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sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_t.s | 274 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_tu.s | 145 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a1_u.s | 170 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a1a0.s | 157 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a1a0_iutsh.s | 157 +
sim/testsuite/sim/bfin/c_dsp32mac_dr_a1a0_m.s | 157 +
sim/testsuite/sim/bfin/c_dsp32mac_mix.s | 114 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a0.s | 129 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a0_i.s | 247 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a0_is.s | 245 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a0_m.s | 129 +
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sim/testsuite/sim/bfin/c_dsp32mac_pair_a0_u.s | 245 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a1.s | 127 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_i.s | 243 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_is.s | 243 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_m.s | 127 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_s.s | 243 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a1_u.s | 243 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0.s | 152 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0_i.s | 292 +
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sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0_s.s | 306 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_a1a0_u.s | 292 +
sim/testsuite/sim/bfin/c_dsp32mac_pair_mix.s | 69 +
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sim/testsuite/sim/bfin/c_dsp32mult_dr_ih.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_is.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_iu.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_m.s | 211 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_m_i.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_m_iutsh.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_m_s.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_m_t.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_m_u.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_mix.s | 196 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_s.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_t.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_tu.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_dr_u.s | 212 +
sim/testsuite/sim/bfin/c_dsp32mult_pair.s | 179 +
sim/testsuite/sim/bfin/c_dsp32mult_pair_i.s | 179 +
sim/testsuite/sim/bfin/c_dsp32mult_pair_is.s | 179 +
sim/testsuite/sim/bfin/c_dsp32mult_pair_m.s | 178 +
sim/testsuite/sim/bfin/c_dsp32mult_pair_m_i.s | 178 +
sim/testsuite/sim/bfin/c_dsp32mult_pair_m_is.s | 178 +
sim/testsuite/sim/bfin/c_dsp32mult_pair_m_s.s | 178 +
sim/testsuite/sim/bfin/c_dsp32mult_pair_m_u.s | 178 +
sim/testsuite/sim/bfin/c_dsp32mult_pair_s.s | 180 +
sim/testsuite/sim/bfin/c_dsp32mult_pair_u.s | 179 +
sim/testsuite/sim/bfin/c_dsp32shift_a0alr.s | 211 +
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sim/testsuite/sim/bfin/c_dsp32shift_af_s.s | 186 +
sim/testsuite/sim/bfin/c_dsp32shift_ahalf_ln.s | 423 +
sim/testsuite/sim/bfin/c_dsp32shift_ahalf_ln_s.s | 423 +
sim/testsuite/sim/bfin/c_dsp32shift_ahalf_lp.s | 423 +
sim/testsuite/sim/bfin/c_dsp32shift_ahalf_lp_s.s | 423 +
sim/testsuite/sim/bfin/c_dsp32shift_ahalf_rn.s | 423 +
sim/testsuite/sim/bfin/c_dsp32shift_ahalf_rn_s.s | 424 +
sim/testsuite/sim/bfin/c_dsp32shift_ahalf_rp.s | 423 +
sim/testsuite/sim/bfin/c_dsp32shift_ahalf_rp_s.s | 423 +
sim/testsuite/sim/bfin/c_dsp32shift_ahh.s | 430 +
sim/testsuite/sim/bfin/c_dsp32shift_ahh_s.s | 430 +
sim/testsuite/sim/bfin/c_dsp32shift_align16.s | 210 +
sim/testsuite/sim/bfin/c_dsp32shift_align24.s | 210 +
sim/testsuite/sim/bfin/c_dsp32shift_align8.s | 210 +
sim/testsuite/sim/bfin/c_dsp32shift_amix.s | 142 +
sim/testsuite/sim/bfin/c_dsp32shift_bitmux.s | 486 +
sim/testsuite/sim/bfin/c_dsp32shift_bxor.s | 126 +
sim/testsuite/sim/bfin/c_dsp32shift_expadj_h.s | 214 +
sim/testsuite/sim/bfin/c_dsp32shift_expadj_l.s | 212 +
sim/testsuite/sim/bfin/c_dsp32shift_expadj_r.s | 212 +
sim/testsuite/sim/bfin/c_dsp32shift_expexp_r.s | 212 +
sim/testsuite/sim/bfin/c_dsp32shift_fdepx.s | 210 +
sim/testsuite/sim/bfin/c_dsp32shift_fextx.s | 210 +
sim/testsuite/sim/bfin/c_dsp32shift_lf.s | 422 +
sim/testsuite/sim/bfin/c_dsp32shift_lhalf_ln.s | 422 +
sim/testsuite/sim/bfin/c_dsp32shift_lhalf_lp.s | 422 +
sim/testsuite/sim/bfin/c_dsp32shift_lhalf_rn.s | 425 +
sim/testsuite/sim/bfin/c_dsp32shift_lhalf_rp.s | 423 +
sim/testsuite/sim/bfin/c_dsp32shift_lhh.s | 311 +
sim/testsuite/sim/bfin/c_dsp32shift_lmix.s | 136 +
sim/testsuite/sim/bfin/c_dsp32shift_ones.s | 214 +
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sim/testsuite/sim/bfin/c_dsp32shift_rot_mix.s | 437 +
sim/testsuite/sim/bfin/c_dsp32shift_signbits_r.s | 214 +
sim/testsuite/sim/bfin/c_dsp32shift_signbits_rh.s | 214 +
sim/testsuite/sim/bfin/c_dsp32shift_signbits_rl.s | 210 +
sim/testsuite/sim/bfin/c_dsp32shift_vmax.s | 113 +
sim/testsuite/sim/bfin/c_dsp32shift_vmaxvmax.s | 113 +
sim/testsuite/sim/bfin/c_dsp32shiftim_a0alr.s | 213 +
sim/testsuite/sim/bfin/c_dsp32shiftim_af.s | 63 +
sim/testsuite/sim/bfin/c_dsp32shiftim_af_s.s | 63 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_ln.s | 406 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_ln_s.s | 408 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_lp.s | 418 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_lp_s.s | 415 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_rn.s | 418 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_rn_s.s | 418 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_rp.s | 420 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahalf_rp_s.s | 422 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahh.s | 65 +
sim/testsuite/sim/bfin/c_dsp32shiftim_ahh_s.s | 65 +
sim/testsuite/sim/bfin/c_dsp32shiftim_amix.s | 142 +
sim/testsuite/sim/bfin/c_dsp32shiftim_lf.s | 63 +
sim/testsuite/sim/bfin/c_dsp32shiftim_lhalf_ln.s | 401 +
sim/testsuite/sim/bfin/c_dsp32shiftim_lhalf_lp.s | 418 +
sim/testsuite/sim/bfin/c_dsp32shiftim_lhalf_rn.s | 424 +
sim/testsuite/sim/bfin/c_dsp32shiftim_lhalf_rp.s | 421 +
sim/testsuite/sim/bfin/c_dsp32shiftim_lhh.s | 65 +
sim/testsuite/sim/bfin/c_dsp32shiftim_lmix.s | 138 +
sim/testsuite/sim/bfin/c_dsp32shiftim_rot.s | 62 +
sim/testsuite/sim/bfin/c_dspldst_ld_dr_i.s | 168 +
sim/testsuite/sim/bfin/c_dspldst_ld_dr_ipp.s | 348 +
sim/testsuite/sim/bfin/c_dspldst_ld_dr_ippm.s | 328 +
sim/testsuite/sim/bfin/c_dspldst_ld_drhi_i.s | 168 +
sim/testsuite/sim/bfin/c_dspldst_ld_drhi_ipp.s | 364 +
sim/testsuite/sim/bfin/c_dspldst_ld_drlo_i.s | 164 +
sim/testsuite/sim/bfin/c_dspldst_ld_drlo_ipp.s | 355 +
sim/testsuite/sim/bfin/c_dspldst_st_dr_i.s | 185 +
sim/testsuite/sim/bfin/c_dspldst_st_dr_ipp.s | 326 +
sim/testsuite/sim/bfin/c_dspldst_st_dr_ippm.s | 279 +
sim/testsuite/sim/bfin/c_dspldst_st_drhi_i.s | 161 +
sim/testsuite/sim/bfin/c_dspldst_st_drhi_ipp.s | 355 +
sim/testsuite/sim/bfin/c_dspldst_st_drlo_i.s | 163 +
sim/testsuite/sim/bfin/c_dspldst_st_drlo_ipp.s | 351 +
sim/testsuite/sim/bfin/c_except_illopcode.S | 99 +
sim/testsuite/sim/bfin/c_except_sys_sstep.S | 252 +
sim/testsuite/sim/bfin/c_except_user_mode.S | 349 +
sim/testsuite/sim/bfin/c_interr_disable.S | 323 +
sim/testsuite/sim/bfin/c_interr_disable_enable.S | 344 +
sim/testsuite/sim/bfin/c_interr_excpt.S | 290 +
sim/testsuite/sim/bfin/c_interr_loopsetup_stld.S | 224 +
sim/testsuite/sim/bfin/c_interr_nested.S | 289 +
sim/testsuite/sim/bfin/c_interr_nmi.S | 318 +
sim/testsuite/sim/bfin/c_interr_pending.S | 324 +
sim/testsuite/sim/bfin/c_interr_pending_2.S | 268 +
sim/testsuite/sim/bfin/c_interr_timer.S | 384 +
sim/testsuite/sim/bfin/c_interr_timer_reload.S | 286 +
sim/testsuite/sim/bfin/c_interr_timer_tcount.S | 242 +
sim/testsuite/sim/bfin/c_interr_timer_tscale.S | 304 +
sim/testsuite/sim/bfin/c_ldimmhalf_dreg.s | 60 +
sim/testsuite/sim/bfin/c_ldimmhalf_drhi.s | 85 +
sim/testsuite/sim/bfin/c_ldimmhalf_drlo.s | 89 +
sim/testsuite/sim/bfin/c_ldimmhalf_h_dr.s | 82 +
sim/testsuite/sim/bfin/c_ldimmhalf_h_ibml.s | 165 +
sim/testsuite/sim/bfin/c_ldimmhalf_h_pr.s | 74 +
sim/testsuite/sim/bfin/c_ldimmhalf_l_dr.s | 82 +
sim/testsuite/sim/bfin/c_ldimmhalf_l_ibml.s | 165 +
sim/testsuite/sim/bfin/c_ldimmhalf_l_pr.s | 76 +
sim/testsuite/sim/bfin/c_ldimmhalf_lz_dr.s | 81 +
sim/testsuite/sim/bfin/c_ldimmhalf_lz_ibml.s | 168 +
sim/testsuite/sim/bfin/c_ldimmhalf_lz_pr.s | 72 +
sim/testsuite/sim/bfin/c_ldimmhalf_lzhi_dr.s | 113 +
sim/testsuite/sim/bfin/c_ldimmhalf_lzhi_ibml.s | 216 +
sim/testsuite/sim/bfin/c_ldimmhalf_lzhi_pr.s | 102 +
sim/testsuite/sim/bfin/c_ldimmhalf_pibml.s | 212 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p.s | 372 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_b.s | 353 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_h.s | 351 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm.s | 417 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm_b.s | 353 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm_h.s | 330 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm_xb.s | 341 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_mm_xh.s | 355 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp.s | 371 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp_b.s | 324 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp_h.s | 350 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp_xb.s | 355 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_pp_xh.s | 333 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_ppmm_hbx.s | 656 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_xb.s | 326 +
sim/testsuite/sim/bfin/c_ldst_ld_d_p_xh.s | 354 +
sim/testsuite/sim/bfin/c_ldst_ld_p_p.s | 327 +
sim/testsuite/sim/bfin/c_ldst_ld_p_p_mm.s | 406 +
sim/testsuite/sim/bfin/c_ldst_ld_p_p_pp.s | 335 +
sim/testsuite/sim/bfin/c_ldst_st_p_d.s | 299 +
sim/testsuite/sim/bfin/c_ldst_st_p_d_b.s | 300 +
sim/testsuite/sim/bfin/c_ldst_st_p_d_h.s | 280 +
sim/testsuite/sim/bfin/c_ldst_st_p_d_mm.s | 601 +
sim/testsuite/sim/bfin/c_ldst_st_p_d_mm_b.s | 498 +
sim/testsuite/sim/bfin/c_ldst_st_p_d_mm_h.s | 554 +
sim/testsuite/sim/bfin/c_ldst_st_p_d_pp.s | 804 +
sim/testsuite/sim/bfin/c_ldst_st_p_d_pp_b.s | 455 +
sim/testsuite/sim/bfin/c_ldst_st_p_d_pp_h.s | 457 +
sim/testsuite/sim/bfin/c_ldst_st_p_p.s | 128 +
sim/testsuite/sim/bfin/c_ldst_st_p_p_mm.s | 428 +
sim/testsuite/sim/bfin/c_ldst_st_p_p_pp.s | 397 +
sim/testsuite/sim/bfin/c_ldstidxl_ld_dr_b.s | 554 +
sim/testsuite/sim/bfin/c_ldstidxl_ld_dr_h.s | 595 +
sim/testsuite/sim/bfin/c_ldstidxl_ld_dr_xb.s | 594 +
sim/testsuite/sim/bfin/c_ldstidxl_ld_dr_xh.s | 595 +
sim/testsuite/sim/bfin/c_ldstidxl_ld_dreg.s | 554 +
sim/testsuite/sim/bfin/c_ldstidxl_ld_preg.s | 672 +
sim/testsuite/sim/bfin/c_ldstidxl_st_dr_b.s | 612 +
sim/testsuite/sim/bfin/c_ldstidxl_st_dr_h.s | 609 +
sim/testsuite/sim/bfin/c_ldstidxl_st_dreg.s | 780 +
sim/testsuite/sim/bfin/c_ldstidxl_st_preg.s | 709 +
sim/testsuite/sim/bfin/c_ldstii_ld_dr_h.s | 541 +
sim/testsuite/sim/bfin/c_ldstii_ld_dr_xh.s | 541 +
sim/testsuite/sim/bfin/c_ldstii_ld_dreg.s | 540 +
sim/testsuite/sim/bfin/c_ldstii_ld_preg.s | 564 +
sim/testsuite/sim/bfin/c_ldstii_st_dr_h.s | 605 +
sim/testsuite/sim/bfin/c_ldstii_st_dreg.s | 640 +
sim/testsuite/sim/bfin/c_ldstii_st_preg.s | 603 +
sim/testsuite/sim/bfin/c_ldstiifp_ld_dreg.s | 528 +
sim/testsuite/sim/bfin/c_ldstiifp_ld_preg.s | 511 +
sim/testsuite/sim/bfin/c_ldstiifp_st_dreg.s | 641 +
sim/testsuite/sim/bfin/c_ldstiifp_st_preg.s | 618 +
sim/testsuite/sim/bfin/c_ldstpmod_ld_dr_hi.s | 411 +
sim/testsuite/sim/bfin/c_ldstpmod_ld_dr_lo.s | 410 +
sim/testsuite/sim/bfin/c_ldstpmod_ld_dreg.s | 462 +
sim/testsuite/sim/bfin/c_ldstpmod_ld_h_xh.s | 458 +
sim/testsuite/sim/bfin/c_ldstpmod_ld_lohi.s | 462 +
sim/testsuite/sim/bfin/c_ldstpmod_st_dr_hi.s | 400 +
sim/testsuite/sim/bfin/c_ldstpmod_st_dr_lo.s | 401 +
sim/testsuite/sim/bfin/c_ldstpmod_st_dreg.s | 623 +
sim/testsuite/sim/bfin/c_ldstpmod_st_lohi.s | 625 +
sim/testsuite/sim/bfin/c_linkage.s | 60 +
sim/testsuite/sim/bfin/c_logi2op_alshft_mix.s | 143 +
sim/testsuite/sim/bfin/c_logi2op_arith_shft.s | 223 +
sim/testsuite/sim/bfin/c_logi2op_bitclr.s | 92 +
sim/testsuite/sim/bfin/c_logi2op_bitset.s | 92 +
sim/testsuite/sim/bfin/c_logi2op_bittgl.s | 165 +
sim/testsuite/sim/bfin/c_logi2op_bittst.s | 583 +
sim/testsuite/sim/bfin/c_logi2op_log_l_shft.s | 222 +
.../sim/bfin/c_logi2op_log_l_shft_astat.S | 82 +
sim/testsuite/sim/bfin/c_logi2op_log_r_shft.s | 222 +
.../sim/bfin/c_logi2op_log_r_shft_astat.S | 82 +
sim/testsuite/sim/bfin/c_logi2op_nbittst.s | 584 +
sim/testsuite/sim/bfin/c_loopsetup_nested.s | 166 +
sim/testsuite/sim/bfin/c_loopsetup_nested_bot.s | 165 +
sim/testsuite/sim/bfin/c_loopsetup_nested_prelc.s | 184 +
sim/testsuite/sim/bfin/c_loopsetup_nested_top.s | 166 +
sim/testsuite/sim/bfin/c_loopsetup_overlap.s | 167 +
sim/testsuite/sim/bfin/c_loopsetup_preg_div2_lc0.s | 95 +
sim/testsuite/sim/bfin/c_loopsetup_preg_div2_lc1.s | 94 +
sim/testsuite/sim/bfin/c_loopsetup_preg_lc0.s | 95 +
sim/testsuite/sim/bfin/c_loopsetup_preg_lc1.s | 93 +
sim/testsuite/sim/bfin/c_loopsetup_preg_stld.s | 194 +
sim/testsuite/sim/bfin/c_loopsetup_prelc.s | 145 +
sim/testsuite/sim/bfin/c_loopsetup_topbotcntr.s | 110 +
sim/testsuite/sim/bfin/c_mmr_interr_ctl.s | 398 +
sim/testsuite/sim/bfin/c_mmr_loop.S | 417 +
sim/testsuite/sim/bfin/c_mmr_loop_user_except.S | 325 +
sim/testsuite/sim/bfin/c_mmr_ppop_illegal_adr.S | 307 +
sim/testsuite/sim/bfin/c_mmr_ppopm_illegal_adr.S | 308 +
sim/testsuite/sim/bfin/c_mmr_timer.S | 282 +
sim/testsuite/sim/bfin/c_mode_supervisor.S | 287 +
sim/testsuite/sim/bfin/c_mode_user.S | 338 +
sim/testsuite/sim/bfin/c_mode_user_superivsor.S | 353 +
sim/testsuite/sim/bfin/c_multi_issue_dsp_ld_ld.s | 197 +
sim/testsuite/sim/bfin/c_multi_issue_dsp_ldst_1.s | 198 +
sim/testsuite/sim/bfin/c_multi_issue_dsp_ldst_2.s | 198 +
sim/testsuite/sim/bfin/c_progctrl_call_pcpr.s | 63 +
sim/testsuite/sim/bfin/c_progctrl_call_pr.s | 32 +
sim/testsuite/sim/bfin/c_progctrl_clisti_interr.S | 330 +
sim/testsuite/sim/bfin/c_progctrl_csync_mmr.S | 280 +
sim/testsuite/sim/bfin/c_progctrl_except_rtx.S | 96 +
sim/testsuite/sim/bfin/c_progctrl_excpt.S | 261 +
sim/testsuite/sim/bfin/c_progctrl_jump_pcpr.s | 58 +
sim/testsuite/sim/bfin/c_progctrl_jump_pr.s | 56 +
sim/testsuite/sim/bfin/c_progctrl_nop.s | 55 +
sim/testsuite/sim/bfin/c_progctrl_raise_rt_i_n.S | 285 +
sim/testsuite/sim/bfin/c_progctrl_rts.s | 36 +
sim/testsuite/sim/bfin/c_ptr2op_pr_neg_pr.s | 163 +
sim/testsuite/sim/bfin/c_ptr2op_pr_sft_2_1.s | 162 +
sim/testsuite/sim/bfin/c_ptr2op_pr_shadd_1_2.s | 167 +
sim/testsuite/sim/bfin/c_pushpopmultiple_dp.s | 213 +
sim/testsuite/sim/bfin/c_pushpopmultiple_dp_pair.s | 203 +
sim/testsuite/sim/bfin/c_pushpopmultiple_dreg.s | 173 +
sim/testsuite/sim/bfin/c_pushpopmultiple_preg.s | 83 +
sim/testsuite/sim/bfin/c_regmv_acc_acc.s | 125 +
sim/testsuite/sim/bfin/c_regmv_dag_lz_dep.s | 148 +
sim/testsuite/sim/bfin/c_regmv_dr_acc_acc.s | 191 +
sim/testsuite/sim/bfin/c_regmv_dr_dep_nostall.s | 245 +
sim/testsuite/sim/bfin/c_regmv_dr_dr.s | 209 +
sim/testsuite/sim/bfin/c_regmv_dr_imlb.s | 539 +
sim/testsuite/sim/bfin/c_regmv_dr_pr.s | 107 +
sim/testsuite/sim/bfin/c_regmv_imlb_dep_nostall.s | 664 +
sim/testsuite/sim/bfin/c_regmv_imlb_dep_stall.s | 335 +
sim/testsuite/sim/bfin/c_regmv_imlb_dr.s | 313 +
sim/testsuite/sim/bfin/c_regmv_imlb_imlb.s | 925 +
sim/testsuite/sim/bfin/c_regmv_imlb_pr.s | 302 +
sim/testsuite/sim/bfin/c_regmv_pr_dep_nostall.s | 280 +
sim/testsuite/sim/bfin/c_regmv_pr_dep_stall.s | 237 +
sim/testsuite/sim/bfin/c_regmv_pr_dr.s | 147 +
sim/testsuite/sim/bfin/c_regmv_pr_imlb.s | 382 +
sim/testsuite/sim/bfin/c_regmv_pr_pr.s | 95 +
sim/testsuite/sim/bfin/c_seq_ac_raise_mv.S | 342 +
sim/testsuite/sim/bfin/c_seq_ac_raise_mv_ppop.S | 359 +
sim/testsuite/sim/bfin/c_seq_ac_regmv_pushpop.S | 359 +
sim/testsuite/sim/bfin/c_seq_dec_raise_pushpop.S | 341 +
sim/testsuite/sim/bfin/c_seq_ex1_brcc_mv_pop.S | 377 +
sim/testsuite/sim/bfin/c_seq_ex1_call_mv_pop.S | 393 +
sim/testsuite/sim/bfin/c_seq_ex1_j_mv_pop.S | 375 +
.../sim/bfin/c_seq_ex1_raise_brcc_mv_pop.S | 377 +
.../sim/bfin/c_seq_ex1_raise_call_mv_pop.S | 393 +
sim/testsuite/sim/bfin/c_seq_ex1_raise_j_mv_pop.S | 375 +
sim/testsuite/sim/bfin/c_seq_ex2_brcc_mp_mv_pop.S | 377 +
sim/testsuite/sim/bfin/c_seq_ex2_mmr_mvpop.S | 386 +
sim/testsuite/sim/bfin/c_seq_ex2_mmrj_mvpop.S | 386 +
sim/testsuite/sim/bfin/c_seq_ex2_raise_mmr_mvpop.S | 385 +
.../sim/bfin/c_seq_ex2_raise_mmrj_mvpop.S | 385 +
sim/testsuite/sim/bfin/c_seq_ex3_ls_brcc_mvp.S | 440 +
sim/testsuite/sim/bfin/c_seq_ex3_ls_mmr_mvp.S | 442 +
sim/testsuite/sim/bfin/c_seq_ex3_ls_mmrj_mvp.S | 443 +
.../sim/bfin/c_seq_ex3_raise_ls_mmrj_mvp.S | 442 +
sim/testsuite/sim/bfin/c_seq_wb_cs_lsmmrj_mvp.S | 446 +
.../sim/bfin/c_seq_wb_raisecs_lsmmrj_mvp.S | 446 +
sim/testsuite/sim/bfin/c_seq_wb_rti_lsmmrj_mvp.S | 455 +
sim/testsuite/sim/bfin/c_seq_wb_rtn_lsmmrj_mvp.S | 447 +
sim/testsuite/sim/bfin/c_seq_wb_rtx_lsmmrj_mvp.S | 466 +
sim/testsuite/sim/bfin/c_ujump.s | 52 +
sim/testsuite/sim/bfin/cc-alu.S | 126 +
sim/testsuite/sim/bfin/cc-astat-bits.s | 101 +
sim/testsuite/sim/bfin/cc0.s | 30 +
sim/testsuite/sim/bfin/cc1.s | 26 +
sim/testsuite/sim/bfin/cc5.S | 90 +
sim/testsuite/sim/bfin/cec-exact-exception.S | 54 +
sim/testsuite/sim/bfin/cec-ifetch.S | 69 +
sim/testsuite/sim/bfin/cec-multi-pending.S | 182 +
sim/testsuite/sim/bfin/cec-no-snen-reti.S | 128 +
sim/testsuite/sim/bfin/cec-non-operating-env.s | 37 +
sim/testsuite/sim/bfin/cec-raise-reti.S | 111 +
sim/testsuite/sim/bfin/cec-snen-reti.S | 122 +
sim/testsuite/sim/bfin/cec-syscfg-ssstep.S | 72 +
sim/testsuite/sim/bfin/cec-system-call.S | 64 +
sim/testsuite/sim/bfin/cir.s | 20 +
sim/testsuite/sim/bfin/cir1.s | 84 +
sim/testsuite/sim/bfin/cli-sti.s | 25 +
sim/testsuite/sim/bfin/cmpacc.s | 50 +
sim/testsuite/sim/bfin/cmpdreg.S | 40 +
sim/testsuite/sim/bfin/compare.s | 15 +
sim/testsuite/sim/bfin/conv_enc_gen.s | 101 +
sim/testsuite/sim/bfin/cycles.s | 41 +
sim/testsuite/sim/bfin/d0.s | 31 +
sim/testsuite/sim/bfin/d1.s | 17 +
sim/testsuite/sim/bfin/d2.s | 56 +
sim/testsuite/sim/bfin/dbg_brprd_ntkn_src_kill.S | 545 +
sim/testsuite/sim/bfin/dbg_brtkn_nprd_src_kill.S | 544 +
sim/testsuite/sim/bfin/dbg_jmp_src_kill.S | 543 +
sim/testsuite/sim/bfin/dbg_tr_basic.S | 272 +
sim/testsuite/sim/bfin/dbg_tr_simplejp.S | 267 +
sim/testsuite/sim/bfin/dbg_tr_tbuf0.S | 262 +
sim/testsuite/sim/bfin/dbg_tr_umode.S | 314 +
sim/testsuite/sim/bfin/disalnexcpt_implicit.S | 122 +
sim/testsuite/sim/bfin/div0.s | 37 +
sim/testsuite/sim/bfin/divq.s | 1322 +
sim/testsuite/sim/bfin/dotproduct.s | 304 +
sim/testsuite/sim/bfin/dotproduct2.s | 299 +
sim/testsuite/sim/bfin/double_prec_mult.s | 92 +
sim/testsuite/sim/bfin/dsp_a4.s | 113 +
sim/testsuite/sim/bfin/dsp_a7.s | 103 +
sim/testsuite/sim/bfin/dsp_a8.s | 80 +
sim/testsuite/sim/bfin/dsp_d0.s | 31 +
sim/testsuite/sim/bfin/dsp_d1.s | 117 +
sim/testsuite/sim/bfin/dsp_neg.S | 36 +
sim/testsuite/sim/bfin/dsp_s1.s | 85 +
sim/testsuite/sim/bfin/e0.s | 51 +
sim/testsuite/sim/bfin/edn_snafu.s | 45 +
sim/testsuite/sim/bfin/eu_dsp32mac_s.s | 38 +
sim/testsuite/sim/bfin/events.s | 44 +
sim/testsuite/sim/bfin/f221.s | 56 +
sim/testsuite/sim/bfin/fact.s | 47 +
sim/testsuite/sim/bfin/fir.s | 201 +
sim/testsuite/sim/bfin/fsm.s | 57 +
sim/testsuite/sim/bfin/greg2.s | 18 +
sim/testsuite/sim/bfin/hwloop-bits.S | 104 +
sim/testsuite/sim/bfin/hwloop-branch-in.s | 99 +
sim/testsuite/sim/bfin/hwloop-branch-out.s | 129 +
sim/testsuite/sim/bfin/hwloop-lt-bits.s | 25 +
sim/testsuite/sim/bfin/hwloop-nested.s | 33 +
sim/testsuite/sim/bfin/i0.s | 57 +
sim/testsuite/sim/bfin/iir.s | 207 +
sim/testsuite/sim/bfin/issue103.s | 34 +
sim/testsuite/sim/bfin/issue109.s | 16 +
sim/testsuite/sim/bfin/issue112.s | 38 +
sim/testsuite/sim/bfin/issue113.s | 18 +
sim/testsuite/sim/bfin/issue117.s | 19 +
sim/testsuite/sim/bfin/issue118.s | 41 +
sim/testsuite/sim/bfin/issue119.s | 26 +
sim/testsuite/sim/bfin/issue121.s | 40 +
sim/testsuite/sim/bfin/issue123.s | 20 +
sim/testsuite/sim/bfin/issue124.s | 26 +
sim/testsuite/sim/bfin/issue125.s | 75 +
sim/testsuite/sim/bfin/issue126.s | 19 +
sim/testsuite/sim/bfin/issue127.s | 35 +
sim/testsuite/sim/bfin/issue129.s | 36 +
sim/testsuite/sim/bfin/issue139.S | 108 +
sim/testsuite/sim/bfin/issue140.S | 22 +
sim/testsuite/sim/bfin/issue142.s | 34 +
sim/testsuite/sim/bfin/issue144.s | 31 +
sim/testsuite/sim/bfin/issue146.S | 32 +
sim/testsuite/sim/bfin/issue175.s | 34 +
sim/testsuite/sim/bfin/issue205.s | 66 +
sim/testsuite/sim/bfin/issue257.s | 28 +
sim/testsuite/sim/bfin/issue272.S | 23 +
sim/testsuite/sim/bfin/issue83.s | 93 +
sim/testsuite/sim/bfin/issue89.s | 30 +
sim/testsuite/sim/bfin/l0.s | 137 +
sim/testsuite/sim/bfin/l0shift.s | 13 +
sim/testsuite/sim/bfin/l2_loop.s | 28 +
sim/testsuite/sim/bfin/link-2.s | 24 +
sim/testsuite/sim/bfin/link.s | 67 +
sim/testsuite/sim/bfin/lmu_cplb_multiple0.S | 2678 +
sim/testsuite/sim/bfin/lmu_cplb_multiple1.S | 2680 +
sim/testsuite/sim/bfin/lmu_excpt_align.S | 345 +
sim/testsuite/sim/bfin/lmu_excpt_default.S | 307 +
sim/testsuite/sim/bfin/lmu_excpt_illaddr.S | 337 +
sim/testsuite/sim/bfin/lmu_excpt_prot0.S | 392 +
sim/testsuite/sim/bfin/lmu_excpt_prot1.S | 401 +
sim/testsuite/sim/bfin/load.s | 239 +
sim/testsuite/sim/bfin/logic.s | 64 +
sim/testsuite/sim/bfin/loop_snafu.s | 28 +
sim/testsuite/sim/bfin/loop_strncpy.s | 76 +
sim/testsuite/sim/bfin/lp0.s | 17 +
sim/testsuite/sim/bfin/lp1.s | 16 +
sim/testsuite/sim/bfin/lsetup.s | 109 +
sim/testsuite/sim/bfin/m0boundary.s | 46 +
sim/testsuite/sim/bfin/m1.S | 58 +
sim/testsuite/sim/bfin/m10.s | 63 +
sim/testsuite/sim/bfin/m11.s | 72 +
sim/testsuite/sim/bfin/m12.s | 74 +
sim/testsuite/sim/bfin/m13.s | 93 +
sim/testsuite/sim/bfin/m14.s | 82 +
sim/testsuite/sim/bfin/m15.s | 80 +
sim/testsuite/sim/bfin/m16.s | 65 +
sim/testsuite/sim/bfin/m17.s | 74 +
sim/testsuite/sim/bfin/m2.s | 263 +
sim/testsuite/sim/bfin/m3.s | 138 +
sim/testsuite/sim/bfin/m4.s | 124 +
sim/testsuite/sim/bfin/m5.s | 153 +
sim/testsuite/sim/bfin/m6.s | 57 +
sim/testsuite/sim/bfin/m7.s | 66 +
sim/testsuite/sim/bfin/m8.s | 54 +
sim/testsuite/sim/bfin/m9.s | 91 +
sim/testsuite/sim/bfin/mac2halfreg.S | 27 +
sim/testsuite/sim/bfin/math.s | 66 +
sim/testsuite/sim/bfin/max_min_flags.s | 275 +
sim/testsuite/sim/bfin/mc_s2.s | 78 +
sim/testsuite/sim/bfin/mdma-32bit-1d-neg-count.c | 18 +
sim/testsuite/sim/bfin/mdma-32bit-1d.c | 17 +
sim/testsuite/sim/bfin/mdma-8bit-1d-neg-count.c | 18 +
sim/testsuite/sim/bfin/mdma-8bit-1d.c | 17 +
sim/testsuite/sim/bfin/mdma-skel.h | 79 +
sim/testsuite/sim/bfin/mem3.s | 42 +
sim/testsuite/sim/bfin/mmr-exception.s | 43 +
sim/testsuite/sim/bfin/move.s | 36 +
sim/testsuite/sim/bfin/msa_acp_5.10.S | 40 +
sim/testsuite/sim/bfin/msa_acp_5.12_1.S | 71 +
sim/testsuite/sim/bfin/msa_acp_5.12_2.S | 58 +
sim/testsuite/sim/bfin/msa_acp_5_10.s | 69 +
sim/testsuite/sim/bfin/mult.s | 22 +
sim/testsuite/sim/bfin/neg-2.S | 42 +
sim/testsuite/sim/bfin/neg-3.S | 42 +
sim/testsuite/sim/bfin/neg.S | 42 +
sim/testsuite/sim/bfin/nshift.s | 33 +
sim/testsuite/sim/bfin/pr.s | 81 +
sim/testsuite/sim/bfin/push-pop-multiple.s | 169 +
sim/testsuite/sim/bfin/push-pop.s | 95 +
sim/testsuite/sim/bfin/pushpopreg_1.s | 292 +
sim/testsuite/sim/bfin/quadaddsub.s | 58 +
sim/testsuite/sim/bfin/random_0001.s | 13 +
sim/testsuite/sim/bfin/random_0002.S | 25 +
sim/testsuite/sim/bfin/random_0003.S | 48 +
sim/testsuite/sim/bfin/random_0004.S | 33 +
sim/testsuite/sim/bfin/random_0005.S | 24 +
sim/testsuite/sim/bfin/random_0006.S | 23 +
sim/testsuite/sim/bfin/random_0007.S | 60 +
sim/testsuite/sim/bfin/random_0008.S | 44 +
sim/testsuite/sim/bfin/random_0009.S | 103 +
sim/testsuite/sim/bfin/random_0010.S | 78 +
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First 500 lines of diff:
diff --git a/ChangeLog b/ChangeLog
index 281c2a2..9a5f2a5 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,243 @@
+2011-07-18 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * configure: Regenerate.
+
+2011-07-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ PR target/39150
+ * configure.ac (i[3456789]86-*-solaris2*): Also accept
+ x86_64-*-solaris2.1[0-9]*.
+ * configure: Regenerate.
+
+2011-06-13 Walter Lee <walt@tilera.com>
+
+ * configure.ac (tilepro-*-*) New case.
+ (tilegx-*-*): Likewise.
+ * configure: Regenerate.
+
+2011-06-06 Nick Clifton <nickc@redhat.com>
+
+ * config.sub: Sync from upstream.
+
+2011-05-08 Doug Kwan <dougkwan@google.com>
+
+ Merge from gcc:
+
+ 2011-05-08 Doug Kwan <dougkwan@google.com>
+
+ * configure.ac: Propagate LDFLAGS_FOR_TARGET.
+ * configure: Regenerated.
+ * Makefile.tpl (LDFLAGS_FOR_TARGET): Use LDFLAGS_FOR_TARGET
+ value from configure.
+ * Makefile.in: Regenerated.
+
+2011-05-05 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac (alpha*-dec-osf*, i[[3456789]]86-*-rdos*,
+ sh*-*-pe|mips*-*-pe|arm-wince-pe, sparc-*-sunos4*, *-*-aix*,
+ *-*-beos*, *-*-chorusos, *-*-dragonfly*, *-*-freebsd*, *-*-linux*
+ | *-*-gnu* | *-*-k*bsd*-gnu | *-*-kopensolaris*-gnu, *-*-lynxos*,
+ *-*-mingw*, *-*-netbsd*, *-*-netware*, *-*-tpf*, *-*-uclinux*,
+ *-*-vxworks*): Disable newlib and libgloss in separate case
+ statement.
+ (i[[3456789]]86-*-linux*): Move logic allowing newlib to be built
+ to separate case statement.
+ (*-*-chorusos, *-*-dragonfly*, *-*-freebsd*, *-*-netbsd*,
+ *-*-netware*, *-*-tpf*, *-*-uclinux*, *-*-vxworks*,
+ alpha*-dec-osf*, alpha*-*-linux*, am33_2.0-*-linux*, sh-*-linux*,
+ sh*-*-pe|mips*-*-pe|*arm-wince-pe, arm-*-coff, arm-*-elf* |
+ arm*-*-eabi*, arm*-*-linux-gnueabi, arm*-*-symbianelf*, avr-*-*,
+ bfin-*-*, cris-*-* | crisv32-*-*, frv-*-*, i[[3456789]]86-*-coff |
+ i[[3456789]]86-*-elf, i[[3456789]]86-w64-mingw*,
+ i[[3456789]]86-*-mingw*, x86_64-*-mingw*,
+ i[[3456789]]86-*-interix*, i[[3456789]]86-*-beos*,
+ i[[3456789]]86-*-rdos*, m32r-*-*,
+ m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*, m68k-*-elf*, m68*-*-*
+ | fido-*-*, powerpc-*-aix*, powerpc-*-beos*, powerpc-*-eabi,
+ powerpc-*-eabi* | powerpcle-*-eabi* | powerpc-*-rtems*,
+ rs6000-*-lynxos*, rs6000-*-aix*, mips*-*-linux*, sparclet-*-aout*
+ | sparc86x-*-*, sparc-*-elf*, sparc64-*-elf*, sparclite-*-*,
+ sparc-*-sunos4*, sparc-*-solaris* | sparc64-*-solaris* |
+ sparcv9-*-solaris*, *-*-linux* | *-*-gnu* | *-*-k*bsd*-gnu |
+ *-*-kopensolaris*-gnu, *-*-lynxos*, *-*-*): Don't disable newlib
+ and libgloss in main case over targets. Remove most empty cases
+ in main case over targets.
+ * configure: Regenerate.
+
+2011-05-04 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac: Remove code setting special library locations for
+ hppa*64*-*-hpux11*. Remove code setting compiler for
+ sparc-sun-solaris2*.
+ * configure: Regenerate.
+
+2011-05-04 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac: Separate libgloss_dir settings from general case
+ over targets.
+ * configure: Regenerate.
+
+2011-04-28 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac (*-*-dragonfly*, *-*-freebsd*, *-*-netbsd*,
+ alpha*-dec-osf*, alpha*-*-linux*, alpha*-*-*, sh-*-linux*,
+ arm-*-elf* | arm*-*-eabi*, arm*-*-linux-gnueabi, frv-*-*): Remove
+ cases in libgcj-disabling case statement.
+ (hppa*64*-*-linux*): Set unsupported_languages instead of
+ disabling target-zlib.
+ (hppa*64*-*-*): Restrict case in libgcj-disabling case statement
+ to hppa*64*-*-hpux*.
+ (hppa*-*-*): Restrict case in libgcj-disabling case statement to
+ hppa*-*-hpux*.
+ (ia64*-*-elf*, ia64*-**-hpux*, i[[3456789]]86-*-elf,
+ i[[3456789]]86-*-linux*, *-*-cygwin*, i[[3456789]]86-*-interix*,
+ i[[3456789]]86-*-solaris2*, m32r-*-*, m68k-*-elf*, m68*-*-* |
+ fido-*-*, powerpc-*-eabi, powerpc-*-eabi* | powerpcle-*-eabi* |
+ powerpc-*-rtems*, mips*-*-linux*, mips*-*-*, sh-*-* | sh64-*-*,
+ sparc-*-elf*, sparc64-*-elf*, sparc-*-solaris* |
+ sparc64-*-solaris* | sparcv9-*-solaris*, *-*-linux* | *-*-gnu* |
+ *-*-k*bsd*-gnu | *-*-kopensolaris*-gnu, *-*-*): Remove cases in
+ libgcj-disabling case statement.
+ * configure: Regenerate.
+
+2011-04-28 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac: Disable Java for targets not supporting libffi.
+ (*-*-chorusos, *-*-kaos*, am33_2.0-*-linux*, sh*-*-pe|mips*-*-pe):
+ Remove cases in Java-disabling statement.
+ (*arm-wince-pe): Change to arm-wince-pe.
+ (arc-*-*, arm-*-coff, arm-*-pe*, arm-*-riscix*, avr-*-*): Remove
+ cases in Java-disabling statement.
+ (bfin-*-*): Don't disable Java again.
+ (c4x-*-* | tic4x-*-*, tic54x-*-*, cr16-*-*, d10v-*-*, d30v-*-*,
+ fr30-*-elf*, moxie-*-*, h8300*-*-*, h8500-*-*, hppa1.1-*-osf* |
+ hppa1.1-*-bsd*, hppa*-*-*elf* | hppa*-*-lites* | hppa*-*-openbsd*,
+ hppa*-*-pro*, i960-*-*, i[[3456789]]86-*-coff,
+ i[[3456789]]86-*-pe, i[[3456789]]86-*-sco3.2v5*,
+ i[[3456789]]86-*-sco*, i[[3456789]]86-*-sysv4*,
+ i[[3456789]]86-*-beos*, i[[3456789]]86-*-rdos*,
+ m68hc11-*-*|m6811-*-*|m68hc12-*-*|m6812-*-*): Remove cases in
+ Java-disabling statement.
+ (mmix-*-*): Don't disable Java again.
+ (mt-*-*, powerpc*-*-winnt* | powerpc*-*-pe*, powerpcle-*-solaris*,
+ powerpc-*-beos*, rs6000-*-lynxos*, rs6000-*-*, m68k-apollo-*,
+ microblaze*, mips*-sde-elf*, mips*-*-irix5*, mips*-*-bsd*,
+ sparclet-*-aout* | sparc86x-*-*, sparclite-*-*, sparc-*-sunos4*,
+ tic6x-*-*, v810-*-*, vax-*-*): Remove cases in Java-disabling
+ statement.
+ * configure: Regenerate.
+
+2011-04-28 Joseph Myers <joseph@codesourcery.com>
+
+ Merge from GCC:
+
+ 2011-04-18 Jack Howarth <howarth@bromo.med.uc.edu>
+
+ PR lto/48086
+ * configure.ac: Re-enable LTO on *-apple-darwin9*.
+ * configure: Regenerate.
+
+2011-04-28 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac: Separate cases disabling Java and Java libraries
+ from general case over targets.
+ * configure: Regenerate.
+
+2011-04-06 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac (build_tools): Remove build-byacc.
+ (host_libs): Remove mmalloc.
+ (host_tools): Remove byacc make patch prms send-pr ash bash bzip2
+ autoconf automake libtool diff rcs fileutils shellutils time
+ textutils wdiff find uudecode hello tar gzip indent recode release
+ sed perl gawk findutils gettext zip.
+ (libgcj): Remove target-qthreads.
+ (target_tools): Remove target-examples target-gperf.
+ (YACC): Don't handle building byacc.
+ * configure: Regenerate.
+ * Makefile.def (ash, autoconf, automake, bash, byacc, bzip2, diff,
+ dosutils, examples, fileutils, find, findutils, gawk, gettext,
+ gnuserv, gperf, gzip, hello, indent, libtool, make, mmalloc,
+ patch, perl, prms, qthreads, rcs, recode, release, sed, send-pr,
+ shellutils, tar, textutils, time, uudecode, wdiff, zip): Don't
+ handle building components.
+ * Makefile.in: Regenerate.
+
+2011-04-05 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * config.sub: Sync from upstream.
+
+2011-04-01 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac (avr-*-*): Add comment about why libssp is disabled.
+ (microblaze*): Don't disable libssp.
+ * configure: Regenerate.
+
+2011-04-01 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac: Remove code setting CONFIG_SHELL, config_shell and
+ moveifchange.
+ * configure: Regenerate.
+ * Makefile.tpl: Use @SHELL@ not @config_shell@.
+ * Makefile.in: Regenerate.
+
+2011-04-01 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac (*-*-sysv4*): Don't enable libgomp.
+ (alpha*-*-*vms*, i[[34567]]86-*-sco3.2v5*, mn10300-*-*,
+ powerpc-*-chorusos*, powerpc*-*-eabi*, powerpc*-*-sysv*,
+ powerpc*-*-kaos*, s390x-ibm-tpf*, sparc64-*-elf*, v850*-*-*,
+ xtensa*-*-elf*, *-*-beos*, *-*-elf*, *-*-netware*, *-*-rtems*,
+ *-*-sysv[[45]]*, *-*-vxworks*, *-wrs-windiss): Remove
+ md_exec_prefix cases.
+ * configure: Regenerate.
+
+2011-04-01 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac: Separate cases disabling target-libssp,
+ target-libiberty, target-libstdc++-v3 and Fortran from general
+ case over targets.
+ * configure: Regenerate.
+
+2011-04-01 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac (*-*-chorusos): Don't disable libgcj.
+ (*-*-freebsd[[12]] | *-*-freebsd[[12]].* | *-*-freebsd*aout*):
+ Remove case.
+ (*-*-kaos*): Don't disable GCC libraries, zlib or fastjar.
+ (arm-*-coff): Don't disable libgcj.
+ (arm*-*-linux-gnueabi): Remove useless assignment.
+ (arm-*-riscix*): Don't disable libgcj.
+ (bfin-*-*): Don't enable target-bsp and target-cygmon depending on
+ configuration.
+ (c4x-*-* | tic4x-*-*): Don't disable GCC libraries.
+ (c54x*-*-*): Remove case.
+ (tic54x-*-*): Don't disable GCC or GCC libraries.
+ (cris-*-* | crisv32-*-*): Don't handle *-*-aout. Change *-*-elf
+ to *.
+ (d10v-*-*): Don't disable GCC libraries.
+ (d30v-*-*): Don't disable libgcj.
+ (h8500-*-*): Don't disable GCC libraries.
+ (i960-*-*): Don't disable libgcj.
+ (i[[3456789]]86-*-linux*): Don't handle *-*-*libc1*.
+ (i[[3456789]]86-*-sco3.2v5*, i[[3456789]]86-*-sco*,
+ i[[3456789]]86-*-sysv4*, i[[3456789]]86-*-beos*): Don't disable
+ libgcj.
+ (m68k-*-coff*): Remove case.
+ (mmix-*-*): Don't disable libgloss on host.
+ (mn10200-*-*, mn10300-*-*): Remove cases.
+ (powerpc*-*-winnt* | powerpc*-*-pe*, powerpcle-*-solaris*,
+ powerpc-*-beos*, m68k-apollo-*, mips*-*-irix5*, mips*-*-bsd*):
+ Don't disable libgcj.
+ (romp-*-*): Remove case.
+ (sparclite-*-*, sparc-*-sunos4*): Don't disable libgcj.
+ (sparc-*-solaris2.[[0-6]] | sparc-*-solaris2.[[0-6]].*): Remove
+ case.
+ (v810-*-*): Don't disable GCC libraries.
+ (v850*-*-*, vax-*-vms, xtensa*-*-*): Remove cases.
+ (ip2k-*-*): Don't disable GCC libraries.
+ * configure: Regenerate.
+
2011-03-28 Joseph Myers <joseph@codesourcery.com>
* configure.ac (i[[3456789]]86-*-msdosdjgpp*): Don't disable
diff --git a/Makefile.def b/Makefile.def
index d52466d..f499180 100644
--- a/Makefile.def
+++ b/Makefile.def
@@ -4,7 +4,7 @@ AutoGen definitions Makefile.tpl;
// Makefile.in is generated from Makefile.tpl by 'autogen Makefile.def'.
// This file was originally written by Nathanael Nerode.
//
-// Copyright 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+// Copyright 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
// Free Software Foundation
//
// This file is free software; you can redistribute it and/or modify
@@ -27,39 +27,25 @@ AutoGen definitions Makefile.tpl;
build_modules= { module= libiberty; };
build_modules= { module= bison; };
-build_modules= { module= byacc; };
build_modules= { module= flex; };
build_modules= { module= m4; };
build_modules= { module= texinfo; };
build_modules= { module= fixincludes; };
-host_modules= { module= ash; };
-host_modules= { module= autoconf; };
-host_modules= { module= automake; };
-host_modules= { module= bash; };
host_modules= { module= bfd; lib_path=.libs; bootstrap=true; };
host_modules= { module= opcodes; lib_path=.libs; bootstrap=true; };
host_modules= { module= binutils; bootstrap=true; };
host_modules= { module= bison; no_check_cross= true; };
-host_modules= { module= byacc; no_check_cross= true; };
-host_modules= { module= bzip2; };
host_modules= { module= cgen; };
host_modules= { module= dejagnu; };
-host_modules= { module= diff; };
-host_modules= { module= dosutils; no_check= true; };
host_modules= { module= etc; };
host_modules= { module= fastjar; no_check_cross= true; };
-host_modules= { module= fileutils; };
-host_modules= { module= findutils; };
-host_modules= { module= find; };
host_modules= { module= fixincludes;
missing= TAGS; };
host_modules= { module= flex; no_check_cross= true; };
host_modules= { module= gas; bootstrap=true; };
host_modules= { module= gcc; bootstrap=true;
extra_make_flags="$(EXTRA_GCC_FLAGS)"; };
-host_modules= { module= gawk; };
-host_modules= { module= gettext; };
host_modules= { module= gmp; lib_path=.libs; bootstrap=true;
extra_configure_flags='--disable-shared';
no_install= true;
@@ -86,12 +72,8 @@ host_modules= { module= cloog; lib_path=.libs; bootstrap=true;
host_modules= { module= libelf; lib_path=.libs; bootstrap=true;
extra_configure_flags='--disable-shared';
no_install= true; };
-host_modules= { module= gnuserv; };
host_modules= { module= gold; bootstrap=true; };
host_modules= { module= gprof; };
-host_modules= { module= gzip; };
-host_modules= { module= hello; };
-host_modules= { module= indent; };
host_modules= { module= intl; bootstrap=true; };
host_modules= { module= tcl;
missing=mostlyclean; };
@@ -110,29 +92,11 @@ host_modules= { module= libiconv;
missing= install-pdf;
missing= install-html;
missing= install-info; };
-host_modules= { module= libtool; };
host_modules= { module= m4; };
-host_modules= { module= make; };
-host_modules= { module= mmalloc; no_check=true; };
-host_modules= { module= patch; };
-host_modules= { module= perl; };
-host_modules= { module= prms; };
-host_modules= { module= rcs; };
host_modules= { module= readline; };
-host_modules= { module= release; no_install= true; no_check= true; };
-host_modules= { module= recode; };
-host_modules= { module= sed; };
-host_modules= { module= send-pr; };
-host_modules= { module= shellutils; };
host_modules= { module= sid; };
host_modules= { module= sim; };
-host_modules= { module= tar; };
host_modules= { module= texinfo; no_install= true; };
-host_modules= { module= textutils; };
-host_modules= { module= time; };
-host_modules= { module= uudecode; };
-host_modules= { module= wdiff; };
-host_modules= { module= zip; no_check_cross=true; };
host_modules= { module= zlib; no_install=true; no_check=true; bootstrap=true; };
host_modules= { module= gdb; };
host_modules= { module= expect; };
@@ -168,13 +132,10 @@ target_modules = { module= libtermcap; no_check=true;
target_modules = { module= winsup; };
target_modules = { module= libgloss; no_check=true; };
target_modules = { module= libiberty; };
-target_modules = { module= gperf; };
-target_modules = { module= examples; no_check=true; no_install=true; };
target_modules = { module= libffi; };
target_modules = { module= libjava; raw_cxx=true; };
target_modules = { module= zlib; };
target_modules = { module= boehm-gc; };
-target_modules = { module= qthreads; };
target_modules = { module= rda; };
target_modules = { module= libada; };
target_modules = { module= libgomp; bootstrap= true; lib_path=.libs; };
@@ -311,10 +272,8 @@ flags_to_pass = { flag= LEAN ; };
// Build modules
dependencies = { module=all-build-bison; on=all-build-texinfo; };
-dependencies = { module=all-build-byacc; on=all-build-texinfo; };
dependencies = { module=all-build-flex; on=all-build-texinfo; };
dependencies = { module=all-build-flex; on=all-build-bison; };
-dependencies = { module=all-build-flex; on=all-build-byacc; };
dependencies = { module=all-build-flex; on=all-build-m4; };
dependencies = { module=all-build-libiberty; on=all-build-texinfo; };
dependencies = { module=all-build-m4; on=all-build-texinfo; };
@@ -337,7 +296,6 @@ dependencies = { module=all-gcc; on=all-ppl; };
dependencies = { module=all-gcc; on=all-cloog; };
dependencies = { module=all-gcc; on=all-build-texinfo; };
dependencies = { module=all-gcc; on=all-build-bison; };
-dependencies = { module=all-gcc; on=all-build-byacc; };
dependencies = { module=all-gcc; on=all-build-flex; };
dependencies = { module=all-gcc; on=all-build-libiberty; };
dependencies = { module=all-gcc; on=all-build-fixincludes; };
@@ -386,7 +344,6 @@ dependencies = { module=all-gdb; on=all-libiconv; };
dependencies = { module=all-gdb; on=all-opcodes; };
dependencies = { module=all-gdb; on=all-readline; };
dependencies = { module=all-gdb; on=all-build-bison; };
-dependencies = { module=all-gdb; on=all-build-byacc; };
dependencies = { module=all-gdb; on=all-sim; };
dependencies = { module=all-gdb; on=all-libdecnumber; };
dependencies = { module=all-gdb; on=all-libtermcap; };
@@ -411,7 +368,6 @@ dependencies = { module=all-binutils; on=all-opcodes; };
dependencies = { module=all-binutils; on=all-bfd; };
dependencies = { module=all-binutils; on=all-build-flex; };
dependencies = { module=all-binutils; on=all-build-bison; };
-dependencies = { module=all-binutils; on=all-build-byacc; };
dependencies = { module=all-binutils; on=all-intl; };
// We put install-opcodes before install-binutils because the installed
@@ -439,7 +395,6 @@ dependencies = { module=all-ld; on=all-libiberty; };
dependencies = { module=all-ld; on=all-bfd; };
dependencies = { module=all-ld; on=all-opcodes; };
dependencies = { module=all-ld; on=all-build-bison; };
-dependencies = { module=all-ld; on=all-build-byacc; };
dependencies = { module=all-ld; on=all-build-flex; };
dependencies = { module=all-ld; on=all-intl; };
dependencies = { module=install-ld; on=install-gold; };
@@ -449,7 +404,6 @@ dependencies = { module=all-gold; on=all-libiberty; };
dependencies = { module=all-gold; on=all-intl; };
dependencies = { module=all-gold; on=all-bfd; };
dependencies = { module=all-gold; on=all-build-bison; };
-dependencies = { module=all-gold; on=all-build-byacc; };
dependencies = { module=check-gold; on=all-binutils; };
dependencies = { module=check-gold; on=all-gas; };
@@ -503,44 +457,18 @@ dependencies = { module=all-fastjar; on=all-build-texinfo; };
dependencies = { module=all-fastjar; on=all-libiberty; };
// Warning, these are not well tested.
-dependencies = { module=all-autoconf; on=all-m4; };
-dependencies = { module=all-autoconf; on=all-build-texinfo; };
-dependencies = { module=all-automake; on=all-m4; };
-dependencies = { module=all-automake; on=all-build-texinfo; };
-dependencies = { module=all-automake; on=all-autoconf; };
dependencies = { module=all-bison; on=all-intl; };
dependencies = { module=all-bison; on=all-build-texinfo; };
-dependencies = { module=all-diff; on=all-intl; };
-dependencies = { module=all-diff; on=all-build-texinfo; };
-dependencies = { module=all-fileutils; on=all-intl; };
-dependencies = { module=all-fileutils; on=all-build-texinfo; };
dependencies = { module=all-flex; on=all-build-bison; };
-dependencies = { module=all-flex; on=all-build-byacc; };
dependencies = { module=all-flex; on=all-intl; };
dependencies = { module=all-flex; on=all-m4; };
dependencies = { module=all-flex; on=all-build-texinfo; };
-dependencies = { module=all-gzip; on=all-intl; };
-dependencies = { module=all-gzip; on=all-zlib; };
-dependencies = { module=all-gzip; on=all-build-texinfo; };
-dependencies = { module=all-hello; on=all-intl; };
-dependencies = { module=all-hello; on=all-build-texinfo; };
dependencies = { module=all-m4; on=all-intl; };
dependencies = { module=all-m4; on=all-build-texinfo; };
-dependencies = { module=all-make; on=all-intl; };
-dependencies = { module=all-make; on=all-build-texinfo; };
-dependencies = { module=all-patch; on=all-build-texinfo; };
-dependencies = { module=all-make; on=all-build-texinfo; };
-dependencies = { module=all-prms; on=all-libiberty; };
-dependencies = { module=all-recode; on=all-build-texinfo; };
-dependencies = { module=all-sed; on=all-build-texinfo; };
-dependencies = { module=all-send-pr; on=all-prms; };
-dependencies = { module=all-tar; on=all-build-texinfo; };
-dependencies = { module=all-uudecode; on=all-build-texinfo; };
// Target modules. These can also have dependencies on the language
// environment (e.g. on libstdc++). By default target modules depend
// on libgcc and newlib/libgloss.
-lang_env_dependencies = { module=gperf; cxx=true; };
lang_env_dependencies = { module=libjava; cxx=true; };
lang_env_dependencies = { module=newlib; no_c=true; };
lang_env_dependencies = { module=libgloss; no_c=true; };
@@ -550,7 +478,6 @@ lang_env_dependencies = { module=libgcc; no_gcc=true; no_c=true; };
// a dependency on libgcc for native targets to configure.
lang_env_dependencies = { module=libiberty; no_c=true; };
-dependencies = { module=configure-target-boehm-gc; on=configure-target-qthreads; };
dependencies = { module=configure-target-boehm-gc; on=all-target-libstdc++-v3; };
dependencies = { module=configure-target-fastjar; on=configure-target-zlib; };
dependencies = { module=all-target-fastjar; on=all-target-zlib; };
@@ -560,12 +487,10 @@ dependencies = { module=configure-target-libgo; on=all-target-libstdc++-v3; };
dependencies = { module=all-target-libgo; on=all-target-libffi; };
dependencies = { module=configure-target-libjava; on=configure-target-zlib; };
dependencies = { module=configure-target-libjava; on=configure-target-boehm-gc; };
-dependencies = { module=configure-target-libjava; on=configure-target-qthreads; };
dependencies = { module=configure-target-libjava; on=configure-target-libffi; };
dependencies = { module=all-target-libjava; on=all-fastjar; };
dependencies = { module=all-target-libjava; on=all-target-zlib; };
dependencies = { module=all-target-libjava; on=all-target-boehm-gc; };
-dependencies = { module=all-target-libjava; on=all-target-qthreads; };
dependencies = { module=all-target-libjava; on=all-target-libffi; };
dependencies = { module=configure-target-libobjc; on=configure-target-boehm-gc; };
dependencies = { module=all-target-libobjc; on=all-target-libiberty; };
@@ -578,11 +503,9 @@ dependencies = { module=configure-target-libstdc++-v3; on=configure-target-libgo
dependencies = { module=all-target-libstdc++-v3; on=configure-target-libgomp; };
// Target modules in the 'src' repository.
-lang_env_dependencies = { module=examples; };
lang_env_dependencies = { module=libtermcap; };
lang_env_dependencies = { module=rda; };
lang_env_dependencies = { module=winsup; };
-lang_env_dependencies = { module=qthreads; };
dependencies = { module=all-target-libgloss; on=all-target-newlib; };
dependencies = { module=all-target-winsup; on=all-target-libiberty; };
diff --git a/Makefile.in b/Makefile.in
index 128691f..944839b 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -320,7 +320,7 @@ HOST_LIBELFINC = @libelfinc@
# Programs producing files for the BUILD machine
# ----------------------------------------------
-SHELL = @config_shell@
+SHELL = @SHELL@
# pwd command to use. Allow user to override default by setting PWDCMD in
# the environment to account for automounters. The make variable must not
hooks/post-receive
--
Repository for Project Archer.
next reply other threads:[~2011-07-20 22:24 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-20 22:24 jkratoch [this message]
2011-07-22 16:50 jkratoch
2012-08-03 15:12 jkratoch
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