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* [binutils-gdb] RISC-V: Better support for long instructions (disassembler)
@ 2022-11-28  2:16 Tsukasa OI
  0 siblings, 0 replies; only message in thread
From: Tsukasa OI @ 2022-11-28  2:16 UTC (permalink / raw)
  To: bfd-cvs

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=97f006bc56afa41b3c5d4c4b0d0936aaf83b15d5

commit 97f006bc56afa41b3c5d4c4b0d0936aaf83b15d5
Author: Tsukasa OI <research_trasio@irq.a4lg.com>
Date:   Fri Nov 18 07:47:42 2022 +0000

    RISC-V: Better support for long instructions (disassembler)
    
    Commit bb996692bd96 ("RISC-V/gas: allow generating up to 176-bit
    instructions with .insn") tried to start supporting long instructions but
    it was insufficient.
    
    On the disassembler, correct ".byte" output was limited to the first 64-bits
    of an instruction.  After that, zeroes are incorrectly printed.
    
    Note that, it only happens on ".byte" output (instruction part) and not on
    hexdump (data) part.  For example, before this commit, hexdump and ".byte"
    produces different values:
    
    Assembly:
      .insn 22, 0xfedcba98765432100123456789abcdef55aa33cc607f
    objdump output example (before the fix):
      10:   607f 33cc 55aa cdef     .byte   0x7f, 0x60, 0xcc, 0x33, 0xaa, 0x55, 0xef, 0xcd, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
      18:   89ab 4567 0123 3210
      20:   7654 ba98 fedc
    
    Note that, after 0xcd (after first 64-bits of the target instruction), all
    ".byte" values are incorrectly printed as zero while hexdump prints correct
    instruction bits.
    
    To resolve this, this commit adds "packet" argument to support dumping
    instructions longer than 64-bits (to print correct instruction bits on
    ".byte").  This commit will be tested on the separate commit.
    
    Assembly:
      .insn 22, 0xfedcba98765432100123456789abcdef55aa33cc607f
    objdump output example (after the fix):
      10:   607f 33cc 55aa cdef     .byte   0x7f, 0x60, 0xcc, 0x33, 0xaa, 0x55, 0xef, 0xcd, 0xab, 0x89, 0x67, 0x45, 0x23, 0x01, 0x10, 0x32, 0x54, 0x76, 0x98, 0xba, 0xdc, 0xfe
      18:   89ab 4567 0123 3210
      20:   7654 ba98 fedc
    
    opcodes/ChangeLog:
    
            * riscv-dis.c (riscv_disassemble_insn): Print unknown instruction
            using the new argument packet.
            (riscv_disassemble_data): Add unused argument packet.
            (print_insn_riscv): Pass packet to the disassemble function.

Diff:
---
 opcodes/riscv-dis.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 3a31647a2f8..0e1f3b4610a 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -641,7 +641,10 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
    this is little-endian code.  */
 
 static int
-riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
+riscv_disassemble_insn (bfd_vma memaddr,
+			insn_t word,
+			const bfd_byte *packet,
+			disassemble_info *info)
 {
   const struct riscv_opcode *op;
   static bool init = false;
@@ -806,8 +809,7 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
 					    ", ");
 	    (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
 					  "0x%02x",
-					  (unsigned int) (word & 0xff));
-            word >>= 8;
+					  (unsigned int) (*packet++));
           }
       }
       break;
@@ -983,6 +985,7 @@ riscv_data_length (bfd_vma memaddr,
 static int
 riscv_disassemble_data (bfd_vma memaddr ATTRIBUTE_UNUSED,
 			insn_t data,
+			const bfd_byte *packet ATTRIBUTE_UNUSED,
 			disassemble_info *info)
 {
   info->display_endian = info->endian;
@@ -1037,7 +1040,8 @@ print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info)
   bfd_vma dump_size;
   int status;
   enum riscv_seg_mstate mstate;
-  int (*riscv_disassembler) (bfd_vma, insn_t, struct disassemble_info *);
+  int (*riscv_disassembler) (bfd_vma, insn_t, const bfd_byte *,
+			     struct disassemble_info *);
 
   if (info->disassembler_options != NULL)
     {
@@ -1081,7 +1085,7 @@ print_insn_riscv (bfd_vma memaddr, struct disassemble_info *info)
     }
   insn = (insn_t) bfd_get_bits (packet, dump_size * 8, false);
 
-  return (*riscv_disassembler) (memaddr, insn, info);
+  return (*riscv_disassembler) (memaddr, insn, packet, info);
 }
 
 disassembler_ftype

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