* [binutils-gdb] gas: re-work line number tracking for macros and their expansions
@ 2022-12-13 8:12 Jan Beulich
0 siblings, 0 replies; only message in thread
From: Jan Beulich @ 2022-12-13 8:12 UTC (permalink / raw)
To: bfd-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=969b9a36506bfb386f8ce30f88f1a6a6ebbaca6e
commit 969b9a36506bfb386f8ce30f88f1a6a6ebbaca6e
Author: Jan Beulich <jbeulich@suse.com>
Date: Tue Dec 13 09:11:53 2022 +0100
gas: re-work line number tracking for macros and their expansions
The PR gas/16908 workaround aimed at uniformly reporting line numbers
to reference macro invocation sites. As mentioned in a comment this may
be desirable for small macros, but often isn't for larger ones. As a
first step improve diagnostics to report both locations, while aiming at
leaving generated debug info unaltered.
Note that macro invocation context is lost for any diagnostics issued
only after all input was processed (or more generally for any use of
as_*_where(), as the functions can't know whether the passed in location
is related to [part of] the present stack of locations). To maintain the
intended workaround behavior for PR gas/16908, a new as_where() is
introduced to "look through" macro invocations, while the existing
as_where() is renamed (and used in only very few places for now). Down
the road as_where() will likely want to return a list of (file,line)
pairs.
Diff:
---
gas/as.h | 11 +
gas/input-scrub.c | 102 +-
gas/macro.c | 43 +-
gas/messages.c | 49 +-
gas/sb.h | 2 -
gas/testsuite/gas/aarch64/illegal-by-element.l | 396 +++--
gas/testsuite/gas/aarch64/illegal-ldapr.l | 36 +-
gas/testsuite/gas/aarch64/illegal-lse.l | 1648 +++++++++++++++-----
gas/testsuite/gas/aarch64/illegal-sysreg-3.l | 20 +
gas/testsuite/gas/aarch64/illegal-sysreg-8.l | 184 +++
gas/testsuite/gas/aarch64/illegal-sysreg-8b.l | 29 +
gas/testsuite/gas/aarch64/illegal.l | 900 +++++++----
gas/testsuite/gas/aarch64/sve-movprfx_23.l | 20 +
gas/testsuite/gas/aarch64/sve-movprfx_26.l | 13 +
gas/testsuite/gas/arm/armv8-2-fp16-scalar-bad.l | 702 ++++++---
gas/testsuite/gas/arm/armv8-2-fp16-simd-warning.l | 444 ++++--
gas/testsuite/gas/arm/armv8-a+rdma.l | 64 +
gas/testsuite/gas/arm/bfloat16-bad.l | 43 +
gas/testsuite/gas/arm/bfloat16-thumb-bad.l | 43 +
.../gas/arm/group-reloc-ldc-parsing-bad.l | 435 ++++--
gas/testsuite/gas/arm/mve-vabsneg-bad-1.l | 36 +-
gas/testsuite/gas/arm/mve-vabsneg-bad-2.l | 36 +-
gas/testsuite/gas/arm/mve-vaddsubabd-bad-1.l | 90 +-
gas/testsuite/gas/arm/mve-vaddsubabd-bad-2.l | 90 +-
gas/testsuite/gas/arm/mve-vhadd-vhsub-vrhadd-bad.l | 90 +-
gas/testsuite/gas/arm/mve-vldr-bad-1.l | 72 +-
gas/testsuite/gas/arm/mve-vldr-bad-2.l | 36 +-
gas/testsuite/gas/arm/mve-vldr-bad-3.l | 54 +-
gas/testsuite/gas/arm/mve-vmul-bad-2.l | 72 +-
gas/testsuite/gas/arm/mve-vqaddsub-bad.l | 72 +-
gas/testsuite/gas/arm/mve-vqdmulh-bad.l | 72 +-
gas/testsuite/gas/arm/mve-vqdmull-bad.l | 72 +-
gas/testsuite/gas/arm/mve-vqshl-bad.l | 54 +-
gas/testsuite/gas/arm/mve-vshl-bad.l | 54 +-
gas/testsuite/gas/arm/mve-vstld-bad.l | 216 ++-
gas/testsuite/gas/arm/mve-vstr-bad-1.l | 72 +-
gas/testsuite/gas/arm/mve-vstr-bad-2.l | 36 +-
gas/testsuite/gas/arm/mve-vstr-bad-3.l | 54 +-
gas/testsuite/gas/arm/neon-cond-bad.l | 66 +-
gas/testsuite/gas/arm/shift-bad-pc.l | 165 +-
gas/testsuite/gas/arm/simd_by_scalar_low_regbank.l | 144 +-
.../gas/arm/sp-pc-validations-bad-t-v8a.l | 180 ++-
gas/testsuite/gas/arm/sp-pc-validations-bad-t.l | 60 +-
gas/testsuite/gas/arm/t16-bad.l | 492 ++++--
gas/testsuite/gas/arm/thumb32.l | 50 +-
gas/testsuite/gas/elf/bad-bss.err | 62 +
gas/testsuite/gas/elf/line.l | 24 +-
gas/testsuite/gas/i386/ilp32/reloc64.l | 159 +-
gas/testsuite/gas/i386/noreg-intel64.l | 136 ++
gas/testsuite/gas/i386/noreg16.l | 115 ++
gas/testsuite/gas/i386/noreg32-data16.e | 30 +-
gas/testsuite/gas/i386/noreg32.l | 125 ++
gas/testsuite/gas/i386/noreg64-data16.e | 30 +-
gas/testsuite/gas/i386/noreg64.l | 134 ++
gas/testsuite/gas/i386/reloc32.l | 201 ++-
gas/testsuite/gas/i386/reloc64.l | 249 ++-
gas/testsuite/gas/ppc/bcaterr.l | 210 ++-
gas/testsuite/gas/ppc/bcyerr.l | 171 +-
gas/testsuite/gas/riscv/csr-version-1p10.l | 795 ++++++++++
gas/testsuite/gas/riscv/csr-version-1p11.l | 793 ++++++++++
gas/testsuite/gas/riscv/csr-version-1p12.l | 675 ++++++++
gas/testsuite/gas/riscv/csr-version-1p9p1.l | 821 ++++++++++
62 files changed, 9757 insertions(+), 2592 deletions(-)
diff --git a/gas/as.h b/gas/as.h
index 61f259f77c2..65affeb3835 100644
--- a/gas/as.h
+++ b/gas/as.h
@@ -437,6 +437,10 @@ typedef struct _pseudo_type pseudo_typeS;
#define PRINTF_WHERE_LIKE(FCN) \
void FCN (const char *file, unsigned int line, const char *format, ...) \
__attribute__ ((__format__ (__printf__, 3, 4)))
+#define PRINTF_INDENT_LIKE(FCN) \
+ void FCN (const char *file, unsigned int line, unsigned int indent, \
+ const char *format, ...) \
+ __attribute__ ((__format__ (__printf__, 4, 5)))
#else /* __GNUC__ < 2 || defined(VMS) */
@@ -444,6 +448,10 @@ typedef struct _pseudo_type pseudo_typeS;
#define PRINTF_WHERE_LIKE(FCN) void FCN (const char *file, \
unsigned int line, \
const char *format, ...)
+#define PRINTF_INDENT_LIKE(FCN) void FCN (const char *file, \
+ unsigned int line, \
+ unsigned int indent, \
+ const char *format, ...)
#endif /* __GNUC__ < 2 || defined(VMS) */
@@ -453,6 +461,7 @@ PRINTF_LIKE (as_tsktsk);
PRINTF_LIKE (as_warn);
PRINTF_WHERE_LIKE (as_bad_where);
PRINTF_WHERE_LIKE (as_warn_where);
+PRINTF_INDENT_LIKE (as_info_where);
void as_abort (const char *, int, const char *) ATTRIBUTE_NORETURN;
void signal_init (void);
@@ -487,7 +496,9 @@ void cond_finish_check (int);
void cond_exit_macro (int);
int seen_at_least_1_file (void);
void app_pop (char *);
+void as_report_context (void);
const char * as_where (unsigned int *);
+const char * as_where_top (unsigned int *);
const char * as_where_physical (unsigned int *);
void bump_line_counters (void);
void do_scrub_begin (int);
diff --git a/gas/input-scrub.c b/gas/input-scrub.c
index 650e3e38bbd..6791ef27749 100644
--- a/gas/input-scrub.c
+++ b/gas/input-scrub.c
@@ -104,6 +104,9 @@ static const char *logical_input_file;
static unsigned int physical_input_line;
static unsigned int logical_input_line;
+/* Indicator whether the origin of an update was a .linefile directive. */
+static bool is_linefile;
+
/* Struct used to save the state of the input handler during include files */
struct input_save {
char * buffer_start;
@@ -115,6 +118,7 @@ struct input_save {
const char * logical_input_file;
unsigned int physical_input_line;
unsigned int logical_input_line;
+ bool is_linefile;
size_t sb_index;
sb from_sb;
enum expansion from_sb_expansion; /* Should we do a conditional check? */
@@ -166,6 +170,7 @@ input_scrub_push (char *saved_position)
saved->logical_input_file = logical_input_file;
saved->physical_input_line = physical_input_line;
saved->logical_input_line = logical_input_line;
+ saved->is_linefile = is_linefile;
saved->sb_index = sb_index;
saved->from_sb = from_sb;
saved->from_sb_expansion = from_sb_expansion;
@@ -193,6 +198,7 @@ input_scrub_pop (struct input_save *saved)
logical_input_file = saved->logical_input_file;
physical_input_line = saved->physical_input_line;
logical_input_line = saved->logical_input_line;
+ is_linefile = saved->is_linefile;
sb_index = saved->sb_index;
from_sb = saved->from_sb;
from_sb_expansion = saved->from_sb_expansion;
@@ -267,8 +273,6 @@ input_scrub_include_sb (sb *from, char *position, enum expansion expansion)
as_fatal (_("macros nested too deeply"));
++macro_nest;
- gas_assert (expansion < expanding_nested);
-
#ifdef md_macro_start
if (expansion == expanding_macro)
{
@@ -283,8 +287,6 @@ input_scrub_include_sb (sb *from, char *position, enum expansion expansion)
expansion. */
newline = from->len >= 1 && from->ptr[0] != '\n';
sb_build (&from_sb, from->len + newline + 2 * sizeof (".linefile") + 30);
- if (expansion == expanding_repeat && from_sb_expansion >= expanding_macro)
- expansion = expanding_nested;
from_sb_expansion = expansion;
if (newline)
{
@@ -437,10 +439,7 @@ bump_line_counters (void)
if (sb_index == (size_t) -1)
++physical_input_line;
- /* PR gas/16908 workaround: Don't bump logical line numbers while
- expanding macros, unless file (and maybe line; see as_where()) are
- used inside the macro. */
- if (logical_input_line != -1u && from_sb_expansion < expanding_macro)
+ if (logical_input_line != -1u)
++logical_input_line;
}
\f
@@ -471,10 +470,6 @@ new_logical_line_flags (const char *fname, /* DON'T destroy it! We point to it!
case 1 << 3:
if (line_number < 0 || fname != NULL)
abort ();
- /* PR gas/16908 workaround: Ignore updates when nested inside a macro
- expansion. */
- if (from_sb_expansion == expanding_nested)
- return;
if (next_saved_file == NULL)
fname = physical_input_file;
else if (next_saved_file->logical_input_file)
@@ -486,6 +481,8 @@ new_logical_line_flags (const char *fname, /* DON'T destroy it! We point to it!
abort ();
}
+ is_linefile = flags != 1 && (flags != 0 || fname);
+
if (line_number >= 0)
logical_input_line = line_number;
else if (line_number == -1 && fname && !*fname && (flags & (1 << 2)))
@@ -499,15 +496,6 @@ new_logical_line_flags (const char *fname, /* DON'T destroy it! We point to it!
&& (logical_input_file == NULL
|| filename_cmp (logical_input_file, fname)))
logical_input_file = fname;
-
- /* When encountering file or line changes inside a macro, arrange for
- bump_line_counters() to henceforth increment the logical line number
- again, just like it does when expanding repeats. See as_where() for
- why changing file or line alone doesn't alter expansion mode. */
- if (from_sb_expansion == expanding_macro
- && logical_input_file != NULL
- && logical_input_line != -1u)
- from_sb_expansion = expanding_repeat;
}
void
@@ -516,6 +504,33 @@ new_logical_line (const char *fname, int line_number)
new_logical_line_flags (fname, line_number, 0);
}
+void
+as_report_context (void)
+{
+ const struct input_save *saved = next_saved_file;
+ enum expansion expansion = from_sb_expansion;
+ int indent = 1;
+
+ if (!macro_nest)
+ return;
+
+ do
+ {
+ if (expansion != expanding_macro)
+ /* Nothing. */;
+ else if (saved->logical_input_file != NULL
+ && saved->logical_input_line != -1u)
+ as_info_where (saved->logical_input_file, saved->logical_input_line,
+ indent, _("macro invoked from here"));
+ else
+ as_info_where (saved->physical_input_file, saved->physical_input_line,
+ indent, _("macro invoked from here"));
+
+ expansion = saved->from_sb_expansion;
+ ++indent;
+ }
+ while ((saved = saved->next_saved_file) != NULL);
+}
\f
/* Return the current physical input file name and line number, if known */
@@ -534,10 +549,52 @@ as_where_physical (unsigned int *linep)
return NULL;
}
-/* Return the current file name and line number. */
+/* Return the file name and line number at the top most macro
+ invocation, unless .file / .line were used inside a macro. */
const char *
as_where (unsigned int *linep)
+{
+ const char *file = as_where_top (linep);
+
+ if (macro_nest && is_linefile)
+ {
+ const struct input_save *saved = next_saved_file;
+ enum expansion expansion = from_sb_expansion;
+
+ do
+ {
+ if (!saved->is_linefile)
+ break;
+
+ if (expansion != expanding_macro)
+ /* Nothing. */;
+ else if (saved->logical_input_file != NULL
+ && (linep == NULL || saved->logical_input_line != -1u))
+ {
+ if (linep != NULL)
+ *linep = saved->logical_input_line;
+ file = saved->logical_input_file;
+ }
+ else if (saved->physical_input_file != NULL)
+ {
+ if (linep != NULL)
+ *linep = saved->physical_input_line;
+ file = saved->physical_input_file;
+ }
+
+ expansion = saved->from_sb_expansion;
+ }
+ while ((saved = saved->next_saved_file) != NULL);
+ }
+
+ return file;
+}
+
+/* Return the current file name and line number. */
+
+const char *
+as_where_top (unsigned int *linep)
{
if (logical_input_file != NULL
&& (linep == NULL || logical_input_line != -1u))
@@ -549,4 +606,3 @@ as_where (unsigned int *linep)
return as_where_physical (linep);
}
-
diff --git a/gas/macro.c b/gas/macro.c
index 3d5774ee5e1..c41b9c00421 100644
--- a/gas/macro.c
+++ b/gas/macro.c
@@ -131,23 +131,21 @@ buffer_and_nest (const char *from, const char *to, sb *ptr,
else
from_len = strlen (from);
- /* Except for macros record the present source position, such that
- diagnostics and debug info will be properly associated with the
- respective original lines, rather than with the line of the ending
- directive (TO). */
- if (from == NULL || strcasecmp (from, "MACRO") != 0)
- {
- unsigned int line;
- char *linefile;
-
- as_where (&line);
- if (!flag_m68k_mri)
- linefile = xasprintf ("\t.linefile %u .", line + 1);
- else
- linefile = xasprintf ("\tlinefile %u .", line + 1);
- sb_add_string (ptr, linefile);
- xfree (linefile);
- }
+ /* Record the present source position, such that diagnostics and debug info
+ can be properly associated with the respective original lines, rather
+ than with the line of the ending directive (TO). */
+ {
+ unsigned int line;
+ char *linefile;
+
+ as_where_top (&line);
+ if (!flag_m68k_mri)
+ linefile = xasprintf ("\t.linefile %u .", line + 1);
+ else
+ linefile = xasprintf ("\tlinefile %u .", line + 1);
+ sb_add_string (ptr, linefile);
+ xfree (linefile);
+ }
while (more)
{
@@ -249,14 +247,8 @@ buffer_and_nest (const char *from, const char *to, sb *ptr,
}
/* PR gas/16908
- Apply and discard .linefile directives that appear within
- the macro. For long macros, one might want to report the
- line number information associated with the lines within
- the macro definition, but we would need more infrastructure
- to make that happen correctly (e.g. resetting the line
- number when expanding the macro), and since for short
- macros we clearly prefer reporting the point of expansion
- anyway, there's not an obviously better fix here. */
+ Apply .linefile directives that appear within the macro, alongside
+ keeping them for later expansion of the macro. */
if (from != NULL && strcasecmp (from, "MACRO") == 0
&& len >= 8 && strncasecmp (ptr->ptr + i, "linefile", 8) == 0)
{
@@ -267,7 +259,6 @@ buffer_and_nest (const char *from, const char *to, sb *ptr,
s_linefile (0);
restore_ilp ();
ptr->ptr[ptr->len] = saved_eol_char;
- ptr->len = line_start;
}
}
diff --git a/gas/messages.c b/gas/messages.c
index e43b2dbd388..2f8c6ba2b8d 100644
--- a/gas/messages.c
+++ b/gas/messages.c
@@ -18,6 +18,7 @@
02110-1301, USA. */
#include "as.h"
+#include <limits.h>
#include <signal.h>
/* If the system doesn't provide strsignal, we get it defined in
@@ -119,7 +120,7 @@ as_show_where (void)
const char *file;
unsigned int line;
- file = as_where (&line);
+ file = as_where_top (&line);
identify (file);
if (file)
{
@@ -130,6 +131,25 @@ as_show_where (void)
}
}
+/* Send to stderr a string as information, with location data passed in.
+ Note that for now this is not intended for general use. */
+
+void
+as_info_where (const char *file, unsigned int line, unsigned int indent,
+ const char *format, ...)
+{
+ va_list args;
+ char buffer[2000];
+
+ gas_assert (file != NULL && line > 0 && indent <= INT_MAX);
+
+ va_start (args, format);
+ vsnprintf (buffer, sizeof (buffer), format, args);
+ va_end (args);
+ fprintf (stderr, "%s:%u: %*s%s%s\n",
+ file, line, (int)indent, "", _("Info: "), buffer);
+}
+
/* Send to stderr a string as a warning, and locate warning
in input file(s).
Please only use this for when we have some recovery action.
@@ -146,6 +166,7 @@ as_tsktsk (const char *format, ...)
vfprintf (stderr, format, args);
va_end (args);
(void) putc ('\n', stderr);
+ as_report_context ();
}
/* The common portion of as_warn and as_warn_where. */
@@ -153,10 +174,15 @@ as_tsktsk (const char *format, ...)
static void
as_warn_internal (const char *file, unsigned int line, char *buffer)
{
+ bool context = false;
+
++warning_count;
if (file == NULL)
- file = as_where (&line);
+ {
+ file = as_where_top (&line);
+ context = true;
+ }
identify (file);
if (file)
@@ -168,6 +194,10 @@ as_warn_internal (const char *file, unsigned int line, char *buffer)
}
else
fprintf (stderr, "%s%s\n", _("Warning: "), buffer);
+
+ if (context)
+ as_report_context ();
+
#ifndef NO_LISTING
listing_warning (buffer);
#endif
@@ -194,7 +224,7 @@ as_warn (const char *format, ...)
}
}
-/* Like as_bad but the file name and line number are passed in.
+/* Like as_warn but the file name and line number are passed in.
Unfortunately, we have to repeat the function in order to handle
the varargs correctly and portably. */
@@ -218,10 +248,15 @@ as_warn_where (const char *file, unsigned int line, const char *format, ...)
static void
as_bad_internal (const char *file, unsigned int line, char *buffer)
{
+ bool context = false;
+
++error_count;
if (file == NULL)
- file = as_where (&line);
+ {
+ file = as_where_top (&line);
+ context = true;
+ }
identify (file);
if (file)
@@ -233,6 +268,10 @@ as_bad_internal (const char *file, unsigned int line, char *buffer)
}
else
fprintf (stderr, "%s%s\n", _("Error: "), buffer);
+
+ if (context)
+ as_report_context ();
+
#ifndef NO_LISTING
listing_error (buffer);
#endif
@@ -290,6 +329,7 @@ as_fatal (const char *format, ...)
vfprintf (stderr, format, args);
(void) putc ('\n', stderr);
va_end (args);
+ as_report_context ();
/* Delete the output file, if it exists. This will prevent make from
thinking that a file was created and hence does not need rebuilding. */
if (out_file_name != NULL)
@@ -312,6 +352,7 @@ as_abort (const char *file, int line, const char *fn)
fprintf (stderr, _("Internal error in %s at %s:%d.\n"), fn, file, line);
else
fprintf (stderr, _("Internal error at %s:%d.\n"), file, line);
+ as_report_context ();
fprintf (stderr, _("Please report this bug.\n"));
diff --git a/gas/sb.h b/gas/sb.h
index 4f23b3a23a7..6d67ea44c2d 100644
--- a/gas/sb.h
+++ b/gas/sb.h
@@ -66,11 +66,9 @@ extern size_t sb_skip_comma (size_t, sb *);
/* Actually in input-scrub.c. */
enum expansion {
- /* Note: Order matters! */
expanding_none,
expanding_repeat,
expanding_macro,
- expanding_nested, /* Only for internal use of input-scrub.c. */
};
extern void input_scrub_include_sb (sb *, char *, enum expansion);
diff --git a/gas/testsuite/gas/aarch64/illegal-by-element.l b/gas/testsuite/gas/aarch64/illegal-by-element.l
index 467ccf65552..520db792edb 100644
--- a/gas/testsuite/gas/aarch64/illegal-by-element.l
+++ b/gas/testsuite/gas/aarch64/illegal-by-element.l
@@ -1,133 +1,265 @@
[^:]*: Assembler messages:
-[^:]*:18: Error: register number out of range 0 to 15 at operand 3 -- `fmla v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:18: Error: register number out of range 0 to 15 at operand 3 -- `fmla v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:18: Error: register number out of range 0 to 15 at operand 3 -- `fmla v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:19: Error: register number out of range 0 to 15 at operand 3 -- `fmlal v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:19: Error: register number out of range 0 to 15 at operand 3 -- `fmlal v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:19: Error: register number out of range 0 to 15 at operand 3 -- `fmlal v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:20: Error: register number out of range 0 to 15 at operand 3 -- `fmlal2 v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:20: Error: register number out of range 0 to 15 at operand 3 -- `fmlal2 v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:20: Error: register number out of range 0 to 15 at operand 3 -- `fmlal2 v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:21: Error: register number out of range 0 to 15 at operand 3 -- `fmls v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:21: Error: register number out of range 0 to 15 at operand 3 -- `fmls v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:21: Error: register number out of range 0 to 15 at operand 3 -- `fmls v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:22: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:22: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:22: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:23: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl2 v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:23: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl2 v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:23: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl2 v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:24: Error: register number out of range 0 to 15 at operand 3 -- `fmul v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:24: Error: register number out of range 0 to 15 at operand 3 -- `fmul v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:24: Error: register number out of range 0 to 15 at operand 3 -- `fmul v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:25: Error: register number out of range 0 to 15 at operand 3 -- `fmulx v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:25: Error: register number out of range 0 to 15 at operand 3 -- `fmulx v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:25: Error: register number out of range 0 to 15 at operand 3 -- `fmulx v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:26: Error: register number out of range 0 to 15 at operand 3 -- `mla v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:26: Error: register number out of range 0 to 15 at operand 3 -- `mla v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:26: Error: register number out of range 0 to 15 at operand 3 -- `mla v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:27: Error: register number out of range 0 to 15 at operand 3 -- `mls v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:27: Error: register number out of range 0 to 15 at operand 3 -- `mls v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:27: Error: register number out of range 0 to 15 at operand 3 -- `mls v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:28: Error: register number out of range 0 to 15 at operand 3 -- `mul v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:28: Error: register number out of range 0 to 15 at operand 3 -- `mul v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:28: Error: register number out of range 0 to 15 at operand 3 -- `mul v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:29: Error: register number out of range 0 to 15 at operand 3 -- `smlal v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:29: Error: register number out of range 0 to 15 at operand 3 -- `smlal v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:29: Error: register number out of range 0 to 15 at operand 3 -- `smlal v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:30: Error: register number out of range 0 to 15 at operand 3 -- `smlal2 v2.4s,v12.8h,v16.h\[0\]'
-[^:]*:30: Error: register number out of range 0 to 15 at operand 3 -- `smlal2 v2.4s,v12.8h,v27.h\[0\]'
-[^:]*:30: Error: register number out of range 0 to 15 at operand 3 -- `smlal2 v2.4s,v12.8h,v31.h\[0\]'
-[^:]*:31: Error: register number out of range 0 to 15 at operand 3 -- `smlsl v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:31: Error: register number out of range 0 to 15 at operand 3 -- `smlsl v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:31: Error: register number out of range 0 to 15 at operand 3 -- `smlsl v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:32: Error: register number out of range 0 to 15 at operand 3 -- `smlsl2 v2.4s,v12.8h,v16.h\[0\]'
-[^:]*:32: Error: register number out of range 0 to 15 at operand 3 -- `smlsl2 v2.4s,v12.8h,v27.h\[0\]'
-[^:]*:32: Error: register number out of range 0 to 15 at operand 3 -- `smlsl2 v2.4s,v12.8h,v31.h\[0\]'
-[^:]*:33: Error: register number out of range 0 to 15 at operand 3 -- `smull v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:33: Error: register number out of range 0 to 15 at operand 3 -- `smull v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:33: Error: register number out of range 0 to 15 at operand 3 -- `smull v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:34: Error: register number out of range 0 to 15 at operand 3 -- `smull2 v2.4s,v12.8h,v16.h\[0\]'
-[^:]*:34: Error: register number out of range 0 to 15 at operand 3 -- `smull2 v2.4s,v12.8h,v27.h\[0\]'
-[^:]*:34: Error: register number out of range 0 to 15 at operand 3 -- `smull2 v2.4s,v12.8h,v31.h\[0\]'
-[^:]*:35: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:35: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:35: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:36: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal2 v2.4s,v12.8h,v16.h\[0\]'
-[^:]*:36: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal2 v2.4s,v12.8h,v27.h\[0\]'
-[^:]*:36: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal2 v2.4s,v12.8h,v31.h\[0\]'
-[^:]*:37: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:37: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:37: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:38: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl2 v2.4s,v12.8h,v16.h\[0\]'
-[^:]*:38: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl2 v2.4s,v12.8h,v27.h\[0\]'
-[^:]*:38: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl2 v2.4s,v12.8h,v31.h\[0\]'
-[^:]*:39: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:39: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:39: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:40: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:40: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:40: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:41: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull2 v2.4s,v12.8h,v16.h\[0\]'
-[^:]*:41: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull2 v2.4s,v12.8h,v27.h\[0\]'
-[^:]*:41: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull2 v2.4s,v12.8h,v31.h\[0\]'
-[^:]*:42: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:42: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:42: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:43: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:43: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:43: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:44: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh v2.4h,v12.4h,v16.h\[0\]'
-[^:]*:44: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh v2.4h,v12.4h,v27.h\[0\]'
-[^:]*:44: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh v2.4h,v12.4h,v31.h\[0\]'
-[^:]*:45: Error: register number out of range 0 to 15 at operand 3 -- `umlal v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:45: Error: register number out of range 0 to 15 at operand 3 -- `umlal v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:45: Error: register number out of range 0 to 15 at operand 3 -- `umlal v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:46: Error: register number out of range 0 to 15 at operand 3 -- `umlal2 v2.4s,v12.8h,v16.h\[0\]'
-[^:]*:46: Error: register number out of range 0 to 15 at operand 3 -- `umlal2 v2.4s,v12.8h,v27.h\[0\]'
-[^:]*:46: Error: register number out of range 0 to 15 at operand 3 -- `umlal2 v2.4s,v12.8h,v31.h\[0\]'
-[^:]*:47: Error: register number out of range 0 to 15 at operand 3 -- `umlsl v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:47: Error: register number out of range 0 to 15 at operand 3 -- `umlsl v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:47: Error: register number out of range 0 to 15 at operand 3 -- `umlsl v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:48: Error: register number out of range 0 to 15 at operand 3 -- `umlsl2 v2.4s,v12.8h,v16.h\[0\]'
-[^:]*:48: Error: register number out of range 0 to 15 at operand 3 -- `umlsl2 v2.4s,v12.8h,v27.h\[0\]'
-[^:]*:48: Error: register number out of range 0 to 15 at operand 3 -- `umlsl2 v2.4s,v12.8h,v31.h\[0\]'
-[^:]*:49: Error: register number out of range 0 to 15 at operand 3 -- `umull v2.4s,v12.4h,v16.h\[0\]'
-[^:]*:49: Error: register number out of range 0 to 15 at operand 3 -- `umull v2.4s,v12.4h,v27.h\[0\]'
-[^:]*:49: Error: register number out of range 0 to 15 at operand 3 -- `umull v2.4s,v12.4h,v31.h\[0\]'
-[^:]*:50: Error: register number out of range 0 to 15 at operand 3 -- `umull2 v2.4s,v12.8h,v16.h\[0\]'
-[^:]*:50: Error: register number out of range 0 to 15 at operand 3 -- `umull2 v2.4s,v12.8h,v27.h\[0\]'
-[^:]*:50: Error: register number out of range 0 to 15 at operand 3 -- `umull2 v2.4s,v12.8h,v31.h\[0\]'
-[^:]*:52: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal s2,h12,v16.h\[0\]'
-[^:]*:52: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal s2,h12,v27.h\[0\]'
-[^:]*:52: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal s2,h12,v31.h\[0\]'
-[^:]*:53: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl s2,h12,v16.h\[0\]'
-[^:]*:53: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl s2,h12,v27.h\[0\]'
-[^:]*:53: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl s2,h12,v31.h\[0\]'
-[^:]*:54: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull s2,h12,v16.h\[0\]'
-[^:]*:54: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull s2,h12,v27.h\[0\]'
-[^:]*:54: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull s2,h12,v31.h\[0\]'
-[^:]*:55: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh h2,h12,v16.h\[0\]'
-[^:]*:55: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh h2,h12,v27.h\[0\]'
-[^:]*:55: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh h2,h12,v31.h\[0\]'
-[^:]*:56: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh h2,h12,v16.h\[0\]'
-[^:]*:56: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh h2,h12,v27.h\[0\]'
-[^:]*:56: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh h2,h12,v31.h\[0\]'
-[^:]*:57: Error: register number out of range 0 to 15 at operand 3 -- `fmla h2,h12,v16.h\[0\]'
-[^:]*:57: Error: register number out of range 0 to 15 at operand 3 -- `fmla h2,h12,v27.h\[0\]'
-[^:]*:57: Error: register number out of range 0 to 15 at operand 3 -- `fmla h2,h12,v31.h\[0\]'
-[^:]*:58: Error: register number out of range 0 to 15 at operand 3 -- `fmls h2,h12,v16.h\[0\]'
-[^:]*:58: Error: register number out of range 0 to 15 at operand 3 -- `fmls h2,h12,v27.h\[0\]'
-[^:]*:58: Error: register number out of range 0 to 15 at operand 3 -- `fmls h2,h12,v31.h\[0\]'
-[^:]*:59: Error: register number out of range 0 to 15 at operand 3 -- `fmul h2,h12,v16.h\[0\]'
-[^:]*:59: Error: register number out of range 0 to 15 at operand 3 -- `fmul h2,h12,v27.h\[0\]'
-[^:]*:59: Error: register number out of range 0 to 15 at operand 3 -- `fmul h2,h12,v31.h\[0\]'
-[^:]*:60: Error: register number out of range 0 to 15 at operand 3 -- `fmulx h2,h12,v16.h\[0\]'
-[^:]*:60: Error: register number out of range 0 to 15 at operand 3 -- `fmulx h2,h12,v27.h\[0\]'
-[^:]*:60: Error: register number out of range 0 to 15 at operand 3 -- `fmulx h2,h12,v31.h\[0\]'
-[^:]*:61: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah h2,h12,v16.h\[0\]'
-[^:]*:61: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah h2,h12,v27.h\[0\]'
-[^:]*:61: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah h2,h12,v31.h\[0\]'
-[^:]*:62: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh h2,h12,v16.h\[0\]'
-[^:]*:62: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh h2,h12,v27.h\[0\]'
-[^:]*:62: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh h2,h12,v31.h\[0\]'
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmla v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:18: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmla v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:18: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmla v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:18: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlal v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:19: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlal v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:19: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlal v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:19: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlal2 v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:20: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlal2 v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:20: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlal2 v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:20: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmls v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:21: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmls v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:21: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmls v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:21: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:22: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:22: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:22: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl2 v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:23: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl2 v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:23: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmlsl2 v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:23: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmul v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:24: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmul v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:24: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmul v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:24: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmulx v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:25: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmulx v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:25: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `fmulx v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:25: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `mla v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:26: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `mla v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:26: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `mla v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:26: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `mls v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:27: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `mls v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:27: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `mls v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:27: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `mul v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:28: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `mul v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:28: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `mul v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:28: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlal v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:29: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlal v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:29: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlal v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:29: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlal2 v2.4s,v12.8h,v16.h\[0\]'
+[^:]*:30: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlal2 v2.4s,v12.8h,v27.h\[0\]'
+[^:]*:30: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlal2 v2.4s,v12.8h,v31.h\[0\]'
+[^:]*:30: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlsl v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:31: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlsl v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:31: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlsl v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:31: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlsl2 v2.4s,v12.8h,v16.h\[0\]'
+[^:]*:32: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlsl2 v2.4s,v12.8h,v27.h\[0\]'
+[^:]*:32: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smlsl2 v2.4s,v12.8h,v31.h\[0\]'
+[^:]*:32: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smull v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:33: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smull v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:33: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smull v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:33: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smull2 v2.4s,v12.8h,v16.h\[0\]'
+[^:]*:34: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smull2 v2.4s,v12.8h,v27.h\[0\]'
+[^:]*:34: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `smull2 v2.4s,v12.8h,v31.h\[0\]'
+[^:]*:34: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:35: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:35: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:35: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal2 v2.4s,v12.8h,v16.h\[0\]'
+[^:]*:36: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal2 v2.4s,v12.8h,v27.h\[0\]'
+[^:]*:36: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal2 v2.4s,v12.8h,v31.h\[0\]'
+[^:]*:36: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:37: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:37: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:37: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl2 v2.4s,v12.8h,v16.h\[0\]'
+[^:]*:38: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl2 v2.4s,v12.8h,v27.h\[0\]'
+[^:]*:38: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl2 v2.4s,v12.8h,v31.h\[0\]'
+[^:]*:38: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:39: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:39: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:39: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:40: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:40: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:40: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull2 v2.4s,v12.8h,v16.h\[0\]'
+[^:]*:41: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull2 v2.4s,v12.8h,v27.h\[0\]'
+[^:]*:41: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull2 v2.4s,v12.8h,v31.h\[0\]'
+[^:]*:41: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:42: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:42: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:42: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:43: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:43: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:43: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh v2.4h,v12.4h,v16.h\[0\]'
+[^:]*:44: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh v2.4h,v12.4h,v27.h\[0\]'
+[^:]*:44: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh v2.4h,v12.4h,v31.h\[0\]'
+[^:]*:44: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlal v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:45: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlal v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:45: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlal v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:45: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlal2 v2.4s,v12.8h,v16.h\[0\]'
+[^:]*:46: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlal2 v2.4s,v12.8h,v27.h\[0\]'
+[^:]*:46: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlal2 v2.4s,v12.8h,v31.h\[0\]'
+[^:]*:46: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlsl v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:47: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlsl v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:47: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlsl v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:47: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlsl2 v2.4s,v12.8h,v16.h\[0\]'
+[^:]*:48: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlsl2 v2.4s,v12.8h,v27.h\[0\]'
+[^:]*:48: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umlsl2 v2.4s,v12.8h,v31.h\[0\]'
+[^:]*:48: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umull v2.4s,v12.4h,v16.h\[0\]'
+[^:]*:49: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umull v2.4s,v12.4h,v27.h\[0\]'
+[^:]*:49: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umull v2.4s,v12.4h,v31.h\[0\]'
+[^:]*:49: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umull2 v2.4s,v12.8h,v16.h\[0\]'
+[^:]*:50: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umull2 v2.4s,v12.8h,v27.h\[0\]'
+[^:]*:50: *Info: macro .*
+[^:]*:4: Error: register number out of range 0 to 15 at operand 3 -- `umull2 v2.4s,v12.8h,v31.h\[0\]'
+[^:]*:50: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal s2,h12,v16.h\[0\]'
+[^:]*:52: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal s2,h12,v27.h\[0\]'
+[^:]*:52: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlal s2,h12,v31.h\[0\]'
+[^:]*:52: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl s2,h12,v16.h\[0\]'
+[^:]*:53: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl s2,h12,v27.h\[0\]'
+[^:]*:53: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmlsl s2,h12,v31.h\[0\]'
+[^:]*:53: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull s2,h12,v16.h\[0\]'
+[^:]*:54: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull s2,h12,v27.h\[0\]'
+[^:]*:54: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmull s2,h12,v31.h\[0\]'
+[^:]*:54: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh h2,h12,v16.h\[0\]'
+[^:]*:55: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh h2,h12,v27.h\[0\]'
+[^:]*:55: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh h2,h12,v31.h\[0\]'
+[^:]*:55: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh h2,h12,v16.h\[0\]'
+[^:]*:56: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh h2,h12,v27.h\[0\]'
+[^:]*:56: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmulh h2,h12,v31.h\[0\]'
+[^:]*:56: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmla h2,h12,v16.h\[0\]'
+[^:]*:57: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmla h2,h12,v27.h\[0\]'
+[^:]*:57: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmla h2,h12,v31.h\[0\]'
+[^:]*:57: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmls h2,h12,v16.h\[0\]'
+[^:]*:58: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmls h2,h12,v27.h\[0\]'
+[^:]*:58: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmls h2,h12,v31.h\[0\]'
+[^:]*:58: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmul h2,h12,v16.h\[0\]'
+[^:]*:59: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmul h2,h12,v27.h\[0\]'
+[^:]*:59: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmul h2,h12,v31.h\[0\]'
+[^:]*:59: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmulx h2,h12,v16.h\[0\]'
+[^:]*:60: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmulx h2,h12,v27.h\[0\]'
+[^:]*:60: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `fmulx h2,h12,v31.h\[0\]'
+[^:]*:60: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah h2,h12,v16.h\[0\]'
+[^:]*:61: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah h2,h12,v27.h\[0\]'
+[^:]*:61: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlah h2,h12,v31.h\[0\]'
+[^:]*:61: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh h2,h12,v16.h\[0\]'
+[^:]*:62: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh h2,h12,v27.h\[0\]'
+[^:]*:62: *Info: macro .*
+[^:]*:12: Error: register number out of range 0 to 15 at operand 3 -- `sqrdmlsh h2,h12,v31.h\[0\]'
+[^:]*:62: *Info: macro .*
diff --git a/gas/testsuite/gas/aarch64/illegal-ldapr.l b/gas/testsuite/gas/aarch64/illegal-ldapr.l
index 5179cf5a477..8a91e79e8ef 100644
--- a/gas/testsuite/gas/aarch64/illegal-ldapr.l
+++ b/gas/testsuite/gas/aarch64/illegal-ldapr.l
@@ -2,15 +2,27 @@
[^:]+:18: Error: operand mismatch -- `ldaprb x0,\[x1\]'
[^:]+:19: Error: operand mismatch -- `ldaprh x0,\[x1\]'
[^:]+:20: Error: the optional immediate offset can only be 0 at operand 2 -- `ldapr x0,\[x1,#8\]'
-[^:]+:23: Error: 64-bit integer or SP register expected at operand 2 -- `ldaprb w1,\[xz\]'
-[^:]+:23: Error: the optional immediate offset can only be 0 at operand 2 -- `ldaprb w1,\[x7,#8\]'
-[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldaprb w1,\[x7,#8\]!'
-[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldaprb w1,\[x7\],#8'
-[^:]+:23: Error: 64-bit integer or SP register expected at operand 2 -- `ldaprh w1,\[xz\]'
-[^:]+:23: Error: the optional immediate offset can only be 0 at operand 2 -- `ldaprh w1,\[x7,#8\]'
-[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldaprh w1,\[x7,#8\]!'
-[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldaprh w1,\[x7\],#8'
-[^:]+:23: Error: 64-bit integer or SP register expected at operand 2 -- `ldapr w1,\[xz\]'
-[^:]+:23: Error: the optional immediate offset can only be 0 at operand 2 -- `ldapr w1,\[x7,#8\]'
-[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldapr w1,\[x7,#8\]!'
-[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldapr w1,\[x7\],#8'
+[^:]+:5: Error: 64-bit integer or SP register expected at operand 2 -- `ldaprb w1,\[xz\]'
+[^:]+:23: Info: macro .*
+[^:]+:6: Error: the optional immediate offset can only be 0 at operand 2 -- `ldaprb w1,\[x7,#8\]'
+[^:]+:23: Info: macro .*
+[^:]+:7: Error: invalid addressing mode at operand 2 -- `ldaprb w1,\[x7,#8\]!'
+[^:]+:23: Info: macro .*
+[^:]+:8: Error: invalid addressing mode at operand 2 -- `ldaprb w1,\[x7\],#8'
+[^:]+:23: Info: macro .*
+[^:]+:5: Error: 64-bit integer or SP register expected at operand 2 -- `ldaprh w1,\[xz\]'
+[^:]+:23: Info: macro .*
+[^:]+:6: Error: the optional immediate offset can only be 0 at operand 2 -- `ldaprh w1,\[x7,#8\]'
+[^:]+:23: Info: macro .*
+[^:]+:7: Error: invalid addressing mode at operand 2 -- `ldaprh w1,\[x7,#8\]!'
+[^:]+:23: Info: macro .*
+[^:]+:8: Error: invalid addressing mode at operand 2 -- `ldaprh w1,\[x7\],#8'
+[^:]+:23: Info: macro .*
+[^:]+:5: Error: 64-bit integer or SP register expected at operand 2 -- `ldapr w1,\[xz\]'
+[^:]+:23: Info: macro .*
+[^:]+:6: Error: the optional immediate offset can only be 0 at operand 2 -- `ldapr w1,\[x7,#8\]'
+[^:]+:23: Info: macro .*
+[^:]+:7: Error: invalid addressing mode at operand 2 -- `ldapr w1,\[x7,#8\]!'
+[^:]+:23: Info: macro .*
+[^:]+:8: Error: invalid addressing mode at operand 2 -- `ldapr w1,\[x7\],#8'
+[^:]+:23: Info: macro .*
diff --git a/gas/testsuite/gas/aarch64/illegal-lse.l b/gas/testsuite/gas/aarch64/illegal-lse.l
index dd57f99ed73..b47108df161 100644
--- a/gas/testsuite/gas/aarch64/illegal-lse.l
+++ b/gas/testsuite/gas/aarch64/illegal-lse.l
@@ -1,433 +1,1217 @@
[^:]*: Assembler messages:
-[^:]*:68: Error: operand mismatch -- `cas w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `cas w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casa w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casa w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casl w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casl w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casal w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casal w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casb w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casb w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `cash w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `cash w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casab w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casab w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `caslb w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `caslb w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casalb w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casalb w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casah w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casah w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `caslh w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `caslh w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casalh w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casalh w2,w3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `cas w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `cas x2,x3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casa w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casa x2,x3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casl w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casl x2,x3,\[w4\]'
-[^:]*:68: Error: operand mismatch -- `casal w0,x1,\[x2\]'
-[^:]*:68: Error: 64-bit integer or SP register expected at operand 3 -- `casal x2,x3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swp w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swp w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpa w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpa w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpl w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpl w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpal w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpal w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpb w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpb w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swph w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swph w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpab w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpab w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swplb w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swplb w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpalb w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpalb w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpah w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpah w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swplh w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swplh w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpalh w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpalh w2,w3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swp w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swp x2,x3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpa w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpa x2,x3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpl w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpl x2,x3,\[w4\]'
-[^:]*:69: Error: operand mismatch -- `swpal w0,x1,\[x2\]'
-[^:]*:69: Error: 64-bit integer or SP register expected at operand 3 -- `swpal x2,x3,\[w4\]'
-[^:]*:70: Error: reg pair must start from even reg at operand 1 -- `casp w1,w1,w2,w3,\[x5\]'
-[^:]*:70: Error: reg pair must be contiguous at operand 2 -- `casp w4,w4,w6,w7,\[sp\]'
-[^:]*:70: Error: operand mismatch -- `casp w0,x1,x2,x3,\[x2\]'
-[^:]*:70: Error: 64-bit integer or SP register expected at operand 5 -- `casp x4,x5,x6,x7,\[w8\]'
-[^:]*:70: Error: reg pair must start from even reg at operand 1 -- `caspa w1,w1,w2,w3,\[x5\]'
-[^:]*:70: Error: reg pair must be contiguous at operand 2 -- `caspa w4,w4,w6,w7,\[sp\]'
-[^:]*:70: Error: operand mismatch -- `caspa w0,x1,x2,x3,\[x2\]'
-[^:]*:70: Error: 64-bit integer or SP register expected at operand 5 -- `caspa x4,x5,x6,x7,\[w8\]'
-[^:]*:70: Error: reg pair must start from even reg at operand 1 -- `caspl w1,w1,w2,w3,\[x5\]'
-[^:]*:70: Error: reg pair must be contiguous at operand 2 -- `caspl w4,w4,w6,w7,\[sp\]'
-[^:]*:70: Error: operand mismatch -- `caspl w0,x1,x2,x3,\[x2\]'
-[^:]*:70: Error: 64-bit integer or SP register expected at operand 5 -- `caspl x4,x5,x6,x7,\[w8\]'
-[^:]*:70: Error: reg pair must start from even reg at operand 1 -- `caspal w1,w1,w2,w3,\[x5\]'
-[^:]*:70: Error: reg pair must be contiguous at operand 2 -- `caspal w4,w4,w6,w7,\[sp\]'
-[^:]*:70: Error: operand mismatch -- `caspal w0,x1,x2,x3,\[x2\]'
-[^:]*:70: Error: 64-bit integer or SP register expected at operand 5 -- `caspal x4,x5,x6,x7,\[w8\]'
-[^:]*:71: Error: operand mismatch -- `ldadd w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldadd w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldadda w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldadda w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddl w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddal w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddab w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddab w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddlb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddlb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddalb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddalb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddah w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddah w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddlh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddlh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddalh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddalh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldadd w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldadd x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldadda w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldadda x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddl x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldaddal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddal x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclr w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclr w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclra w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclra w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclrl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclrl w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclral w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclral w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclrb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclrb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclrh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclrh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclrab w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclrab w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclrlb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclrlb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclralb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclralb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclrah w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclrah w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclrlh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclrlh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclralh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclralh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclr w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclr x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclra w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclra x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclrl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclrl x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldclral w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldclral x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeor w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeor w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeora w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeora w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeorl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeorl w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeoral w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeoral w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeorb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeorb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeorh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeorh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeorab w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeorab w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeorlb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeorlb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeoralb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeoralb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeorah w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeorah w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeorlh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeorlh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeoralh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeoralh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeor w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeor x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeora w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeora x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeorl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeorl x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldeoral w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldeoral x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldset w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldset w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldseta w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldseta w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetl w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetal w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldseth w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldseth w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetab w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetab w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetlb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetlb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetalb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetalb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetah w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetah w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetlh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetlh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetalh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetalh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldset w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldset x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldseta w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldseta x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetl x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsetal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsetal x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmax w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmax w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxa w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxa w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxl w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxal w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxab w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxab w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxlb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxlb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxalb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxalb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxah w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxah w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxlh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxlh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxalh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxalh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmax w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmax x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxa w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxa x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxl x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmaxal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmaxal x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmin w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmin w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmina w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmina w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminl w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminal w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminab w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminab w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminlb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminlb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminalb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminalb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminah w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminah w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminlh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminlh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminalh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminalh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmin w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmin x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsmina w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsmina x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminl x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldsminal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldsminal x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumax w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumax w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxa w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxa w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxl w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxal w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxab w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxab w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxlb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxlb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxalb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxalb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxah w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxah w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxlh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxlh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxalh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxalh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumax w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumax x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxa w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxa x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxl x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumaxal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumaxal x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumin w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumin w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumina w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumina w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminl w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminal w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminab w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminab w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminlb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminlb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminalb w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminalb w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminah w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminah w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminlh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminlh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminalh w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminalh w2,w3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumin w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumin x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `ldumina w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `ldumina x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminl w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminl x2,x3,\[w4\]'
-[^:]*:71: Error: operand mismatch -- `lduminal w0,x1,\[x2\]'
-[^:]*:71: Error: 64-bit integer or SP register expected at operand 3 -- `lduminal x2,x3,\[w4\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stadd w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `staddl w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `staddb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `staddb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `staddh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `staddh w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `staddlb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `staddlb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `staddlh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `staddlh w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stadd x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `staddl x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stclr w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stclrl w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stclrb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stclrb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stclrh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stclrh w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stclrlb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stclrlb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stclrlh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stclrlh w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stclr x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stclrl x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `steor w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `steorl w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `steorb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `steorb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `steorh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `steorh w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `steorlb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `steorlb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `steorlh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `steorlh w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `steor x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `steorl x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stset w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsetl w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsetb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsetb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stseth x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stseth w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsetlb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsetlb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsetlh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsetlh w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stset x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsetl x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmax w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmaxl w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsmaxb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmaxb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsmaxh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmaxh w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsmaxlb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmaxlb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsmaxlh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmaxlh w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmax x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmaxl x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmin w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsminl w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsminb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsminb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsminh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsminh w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsminlb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsminlb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stsminlh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsminlh w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsmin x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stsminl x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumax w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumaxl w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stumaxb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumaxb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stumaxh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumaxh w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stumaxlb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumaxlb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stumaxlh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumaxlh w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumax x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumaxl x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumin w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stuminl w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stuminb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stuminb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stuminh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stuminh w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stuminlb x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stuminlb w2,\[w3\]'
-[^:]*:72: Error: operand mismatch -- `stuminlh x0,\[x2\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stuminlh w2,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stumin x0,\[w3\]'
-[^:]*:72: Error: 64-bit integer or SP register expected at operand 2 -- `stuminl x0,\[w3\]'
+[^:]*:26: Error: operand mismatch -- `cas w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `cas w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `casa w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `casa w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `casl w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `casl w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `casal w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `casal w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `casb w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `casb w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `cash w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `cash w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `casab w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `casab w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `caslb w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `caslb w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `casalb w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `casalb w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `casah w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `casah w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `caslh w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `caslh w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `casalh w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `casalh w2,w3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `cas w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `cas x2,x3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `casa w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `casa x2,x3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `casl w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `casl x2,x3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `casal w0,x1,\[x2\]'
+[^:]*:68: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `casal x2,x3,\[w4\]'
+[^:]*:68: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swp w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swp w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swpa w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swpa w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swpl w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swpl w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swpal w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swpal w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swpb w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swpb w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swph w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swph w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swpab w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swpab w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swplb w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swplb w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swpalb w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swpalb w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swpah w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swpah w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swplh w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swplh w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `swpalh w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `swpalh w2,w3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `swp w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `swp x2,x3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `swpa w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `swpa x2,x3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `swpl w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `swpl x2,x3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `swpal w0,x1,\[x2\]'
+[^:]*:69: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `swpal x2,x3,\[w4\]'
+[^:]*:69: *Info: macro .*
+[^:]*:47: Error: reg pair must start from even reg at operand 1 -- `casp w1,w1,w2,w3,\[x5\]'
+[^:]*:70: *Info: macro .*
+[^:]*:48: Error: reg pair must be contiguous at operand 2 -- `casp w4,w4,w6,w7,\[sp\]'
+[^:]*:70: *Info: macro .*
+[^:]*:49: Error: operand mismatch -- `casp w0,x1,x2,x3,\[x2\]'
+[^:]*:70: *Info: macro .*
+[^:]*:50: Error: 64-bit integer or SP register expected at operand 5 -- `casp x4,x5,x6,x7,\[w8\]'
+[^:]*:70: *Info: macro .*
+[^:]*:47: Error: reg pair must start from even reg at operand 1 -- `caspa w1,w1,w2,w3,\[x5\]'
+[^:]*:70: *Info: macro .*
+[^:]*:48: Error: reg pair must be contiguous at operand 2 -- `caspa w4,w4,w6,w7,\[sp\]'
+[^:]*:70: *Info: macro .*
+[^:]*:49: Error: operand mismatch -- `caspa w0,x1,x2,x3,\[x2\]'
+[^:]*:70: *Info: macro .*
+[^:]*:50: Error: 64-bit integer or SP register expected at operand 5 -- `caspa x4,x5,x6,x7,\[w8\]'
+[^:]*:70: *Info: macro .*
+[^:]*:47: Error: reg pair must start from even reg at operand 1 -- `caspl w1,w1,w2,w3,\[x5\]'
+[^:]*:70: *Info: macro .*
+[^:]*:48: Error: reg pair must be contiguous at operand 2 -- `caspl w4,w4,w6,w7,\[sp\]'
+[^:]*:70: *Info: macro .*
+[^:]*:49: Error: operand mismatch -- `caspl w0,x1,x2,x3,\[x2\]'
+[^:]*:70: *Info: macro .*
+[^:]*:50: Error: 64-bit integer or SP register expected at operand 5 -- `caspl x4,x5,x6,x7,\[w8\]'
+[^:]*:70: *Info: macro .*
+[^:]*:47: Error: reg pair must start from even reg at operand 1 -- `caspal w1,w1,w2,w3,\[x5\]'
+[^:]*:70: *Info: macro .*
+[^:]*:48: Error: reg pair must be contiguous at operand 2 -- `caspal w4,w4,w6,w7,\[sp\]'
+[^:]*:70: *Info: macro .*
+[^:]*:49: Error: operand mismatch -- `caspal w0,x1,x2,x3,\[x2\]'
+[^:]*:70: *Info: macro .*
+[^:]*:50: Error: 64-bit integer or SP register expected at operand 5 -- `caspal x4,x5,x6,x7,\[w8\]'
+[^:]*:70: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldadd w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldadd w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldadda w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldadda w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddl w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddl w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddal w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddal w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddb w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddb w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddh w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddh w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddab w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddab w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddlb w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddlb w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddalb w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddalb w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddah w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddah w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddlh w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddlh w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldaddalh w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddalh w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `ldadd w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `ldadd x2,x3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `ldadda w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `ldadda x2,x3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `ldaddl w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddl x2,x3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:30: Error: operand mismatch -- `ldaddal w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:31: Error: 64-bit integer or SP register expected at operand 3 -- `ldaddal x2,x3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldclr w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP register expected at operand 3 -- `ldclr w2,w3,\[w4\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:26: Error: operand mismatch -- `ldclra w0,x1,\[x2\]'
+[^:]*:56: *Info: macro .*
+[^:]*:71: *Info: macro .*
+[^:]*:27: Error: 64-bit integer or SP reg[...]
[diff truncated at 100000 bytes]
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2022-12-13 8:12 [binutils-gdb] gas: re-work line number tracking for macros and their expansions Jan Beulich
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