* [binutils-gdb] aarch64: Add the SME2 multivector LD1 and ST1 instructions
@ 2023-03-30 10:14 Richard Sandiford
0 siblings, 0 replies; only message in thread
From: Richard Sandiford @ 2023-03-30 10:14 UTC (permalink / raw)
To: bfd-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=b408ebbf526e7293f08825d04b34c7d2ad7fc753
commit b408ebbf526e7293f08825d04b34c7d2ad7fc753
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Thu Mar 30 11:09:12 2023 +0100
aarch64: Add the SME2 multivector LD1 and ST1 instructions
SME2 adds LD1 and ST1 variants for lists of 2 and 4 registers.
The registers can be consecutive or strided. In the strided case,
2-register lists have a stride of 8, starting at register x0xxx.
4-register lists have a stride of 4, starting at register x00xx.
The instructions are predicated on a predicate-as-counter register in
the range pn8-pn15. Although we already had register fields with upper
bounds of 7 and 15, this is the first plain register operand to have a
nonzero lower bound. The patch uses the operand-specific data field
to record the minimum value, rather than having separate inserters
and extractors for each lower bound. This in turn required adding
an extra bit to the field.
Diff:
---
gas/config/tc-aarch64.c | 11 +
gas/testsuite/gas/aarch64/sme2-2-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-2-invalid.l | 229 +++
gas/testsuite/gas/aarch64/sme2-2-invalid.s | 205 +++
gas/testsuite/gas/aarch64/sme2-2-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-2-noarch.l | 481 ++++++
gas/testsuite/gas/aarch64/sme2-2.d | 489 ++++++
gas/testsuite/gas/aarch64/sme2-2.s | 511 ++++++
gas/testsuite/gas/aarch64/sme2-3-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-3-invalid.l | 75 +
gas/testsuite/gas/aarch64/sme2-3-invalid.s | 62 +
gas/testsuite/gas/aarch64/sme2-3-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-3-noarch.l | 481 ++++++
gas/testsuite/gas/aarch64/sme2-3.d | 489 ++++++
gas/testsuite/gas/aarch64/sme2-3.s | 511 ++++++
gas/testsuite/gas/aarch64/sme2-4-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-4-invalid.l | 75 +
gas/testsuite/gas/aarch64/sme2-4-invalid.s | 62 +
gas/testsuite/gas/aarch64/sme2-4-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-4-noarch.l | 481 ++++++
gas/testsuite/gas/aarch64/sme2-4.d | 489 ++++++
gas/testsuite/gas/aarch64/sme2-4.s | 511 ++++++
gas/testsuite/gas/aarch64/sme2-5-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-5-invalid.l | 75 +
gas/testsuite/gas/aarch64/sme2-5-invalid.s | 62 +
gas/testsuite/gas/aarch64/sme2-5-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-5-noarch.l | 481 ++++++
gas/testsuite/gas/aarch64/sme2-5.d | 489 ++++++
gas/testsuite/gas/aarch64/sme2-5.s | 511 ++++++
include/opcode/aarch64.h | 3 +
opcodes/aarch64-asm-2.c | 44 +-
opcodes/aarch64-asm.c | 23 +-
opcodes/aarch64-asm.h | 1 +
opcodes/aarch64-dis-2.c | 2542 +++++++++++++++++++++-------
opcodes/aarch64-dis.c | 21 +-
opcodes/aarch64-dis.h | 1 +
opcodes/aarch64-opc-2.c | 3 +
opcodes/aarch64-opc.c | 48 +-
opcodes/aarch64-opc.h | 9 +-
opcodes/aarch64-tbl.h | 136 ++
40 files changed, 9041 insertions(+), 594 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index bf9771d1010..a61ad5dab15 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -5827,6 +5827,10 @@ output_operand_error_record (const operand_error_record *record, char *str)
else if ((detail->data[0].i & -detail->data[0].i) == detail->data[0].i)
handler (_("expected a list of %d registers at operand %d -- `%s'"),
get_log2 (detail->data[0].i), idx + 1, str);
+ else if (detail->data[0].i == 0x14)
+ handler (_("expected a list of %d or %d registers at"
+ " operand %d -- `%s'"),
+ 2, 4, idx + 1, str);
else
handler (_("invalid number of registers in the list"
" at operand %d -- `%s'"), idx + 1, str);
@@ -5836,6 +5840,10 @@ output_operand_error_record (const operand_error_record *record, char *str)
if (detail->data[0].i == (1 << 1))
handler (_("the register list must have a stride of %d"
" at operand %d -- `%s'"), 1, idx + 1, str);
+ else if (detail->data[0].i == 0x12 || detail->data[0].i == 0x102)
+ handler (_("the register list must have a stride of %d or %d"
+ " at operand %d -- `%s`"), 1,
+ detail->data[0].i == 0x12 ? 4 : 8, idx + 1, str);
else
handler (_("invalid register stride at operand %d -- `%s'"),
idx + 1, str);
@@ -6630,6 +6638,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_PNg4_10:
case AARCH64_OPND_SVE_PNn:
case AARCH64_OPND_SVE_PNt:
+ case AARCH64_OPND_SME_PNg3:
reg_type = REG_TYPE_PN;
goto vector_reg;
@@ -6716,6 +6725,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SME_Zdnx4:
case AARCH64_OPND_SME_Znx2:
case AARCH64_OPND_SME_Znx4:
+ case AARCH64_OPND_SME_Ztx2_STRIDED:
+ case AARCH64_OPND_SME_Ztx4_STRIDED:
reg_type = REG_TYPE_Z;
goto vector_reg_list;
diff --git a/gas/testsuite/gas/aarch64/sme2-2-invalid.d b/gas/testsuite/gas/aarch64/sme2-2-invalid.d
new file mode 100644
index 00000000000..a040f54c0ba
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-2-invalid.s
+#error_output: sme2-2-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-2-invalid.l
new file mode 100644
index 00000000000..8f2801f4115
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-invalid.l
@@ -0,0 +1,229 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1b 0,pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1b {z0\.b-z1\.b},0,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,0'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b-z2\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z2\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z1\.b},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8/m,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8\.b,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn7/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-18,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#13,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#16,mul vl\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z4\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z2\.b-z5\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z3\.b-z6\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z3\.b},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8/m,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8\.b,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn0/z,\[x0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn7/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#4\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-36,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-31,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-30,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-29,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-14,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#25,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#26,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#27,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#29,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#30,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#31,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#32,mul vl\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z8\.b,z16\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.s},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z2\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z3\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z4\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z5\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z6\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z7\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z9\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z15\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z16\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z23\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z24\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z31\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z16\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z9\.b,z17\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z10\.b,z18\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z11\.b,z19\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z12\.b,z20\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z13\.b,z21\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z14\.b,z22\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z15\.b,z23\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z24\.b,z0\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z25\.b,z1\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z26\.b,z2\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z27\.b,z3\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z28\.b,z4\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z29\.b,z5\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z30\.b,z6\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z31\.b,z7\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z8\.b,z0\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.h,z8\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z8\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z8\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `ld1b {z0,z8},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z8\.b},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-16\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-17,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#13,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#15,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#16,mul vl\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z4\.b,z8\.b,z12\.b,z16\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z5\.b,z9\.b,z13\.b,z17\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z6\.b,z10\.b,z14\.b,z18\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z7\.b,z11\.b,z15\.b,z19\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z12\.b,z16\.b,z20\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z9\.b,z13\.b,z17\.b,z21\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z10\.b,z14\.b,z18\.b,z22\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z11\.b,z15\.b,z19\.b,z23\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z12\.b,z16\.b,z20\.b,z24\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z13\.b,z17\.b,z21\.b,z25\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z14\.b,z18\.b,z22\.b,z26\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z15\.b,z19\.b,z23\.b,z27\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z20\.b,z24\.b,z28\.b,z0\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z2\.b,z4\.b,z6\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z3\.b,z6\.b,z9\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z8\.b,z16\.b,z24\.b},pn8/z,\[x0\]`
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z4\.b,z5\.b,z6\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z9\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z1\.b,z3\.b,z7\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.h,z4\.h,z8\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.h,z12\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},p8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[w0\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[xzr\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-1\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-64,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-36,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-31,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#1,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#2,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#3,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#25,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#26,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#27,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#29,mul vl\]'
+[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#32,mul vl\]'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b-z2\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z2\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z1\.b},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8/m,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8\.b,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn0/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn7/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[w0,w1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[xzr,x1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[sp,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,w1,sxtw\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,w1,uxtw\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z4\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z2\.b-z5\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z3\.b-z6\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z3\.b},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8/m,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8\.b,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn0/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn7/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[w0,w1\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[xzr,x1\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[sp,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#2\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#3\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#4\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,w1,sxtw\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,w1,uxtw\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z2\.b},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z3\.b},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z4\.b},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z16\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z24\.b,z0\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z8\.b,z0\.b},pn8/z,\[x0,x1\]`
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z8\.h},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z8\.b},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[w0,w30\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[xzr,xzr\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z4\.b,z8\.b,z12\.b,z16\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z20\.b,z24\.b,z28\.b,z0\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, x1\]
+[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},p8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[w0,w30\]'
+[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[xzr,xzr\]'
+[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,sp\]'
+[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#1\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-2-invalid.s b/gas/testsuite/gas/aarch64/sme2-2-invalid.s
new file mode 100644
index 00000000000..43e9e97b51b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-invalid.s
@@ -0,0 +1,205 @@
+ ld1b 0, pn8/z, [x0]
+ ld1b { z0.b - z1.b }, 0, [x0]
+ ld1b { z0.b - z1.b }, pn8/z, 0
+
+ ld1b { z0.b }, pn8/z, [x0]
+ ld1b { z0.b - z2.b }, pn8/z, [x0]
+ ld1b { z1.b - z2.b }, pn8/z, [x0]
+ ld1b { z0.b - z1.b }, p8/z, [x0]
+ ld1b { z0.b - z1.b }, pn8, [x0]
+ ld1b { z0.b - z1.b }, pn8/m, [x0]
+ ld1b { z0.b - z1.b }, pn8.b, [x0]
+ ld1b { z0.b - z1.b }, pn7/z, [x0]
+ ld1b { z0.b - z1.b }, pn8/z, [w0]
+ ld1b { z0.b - z1.b }, pn8/z, [xzr]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #1]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #-32, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #-18, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #-15, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #-1, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #1, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #13, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #15, mul vl]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, #16, mul vl]
+
+ ld1b { z1.b - z4.b }, pn8/z, [x0]
+ ld1b { z2.b - z5.b }, pn8/z, [x0]
+ ld1b { z3.b - z6.b }, pn8/z, [x0]
+ ld1b { z0.b - z3.b }, p8/z, [x0]
+ ld1b { z0.b - z3.b }, pn8, [x0]
+ ld1b { z0.b - z3.b }, pn8/m, [x0]
+ ld1b { z0.b - z3.b }, pn8.b, [x0]
+ ld1b { z0.b - z3.b }, pn0/z, [x0]
+ ld1b { z0.b - z3.b }, pn7/z, [x0]
+ ld1b { z0.b - z3.b }, pn8/z, [w0]
+ ld1b { z0.b - z3.b }, pn8/z, [xzr]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #4]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-36, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-31, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-30, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-29, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-14, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-3, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-2, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #-1, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #1, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #2, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #3, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #14, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #25, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #26, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #27, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #29, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #30, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #31, mul vl]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, #32, mul vl]
+
+ ld1b { z0.b, z8.b, z16.s }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.s }, pn8/z, [x0]
+
+ ld1b { z0.b, z2.b }, pn8/z, [x0]
+ ld1b { z0.b, z3.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b }, pn8/z, [x0]
+ ld1b { z0.b, z5.b }, pn8/z, [x0]
+ ld1b { z0.b, z6.b }, pn8/z, [x0]
+ ld1b { z0.b, z7.b }, pn8/z, [x0]
+ ld1b { z0.b, z9.b }, pn8/z, [x0]
+ ld1b { z0.b, z15.b }, pn8/z, [x0]
+ ld1b { z0.b, z16.b }, pn8/z, [x0]
+ ld1b { z0.b, z23.b }, pn8/z, [x0]
+ ld1b { z0.b, z24.b }, pn8/z, [x0]
+ ld1b { z0.b, z31.b }, pn8/z, [x0]
+ ld1b { z8.b, z16.b }, pn8/z, [x0]
+ ld1b { z9.b, z17.b }, pn8/z, [x0]
+ ld1b { z10.b, z18.b }, pn8/z, [x0]
+ ld1b { z11.b, z19.b }, pn8/z, [x0]
+ ld1b { z12.b, z20.b }, pn8/z, [x0]
+ ld1b { z13.b, z21.b }, pn8/z, [x0]
+ ld1b { z14.b, z22.b }, pn8/z, [x0]
+ ld1b { z15.b, z23.b }, pn8/z, [x0]
+ ld1b { z24.b, z0.b }, pn8/z, [x0]
+ ld1b { z25.b, z1.b }, pn8/z, [x0]
+ ld1b { z26.b, z2.b }, pn8/z, [x0]
+ ld1b { z27.b, z3.b }, pn8/z, [x0]
+ ld1b { z28.b, z4.b }, pn8/z, [x0]
+ ld1b { z29.b, z5.b }, pn8/z, [x0]
+ ld1b { z30.b, z6.b }, pn8/z, [x0]
+ ld1b { z31.b, z7.b }, pn8/z, [x0]
+ ld1b { z8.b, z0.b }, pn8/z, [x0]
+ ld1b { z0.h, z8.b }, pn8/z, [x0]
+ ld1b { z0.b, z8.h }, pn8/z, [x0]
+ ld1b { z0.h, z8.h }, pn8/z, [x0]
+ ld1b { z0, z8 }, pn8/z, [x0]
+ ld1b { z0.b, z8.b }, p8/z, [x0]
+ ld1b { z0.b, z8.b }, pn8/z, [w0]
+ ld1b { z0.b, z8.b }, pn8/z, [xzr]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-16]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-1]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-32, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-17, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-15, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #-1, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #13, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #15, mul vl]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, #16, mul vl]
+
+ ld1b { z4.b, z8.b, z12.b, z16.b }, pn8/z, [x0]
+ ld1b { z5.b, z9.b, z13.b, z17.b }, pn8/z, [x0]
+ ld1b { z6.b, z10.b, z14.b, z18.b }, pn8/z, [x0]
+ ld1b { z7.b, z11.b, z15.b, z19.b }, pn8/z, [x0]
+ ld1b { z8.b, z12.b, z16.b, z20.b }, pn8/z, [x0]
+ ld1b { z9.b, z13.b, z17.b, z21.b }, pn8/z, [x0]
+ ld1b { z10.b, z14.b, z18.b, z22.b }, pn8/z, [x0]
+ ld1b { z11.b, z15.b, z19.b, z23.b }, pn8/z, [x0]
+ ld1b { z12.b, z16.b, z20.b, z24.b }, pn8/z, [x0]
+ ld1b { z13.b, z17.b, z21.b, z25.b }, pn8/z, [x0]
+ ld1b { z14.b, z18.b, z22.b, z26.b }, pn8/z, [x0]
+ ld1b { z15.b, z19.b, z23.b, z27.b }, pn8/z, [x0]
+ ld1b { z20.b, z24.b, z28.b, z0.b }, pn8/z, [x0]
+ ld1b { z0.b, z2.b, z4.b, z6.b }, pn8/z, [x0]
+ ld1b { z0.b, z3.b, z6.b, z9.b }, pn8/z, [x0]
+ ld1b { z0.b, z8.b, z16.b, z24.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z5.b, z6.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.b, z9.b }, pn8/z, [x0]
+ ld1b { z0.b, z1.b, z3.b, z7.b }, pn8/z, [x0]
+ ld1b { z0.h, z4.h, z8.b, z12.b }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.h, z12.h }, pn8/z, [x0]
+ ld1b { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, p8/z, [x0]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [w0]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [xzr]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-32]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-64, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-36, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-31, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-3, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-2, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #-1, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #1, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #2, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #3, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #25, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #26, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #27, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #29, mul vl]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, #32, mul vl]
+
+ ld1b { z0.b - z2.b }, pn8/z, [x0, x1]
+ ld1b { z1.b - z2.b }, pn8/z, [x0, x1]
+ ld1b { z0.b - z1.b }, p8/z, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8/m, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8.b, [x0, x1]
+ ld1b { z0.b - z1.b }, pn0/z, [x0, x1]
+ ld1b { z0.b - z1.b }, pn7/z, [x0, x1]
+ ld1b { z0.b - z1.b }, pn8/z, [w0, w1]
+ ld1b { z0.b - z1.b }, pn8/z, [xzr, x1]
+ ld1b { z0.b - z1.b }, pn8/z, [sp, sp]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #1]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #2]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #3]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, x1, lsl #4]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, w1, sxtw]
+ ld1b { z0.b - z1.b }, pn8/z, [x0, w1, uxtw]
+
+ ld1b { z1.b - z4.b }, pn8/z, [x0, x1]
+ ld1b { z2.b - z5.b }, pn8/z, [x0, x1]
+ ld1b { z3.b - z6.b }, pn8/z, [x0, x1]
+ ld1b { z0.b - z3.b }, p8/z, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8/m, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8.b, [x0, x1]
+ ld1b { z0.b - z3.b }, pn0/z, [x0, x1]
+ ld1b { z0.b - z3.b }, pn7/z, [x0, x1]
+ ld1b { z0.b - z3.b }, pn8/z, [w0, w1]
+ ld1b { z0.b - z3.b }, pn8/z, [xzr, x1]
+ ld1b { z0.b - z3.b }, pn8/z, [sp, sp]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #1]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #2]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #3]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, x1, lsl #4]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, w1, sxtw]
+ ld1b { z0.b - z3.b }, pn8/z, [x0, w1, uxtw]
+
+ ld1b { z0.b, z2.b }, pn8/z, [x0, x1]
+ ld1b { z0.b, z3.b }, pn8/z, [x0, x1]
+ ld1b { z0.b, z4.b }, pn8/z, [x0, x1]
+ ld1b { z8.b, z16.b }, pn8/z, [x0, x1]
+ ld1b { z24.b, z0.b }, pn8/z, [x0, x1]
+ ld1b { z8.b, z0.b }, pn8/z, [x0, x1]
+ ld1b { z0.h, z8.h }, pn8/z, [x0, x1]
+ ld1b { z0.b, z8.b }, p8/z, [x0, x1]
+ ld1b { z0.b, z8.b }, pn8/z, [w0, w30]
+ ld1b { z0.b, z8.b }, pn8/z, [xzr, xzr]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, sp]
+ ld1b { z0.b, z8.b }, pn8/z, [x0, x1, lsl #1]
+
+ ld1b { z4.b, z8.b, z12.b, z16.b }, pn8/z, [x0, x1]
+ ld1b { z20.b, z24.b, z28.b, z0.b }, pn8/z, [x0, x1]
+ ld1b { z0.h, z4.h, z8.h, z12.h }, pn8/z, [x0, x1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, p8/z, [x0, x1]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [w0, w30]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [xzr, xzr]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, sp]
+ ld1b { z0.b, z4.b, z8.b, z12.b }, pn8/z, [x0, x1, lsl #1]
diff --git a/gas/testsuite/gas/aarch64/sme2-2-noarch.d b/gas/testsuite/gas/aarch64/sme2-2-noarch.d
new file mode 100644
index 00000000000..ac339fb2574
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-2.s
+#error_output: sme2-2-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-2-noarch.l
new file mode 100644
index 00000000000..48b6049c8a6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2-noarch.l
@@ -0,0 +1,481 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z1\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z30\.b-z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z12\.b-z13\.b},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z3\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z28\.b-z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z8\.b-z11\.b},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z8\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z9\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z10\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z4\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z6\.b,z14\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z7\.b,z15\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z24\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z25\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z26\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z27\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z20\.b,z28\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z21\.b,z29\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z22\.b,z30\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z23\.b,z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z1\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z30\.b-z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z14\.b-z15\.b},pn9/z,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z3\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z28\.b-z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z8\.b-z11\.b},pn11/z,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z8\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z9\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z10\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z4\.b,z12\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z6\.b,z14\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z7\.b,z15\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z24\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z25\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z26\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z27\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z20\.b,z28\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z21\.b,z29\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z22\.b,z30\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z23\.b,z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn14/z,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11/z,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z1\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z30\.b-z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z12\.b-z13\.b},pn13/z,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z3\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z28\.b-z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z8\.b-z11\.b},pn11/z,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z8\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z9\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z10\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z4\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z6\.b,z14\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z7\.b,z15\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z24\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z25\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z26\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z27\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z20\.b,z28\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z21\.b,z29\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z22\.b,z30\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z23\.b,z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn10/z,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14/z,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z1\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z30\.b-z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z14\.b-z15\.b},pn9/z,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z3\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z28\.b-z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z8\.b-z11\.b},pn11/z,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z8\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z9\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z10\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z4\.b,z12\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z6\.b,z14\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z7\.b,z15\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z24\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z25\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z26\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z27\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z20\.b,z28\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z21\.b,z29\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z22\.b,z30\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z23\.b,z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn14/z,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11/z,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z1\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z30\.b-z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z12\.b-z13\.b},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z3\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z28\.b-z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z8\.b-z11\.b},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z8\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z9\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z10\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z4\.b,z12\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z6\.b,z14\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z7\.b,z15\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z24\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z25\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z26\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z27\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z20\.b,z28\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z21\.b,z29\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z22\.b,z30\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z23\.b,z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z1\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z30\.b-z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z14\.b-z15\.b},pn9,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z3\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z28\.b-z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z8\.b-z11\.b},pn11,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z8\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z9\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z10\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z4\.b,z12\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z6\.b,z14\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z7\.b,z15\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z24\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z25\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z26\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z27\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z20\.b,z28\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z21\.b,z29\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z22\.b,z30\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z23\.b,z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn14,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11,\[x4,x6\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z1\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z30\.b-z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z12\.b-z13\.b},pn13,\[x11,#-10,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z3\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z28\.b-z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z8\.b-z11\.b},pn11,\[x17,#20,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z8\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z9\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z10\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z4\.b,z12\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z6\.b,z14\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z7\.b,z15\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z24\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z25\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z26\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z27\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z20\.b,z28\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z21\.b,z29\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z22\.b,z30\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z23\.b,z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#-16,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#14,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn10,\[x22,#6,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#0,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#-32,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#28,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14,\[x29,#8,mul vl\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z1\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z30\.b-z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z14\.b-z15\.b},pn9,\[x26,x3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z3\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z28\.b-z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z8\.b-z11\.b},pn11,\[x27,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z8\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z9\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z10\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z4\.b,z12\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z6\.b,z14\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z7\.b,z15\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z24\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z25\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z26\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z27\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z20\.b,z28\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z21\.b,z29\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z22\.b,z30\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z23\.b,z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn14,\[x15,x24\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1,lsl#0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0,X1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp,x1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x30\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,xzr\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11,\[x4,x6\]'
diff --git a/gas/testsuite/gas/aarch64/sme2-2.d b/gas/testsuite/gas/aarch64/sme2-2.d
new file mode 100644
index 00000000000..acaa80c9e1f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-2.d
@@ -0,0 +1,489 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: a0400000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^:]+: a0400000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^:]+: a0400000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^:]+: a040001e ld1b {z30\.b-z31\.b}, pn8/z, \[x0\]
+[^:]+: a0401c00 ld1b {z0\.b-z1\.b}, pn15/z, \[x0\]
+[^:]+: a04003c0 ld1b {z0\.b-z1\.b}, pn8/z, \[x30\]
+[^:]+: a04003e0 ld1b {z0\.b-z1\.b}, pn8/z, \[sp\]
+[^:]+: a0480000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a0470000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a04b156c ld1b {z12\.b-z13\.b}, pn13/z, \[x11, #-10, mul vl\]
+[^:]+: a0408000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^:]+: a0408000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^:]+: a0408000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^:]+: a040801c ld1b {z28\.b-z31\.b}, pn8/z, \[x0\]
+[^:]+: a0409c00 ld1b {z0\.b-z3\.b}, pn15/z, \[x0\]
+[^:]+: a04083c0 ld1b {z0\.b-z3\.b}, pn8/z, \[x30\]
+[^:]+: a04083e0 ld1b {z0\.b-z3\.b}, pn8/z, \[sp\]
+[^:]+: a0488000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a0478000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a0458e28 ld1b {z8\.b-z11\.b}, pn11/z, \[x17, #20, mul vl\]
+[^:]+: a1400000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^:]+: a1400000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^:]+: a1400000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^:]+: a1400001 ld1b {z1\.b, z9\.b}, pn8/z, \[x0\]
+[^:]+: a1400002 ld1b {z2\.b, z10\.b}, pn8/z, \[x0\]
+[^:]+: a1400003 ld1b {z3\.b, z11\.b}, pn8/z, \[x0\]
+[^:]+: a1400004 ld1b {z4\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1400005 ld1b {z5\.b, z13\.b}, pn8/z, \[x0\]
+[^:]+: a1400006 ld1b {z6\.b, z14\.b}, pn8/z, \[x0\]
+[^:]+: a1400007 ld1b {z7\.b, z15\.b}, pn8/z, \[x0\]
+[^:]+: a1400010 ld1b {z16\.b, z24\.b}, pn8/z, \[x0\]
+[^:]+: a1400011 ld1b {z17\.b, z25\.b}, pn8/z, \[x0\]
+[^:]+: a1400012 ld1b {z18\.b, z26\.b}, pn8/z, \[x0\]
+[^:]+: a1400013 ld1b {z19\.b, z27\.b}, pn8/z, \[x0\]
+[^:]+: a1400014 ld1b {z20\.b, z28\.b}, pn8/z, \[x0\]
+[^:]+: a1400015 ld1b {z21\.b, z29\.b}, pn8/z, \[x0\]
+[^:]+: a1400016 ld1b {z22\.b, z30\.b}, pn8/z, \[x0\]
+[^:]+: a1400017 ld1b {z23\.b, z31\.b}, pn8/z, \[x0\]
+[^:]+: a1401c00 ld1b {z0\.b, z8\.b}, pn15/z, \[x0\]
+[^:]+: a14003c0 ld1b {z0\.b, z8\.b}, pn8/z, \[x30\]
+[^:]+: a14003e0 ld1b {z0\.b, z8\.b}, pn8/z, \[sp\]
+[^:]+: a1480000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a1470000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a1430ac3 ld1b {z3\.b, z11\.b}, pn10/z, \[x22, #6, mul vl\]
+[^:]+: a1408000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1408000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1408000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1408001 ld1b {z1\.b, z5\.b, z9\.b, z13\.b}, pn8/z, \[x0\]
+[^:]+: a1408002 ld1b {z2\.b, z6\.b, z10\.b, z14\.b}, pn8/z, \[x0\]
+[^:]+: a1408003 ld1b {z3\.b, z7\.b, z11\.b, z15\.b}, pn8/z, \[x0\]
+[^:]+: a1408010 ld1b {z16\.b, z20\.b, z24\.b, z28\.b}, pn8/z, \[x0\]
+[^:]+: a1408011 ld1b {z17\.b, z21\.b, z25\.b, z29\.b}, pn8/z, \[x0\]
+[^:]+: a1408012 ld1b {z18\.b, z22\.b, z26\.b, z30\.b}, pn8/z, \[x0\]
+[^:]+: a1408013 ld1b {z19\.b, z23\.b, z27\.b, z31\.b}, pn8/z, \[x0\]
+[^:]+: a1409c00 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn15/z, \[x0\]
+[^:]+: a14083c0 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x30\]
+[^:]+: a14083e0 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[sp\]
+[^:]+: a1488000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a1478000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a1429ba2 ld1b {z2\.b, z6\.b, z10\.b, z14\.b}, pn14/z, \[x29, #8, mul vl\]
+[^:]+: a0010000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0010000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0010000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^:]+: a001001e ld1b {z30\.b-z31\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0011c00 ld1b {z0\.b-z1\.b}, pn15/z, \[x0, x1\]
+[^:]+: a00103c0 ld1b {z0\.b-z1\.b}, pn8/z, \[x30, x1\]
+[^:]+: a00103e0 ld1b {z0\.b-z1\.b}, pn8/z, \[sp, x1\]
+[^:]+: a01e0000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x30\]
+[^:]+: a01f0000 ld1b {z0\.b-z1\.b}, pn8/z, \[x0, xzr\]
+[^:]+: a003074e ld1b {z14\.b-z15\.b}, pn9/z, \[x26, x3\]
+[^:]+: a0018000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0018000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0018000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^:]+: a001801c ld1b {z28\.b-z31\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0019c00 ld1b {z0\.b-z3\.b}, pn15/z, \[x0, x1\]
+[^:]+: a00183c0 ld1b {z0\.b-z3\.b}, pn8/z, \[x30, x1\]
+[^:]+: a00183e0 ld1b {z0\.b-z3\.b}, pn8/z, \[sp, x1\]
+[^:]+: a01e8000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x30\]
+[^:]+: a01f8000 ld1b {z0\.b-z3\.b}, pn8/z, \[x0, xzr\]
+[^:]+: a0018f68 ld1b {z8\.b-z11\.b}, pn11/z, \[x27, x1\]
+[^:]+: a1010000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010001 ld1b {z1\.b, z9\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010002 ld1b {z2\.b, z10\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010003 ld1b {z3\.b, z11\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010004 ld1b {z4\.b, z12\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010005 ld1b {z5\.b, z13\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010006 ld1b {z6\.b, z14\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010007 ld1b {z7\.b, z15\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010010 ld1b {z16\.b, z24\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010011 ld1b {z17\.b, z25\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010012 ld1b {z18\.b, z26\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010013 ld1b {z19\.b, z27\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010014 ld1b {z20\.b, z28\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010015 ld1b {z21\.b, z29\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010016 ld1b {z22\.b, z30\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010017 ld1b {z23\.b, z31\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1011c00 ld1b {z0\.b, z8\.b}, pn15/z, \[x0, x1\]
+[^:]+: a10103c0 ld1b {z0\.b, z8\.b}, pn8/z, \[x30, x1\]
+[^:]+: a10103e0 ld1b {z0\.b, z8\.b}, pn8/z, \[sp, x1\]
+[^:]+: a11e0000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0, x30\]
+[^:]+: a11f0000 ld1b {z0\.b, z8\.b}, pn8/z, \[x0, xzr\]
+[^:]+: a11819e5 ld1b {z5\.b, z13\.b}, pn14/z, \[x15, x24\]
+[^:]+: a1018000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1018000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1018000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1018001 ld1b {z1\.b, z5\.b, z9\.b, z13\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1018002 ld1b {z2\.b, z6\.b, z10\.b, z14\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1018003 ld1b {z3\.b, z7\.b, z11\.b, z15\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1018010 ld1b {z16\.b, z20\.b, z24\.b, z28\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1018011 ld1b {z17\.b, z21\.b, z25\.b, z29\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1018012 ld1b {z18\.b, z22\.b, z26\.b, z30\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1018013 ld1b {z19\.b, z23\.b, z27\.b, z31\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1019c00 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn15/z, \[x0, x1\]
+[^:]+: a10183c0 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x30, x1\]
+[^:]+: a10183e0 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[sp, x1\]
+[^:]+: a11e8000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, x30\]
+[^:]+: a11f8000 ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, xzr\]
+[^:]+: a1068c91 ld1b {z17\.b, z21\.b, z25\.b, z29\.b}, pn11/z, \[x4, x6\]
+[^:]+: a0400001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^:]+: a0400001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^:]+: a0400001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0\]
+[^:]+: a040001f ldnt1b {z30\.b-z31\.b}, pn8/z, \[x0\]
+[^:]+: a0401c01 ldnt1b {z0\.b-z1\.b}, pn15/z, \[x0\]
+[^:]+: a04003c1 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x30\]
+[^:]+: a04003e1 ldnt1b {z0\.b-z1\.b}, pn8/z, \[sp\]
+[^:]+: a0480001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a0470001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a04b156d ldnt1b {z12\.b-z13\.b}, pn13/z, \[x11, #-10, mul vl\]
+[^:]+: a0408001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^:]+: a0408001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^:]+: a0408001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0\]
+[^:]+: a040801d ldnt1b {z28\.b-z31\.b}, pn8/z, \[x0\]
+[^:]+: a0409c01 ldnt1b {z0\.b-z3\.b}, pn15/z, \[x0\]
+[^:]+: a04083c1 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x30\]
+[^:]+: a04083e1 ldnt1b {z0\.b-z3\.b}, pn8/z, \[sp\]
+[^:]+: a0488001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a0478001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a0458e29 ldnt1b {z8\.b-z11\.b}, pn11/z, \[x17, #20, mul vl\]
+[^:]+: a1400008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^:]+: a1400008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^:]+: a1400008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0\]
+[^:]+: a1400009 ldnt1b {z1\.b, z9\.b}, pn8/z, \[x0\]
+[^:]+: a140000a ldnt1b {z2\.b, z10\.b}, pn8/z, \[x0\]
+[^:]+: a140000b ldnt1b {z3\.b, z11\.b}, pn8/z, \[x0\]
+[^:]+: a140000c ldnt1b {z4\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a140000d ldnt1b {z5\.b, z13\.b}, pn8/z, \[x0\]
+[^:]+: a140000e ldnt1b {z6\.b, z14\.b}, pn8/z, \[x0\]
+[^:]+: a140000f ldnt1b {z7\.b, z15\.b}, pn8/z, \[x0\]
+[^:]+: a1400018 ldnt1b {z16\.b, z24\.b}, pn8/z, \[x0\]
+[^:]+: a1400019 ldnt1b {z17\.b, z25\.b}, pn8/z, \[x0\]
+[^:]+: a140001a ldnt1b {z18\.b, z26\.b}, pn8/z, \[x0\]
+[^:]+: a140001b ldnt1b {z19\.b, z27\.b}, pn8/z, \[x0\]
+[^:]+: a140001c ldnt1b {z20\.b, z28\.b}, pn8/z, \[x0\]
+[^:]+: a140001d ldnt1b {z21\.b, z29\.b}, pn8/z, \[x0\]
+[^:]+: a140001e ldnt1b {z22\.b, z30\.b}, pn8/z, \[x0\]
+[^:]+: a140001f ldnt1b {z23\.b, z31\.b}, pn8/z, \[x0\]
+[^:]+: a1401c08 ldnt1b {z0\.b, z8\.b}, pn15/z, \[x0\]
+[^:]+: a14003c8 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x30\]
+[^:]+: a14003e8 ldnt1b {z0\.b, z8\.b}, pn8/z, \[sp\]
+[^:]+: a1480008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0, #-16, mul vl\]
+[^:]+: a1470008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0, #14, mul vl\]
+[^:]+: a1430acb ldnt1b {z3\.b, z11\.b}, pn10/z, \[x22, #6, mul vl\]
+[^:]+: a1408008 ldnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1408008 ldnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1408008 ldnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\]
+[^:]+: a1408009 ldnt1b {z1\.b, z5\.b, z9\.b, z13\.b}, pn8/z, \[x0\]
+[^:]+: a140800a ldnt1b {z2\.b, z6\.b, z10\.b, z14\.b}, pn8/z, \[x0\]
+[^:]+: a140800b ldnt1b {z3\.b, z7\.b, z11\.b, z15\.b}, pn8/z, \[x0\]
+[^:]+: a1408018 ldnt1b {z16\.b, z20\.b, z24\.b, z28\.b}, pn8/z, \[x0\]
+[^:]+: a1408019 ldnt1b {z17\.b, z21\.b, z25\.b, z29\.b}, pn8/z, \[x0\]
+[^:]+: a140801a ldnt1b {z18\.b, z22\.b, z26\.b, z30\.b}, pn8/z, \[x0\]
+[^:]+: a140801b ldnt1b {z19\.b, z23\.b, z27\.b, z31\.b}, pn8/z, \[x0\]
+[^:]+: a1409c08 ldnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn15/z, \[x0\]
+[^:]+: a14083c8 ldnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x30\]
+[^:]+: a14083e8 ldnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[sp\]
+[^:]+: a1488008 ldnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, #-32, mul vl\]
+[^:]+: a1478008 ldnt1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, #28, mul vl\]
+[^:]+: a1429baa ldnt1b {z2\.b, z6\.b, z10\.b, z14\.b}, pn14/z, \[x29, #8, mul vl\]
+[^:]+: a0010001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0010001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0010001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\]
+[^:]+: a001001f ldnt1b {z30\.b-z31\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0011c01 ldnt1b {z0\.b-z1\.b}, pn15/z, \[x0, x1\]
+[^:]+: a00103c1 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x30, x1\]
+[^:]+: a00103e1 ldnt1b {z0\.b-z1\.b}, pn8/z, \[sp, x1\]
+[^:]+: a01e0001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0, x30\]
+[^:]+: a01f0001 ldnt1b {z0\.b-z1\.b}, pn8/z, \[x0, xzr\]
+[^:]+: a003074f ldnt1b {z14\.b-z15\.b}, pn9/z, \[x26, x3\]
+[^:]+: a0018001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0018001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0018001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\]
+[^:]+: a001801d ldnt1b {z28\.b-z31\.b}, pn8/z, \[x0, x1\]
+[^:]+: a0019c01 ldnt1b {z0\.b-z3\.b}, pn15/z, \[x0, x1\]
+[^:]+: a00183c1 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x30, x1\]
+[^:]+: a00183e1 ldnt1b {z0\.b-z3\.b}, pn8/z, \[sp, x1\]
+[^:]+: a01e8001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0, x30\]
+[^:]+: a01f8001 ldnt1b {z0\.b-z3\.b}, pn8/z, \[x0, xzr\]
+[^:]+: a0018f69 ldnt1b {z8\.b-z11\.b}, pn11/z, \[x27, x1\]
+[^:]+: a1010008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010009 ldnt1b {z1\.b, z9\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101000a ldnt1b {z2\.b, z10\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101000b ldnt1b {z3\.b, z11\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101000c ldnt1b {z4\.b, z12\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101000d ldnt1b {z5\.b, z13\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101000e ldnt1b {z6\.b, z14\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101000f ldnt1b {z7\.b, z15\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010018 ldnt1b {z16\.b, z24\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1010019 ldnt1b {z17\.b, z25\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101001a ldnt1b {z18\.b, z26\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101001b ldnt1b {z19\.b, z27\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101001c ldnt1b {z20\.b, z28\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101001d ldnt1b {z21\.b, z29\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101001e ldnt1b {z22\.b, z30\.b}, pn8/z, \[x0, x1\]
+[^:]+: a101001f ldnt1b {z23\.b, z31\.b}, pn8/z, \[x0, x1\]
+[^:]+: a1011c08 ldnt1b {z0\.b, z8\.b}, pn15/z, \[x0, x1\]
+[^:]+: a10103c8 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x30, x1\]
+[^:]+: a10103e8 ldnt1b {z0\.b, z8\.b}, pn8/z, \[sp, x1\]
+[^:]+: a11e0008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0, x30\]
+[^:]+: a11f0008 ldnt1b {z0\.b, z8\.b}, pn8/z, \[x0, xzr\]
+[^:]+: a11819ed ldnt1b {z5\.b, z13\.b}, pn14/z, \[x15, x24\]
+[^:]+: a1018008 ld[...]
[diff truncated at 100000 bytes]
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2023-03-30 10:14 [binutils-gdb] aarch64: Add the SME2 multivector LD1 and ST1 instructions Richard Sandiford
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