* [binutils-gdb] aarch64: Add the SME2 predicate-related instructions
@ 2023-03-30 10:15 Richard Sandiford
0 siblings, 0 replies; only message in thread
From: Richard Sandiford @ 2023-03-30 10:15 UTC (permalink / raw)
To: bfd-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=99e01a66b4c619fb8c7d6f978038eb7a3661c160
commit 99e01a66b4c619fb8c7d6f978038eb7a3661c160
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Thu Mar 30 11:09:12 2023 +0100
aarch64: Add the SME2 predicate-related instructions
Implementation-wise, the main things to note here are:
- the WHILE* instructions have forms that return a pair of predicate
registers. This is the first time that we've had lists of predicate
registers, and they wrap around after register 15 rather than after
register 31.
- the predicate-as-counter WHILE* instructions have a fourth operand
that specifies the vector length. We can treat this as an enumeration,
except that immediate values aren't allowed.
- PEXT takes an unsuffixed predicate index of the form PN<n>[<imm>].
This is the first instance of a vector/predicate index having
no suffix.
Diff:
---
gas/config/tc-aarch64.c | 85 +-
gas/testsuite/gas/aarch64/illegal-sve2.l | 16 +-
gas/testsuite/gas/aarch64/sme-9.d | 4 +-
gas/testsuite/gas/aarch64/sme2-6-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-6-invalid.l | 139 ++
gas/testsuite/gas/aarch64/sme2-6-invalid.s | 92 ++
gas/testsuite/gas/aarch64/sme2-6-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-6-noarch.l | 145 ++
gas/testsuite/gas/aarch64/sme2-6.d | 153 ++
gas/testsuite/gas/aarch64/sme2-6.s | 164 ++
gas/testsuite/gas/aarch64/sme2-7-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-7-invalid.l | 20 +
gas/testsuite/gas/aarch64/sme2-7-invalid.s | 14 +
gas/testsuite/gas/aarch64/sme2-7-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-7-noarch.l | 321 ++++
gas/testsuite/gas/aarch64/sme2-7.d | 329 ++++
gas/testsuite/gas/aarch64/sme2-7.s | 351 +++++
gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.l | 3 +
gas/testsuite/gas/aarch64/sve2-sme2-1-invalid.s | 4 +
gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.d | 3 +
gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l | 25 +
gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.s | 12 +
gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.d | 3 +
gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l | 257 ++++
gas/testsuite/gas/aarch64/sve2-sme2-2.d | 265 ++++
gas/testsuite/gas/aarch64/sve2-sme2-2.s | 287 ++++
include/opcode/aarch64.h | 11 +
opcodes/aarch64-asm-2.c | 51 +-
opcodes/aarch64-asm.c | 33 +-
opcodes/aarch64-asm.h | 1 +
opcodes/aarch64-dis-2.c | 1843 +++++++++++++----------
opcodes/aarch64-dis.c | 33 +-
opcodes/aarch64-dis.h | 1 +
opcodes/aarch64-opc-2.c | 10 +
opcodes/aarch64-opc.c | 62 +-
opcodes/aarch64-opc.h | 9 +
opcodes/aarch64-tbl.h | 60 +
37 files changed, 3967 insertions(+), 851 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index a61ad5dab15..a433925e320 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -474,6 +474,8 @@ get_reg_expected_msg (unsigned int mask, unsigned int seen)
PN is expected, and vice versa, so the issue at this point is
"predicate-like" vs. "not predicate-like". */
return N_("expected an SVE predicate register at operand %d");
+ if (mask == reg_type_masks[REG_TYPE_PN])
+ return N_("expected an SVE predicate-as-counter register at operand %d");
if (mask == reg_type_masks[REG_TYPE_VZ])
return N_("expected a vector register at operand %d");
if (mask == reg_type_masks[REG_TYPE_ZP])
@@ -1277,7 +1279,7 @@ parse_typed_reg (char **ccp, aarch64_reg_type type,
if (!(flags & PTR_FULL_REG) && skip_past_char (&str, '['))
{
/* Reject Sn[index] syntax. */
- if (!is_typed_vecreg)
+ if (reg->type != REG_TYPE_PN && !is_typed_vecreg)
{
first_error (_("this type of register can't be indexed"));
return NULL;
@@ -1344,6 +1346,14 @@ eq_vector_type_el (struct vector_type_el e1, struct vector_type_el e2)
&& e1.index == e2.index);
}
+/* Return the register number mask for registers of type REG_TYPE. */
+
+static inline int
+reg_type_mask (aarch64_reg_type reg_type)
+{
+ return reg_type == REG_TYPE_P ? 15 : 31;
+}
+
/* This function parses a list of vector registers of type TYPE.
On success, it returns the parsed register list information in the
following encoded format:
@@ -1372,7 +1382,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type,
char *str = *ccp;
int nb_regs;
struct vector_type_el typeinfo, typeinfo_first;
- int val, val_range;
+ int val, val_range, mask;
int in_range;
int ret_val;
bool error = false;
@@ -1396,6 +1406,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type,
val = -1;
val_range = -1;
in_range = 0;
+ mask = reg_type_mask (type);
do
{
if (in_range)
@@ -1431,7 +1442,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type,
(_("invalid range in vector register list"));
error = true;
}
- val_range = (val_range + 1) & 0x1f;
+ val_range = (val_range + 1) & mask;
}
else
{
@@ -1452,7 +1463,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type,
nb_regs++;
if (val_range == val)
break;
- val_range = (val_range + 1) & 0x1f;
+ val_range = (val_range + 1) & mask;
}
in_range = 0;
ptr_flags |= PTR_GOOD_MATCH;
@@ -4316,8 +4327,10 @@ parse_adrp (char **str)
/* Parse a symbolic operand such as "pow2" at *STR. ARRAY is an array
of SIZE tokens in which index I gives the token for field value I,
- or is null if field value I is invalid. REG_TYPE says which register
- names should be treated as registers rather than as symbolic immediates.
+ or is null if field value I is invalid. If the symbolic operand
+ can also be given as a 0-based integer, REG_TYPE says which register
+ names should be treated as registers rather than as symbolic immediates
+ while parsing that integer. REG_TYPE is REG_TYPE_MAX otherwise.
Return true on success, moving *STR past the operand and storing the
field value in *VAL. */
@@ -4345,6 +4358,9 @@ parse_enum_string (char **str, int64_t *val, const char *const *array,
return true;
}
+ if (reg_type == REG_TYPE_MAX)
+ return false;
+
if (!parse_immediate_expression (&p, &exp, reg_type))
return false;
@@ -4971,6 +4987,12 @@ parse_sys_ins_reg (char **str, htab_t sys_ins_regs)
goto failure; \
} while (0)
+#define po_strict_enum_or_fail(array) do { \
+ if (!parse_enum_string (&str, &val, array, \
+ ARRAY_SIZE (array), REG_TYPE_MAX)) \
+ goto failure; \
+ } while (0)
+
#define po_misc_or_fail(expr) do { \
if (!expr) \
goto failure; \
@@ -6445,16 +6467,18 @@ ldst_lo12_determine_real_reloc_type (void)
return reloc_ldst_lo12[inst.reloc.type - BFD_RELOC_AARCH64_LDST_LO12][logsz];
}
-/* Check whether a register list REGINFO is valid. The registers must be
- numbered in increasing order (modulo 32). They must also have a
- consistent stride.
+/* Check whether a register list REGINFO is valid. The registers have type
+ REG_TYPE and must be numbered in increasing order (modulo the register
+ bank size). They must have a consistent stride.
Return true if the list is valid, describing it in LIST if so. */
static bool
-reg_list_valid_p (uint32_t reginfo, struct aarch64_reglist *list)
+reg_list_valid_p (uint32_t reginfo, struct aarch64_reglist *list,
+ aarch64_reg_type reg_type)
{
- uint32_t i, nb_regs, prev_regno, incr;
+ uint32_t i, nb_regs, prev_regno, incr, mask;
+ mask = reg_type_mask (reg_type);
nb_regs = 1 + (reginfo & 0x3);
reginfo >>= 2;
@@ -6469,7 +6493,7 @@ reg_list_valid_p (uint32_t reginfo, struct aarch64_reglist *list)
uint32_t curr_regno, curr_incr;
reginfo >>= 5;
curr_regno = reginfo & 0x1f;
- curr_incr = (curr_regno - prev_regno) & 0x1f;
+ curr_incr = (curr_regno - prev_regno) & mask;
if (curr_incr == 0)
return false;
else if (i == 1)
@@ -6638,7 +6662,9 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_PNg4_10:
case AARCH64_OPND_SVE_PNn:
case AARCH64_OPND_SVE_PNt:
+ case AARCH64_OPND_SME_PNd3:
case AARCH64_OPND_SME_PNg3:
+ case AARCH64_OPND_SME_PNn:
reg_type = REG_TYPE_PN;
goto vector_reg;
@@ -6723,6 +6749,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_ZtxN:
case AARCH64_OPND_SME_Zdnx2:
case AARCH64_OPND_SME_Zdnx4:
+ case AARCH64_OPND_SME_Zmx2:
+ case AARCH64_OPND_SME_Zmx4:
case AARCH64_OPND_SME_Znx2:
case AARCH64_OPND_SME_Znx4:
case AARCH64_OPND_SME_Ztx2_STRIDED:
@@ -6730,6 +6758,11 @@ parse_operands (char *str, const aarch64_opcode *opcode)
reg_type = REG_TYPE_Z;
goto vector_reg_list;
+ case AARCH64_OPND_SME_Pdx2:
+ case AARCH64_OPND_SME_PdxN:
+ reg_type = REG_TYPE_P;
+ goto vector_reg_list;
+
case AARCH64_OPND_LVn:
case AARCH64_OPND_LVt:
case AARCH64_OPND_LVt_AL:
@@ -6753,7 +6786,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
if (val == PARSE_FAIL)
goto failure;
- if (! reg_list_valid_p (val, &info->reglist))
+ if (! reg_list_valid_p (val, &info->reglist, reg_type))
{
set_fatal_syntax_error (_("invalid register list"));
goto failure;
@@ -6779,7 +6812,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
goto failure;
if (!(vectype.defined & NTA_HASTYPE))
{
- if (reg_type == REG_TYPE_Z)
+ if (reg_type == REG_TYPE_Z || reg_type == REG_TYPE_P)
set_fatal_syntax_error (_("missing type suffix"));
goto failure;
}
@@ -7707,6 +7740,24 @@ parse_operands (char *str, const aarch64_opcode *opcode)
goto failure;
break;
+ case AARCH64_OPND_SME_PNn3_INDEX1:
+ case AARCH64_OPND_SME_PNn3_INDEX2:
+ reg = aarch64_reg_parse (&str, REG_TYPE_PN, &vectype);
+ if (!reg)
+ goto failure;
+ if (!(vectype.defined & NTA_HASINDEX))
+ {
+ set_syntax_error (_("missing register index"));
+ goto failure;
+ }
+ info->reglane.regno = reg->number;
+ info->reglane.index = vectype.index;
+ if (vectype.type == NT_invtype)
+ info->qualifier = AARCH64_OPND_QLF_NIL;
+ else
+ info->qualifier = vectype_to_qualifier (&vectype);
+ break;
+
case AARCH64_OPND_BTI_TARGET:
val = parse_bti_operand (&str, &(info->hint_option));
if (val == PARSE_FAIL)
@@ -7753,6 +7804,12 @@ parse_operands (char *str, const aarch64_opcode *opcode)
info->qualifier = qualifier;
break;
+ case AARCH64_OPND_SME_VLxN_10:
+ case AARCH64_OPND_SME_VLxN_13:
+ po_strict_enum_or_fail (aarch64_sme_vlxn_array);
+ info->imm.value = val;
+ break;
+
case AARCH64_OPND_MOPS_ADDR_Rd:
case AARCH64_OPND_MOPS_ADDR_Rs:
po_char_or_fail ('[');
diff --git a/gas/testsuite/gas/aarch64/illegal-sve2.l b/gas/testsuite/gas/aarch64/illegal-sve2.l
index f07ef384f94..5f43b56df14 100644
--- a/gas/testsuite/gas/aarch64/illegal-sve2.l
+++ b/gas/testsuite/gas/aarch64/illegal-sve2.l
@@ -3139,7 +3139,7 @@
[^ :]+:[0-9]+: Info: other valid variant\(s\):
[^ :]+:[0-9]+: Info: usubwt z0\.s, z0\.s, z0\.h
[^ :]+:[0-9]+: Info: usubwt z0\.d, z0\.d, z0\.s
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilege p16\.b,x0,x0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilege p16\.b,x0,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege p0\.b,x32,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege p0\.b,x0,x32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilege p0/m,x0,x0'
@@ -3165,7 +3165,7 @@
[^ :]+:[0-9]+: Info: whilege p0\.h, x0, x0
[^ :]+:[0-9]+: Info: whilege p0\.s, x0, x0
[^ :]+:[0-9]+: Info: whilege p0\.d, x0, x0
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilege p16\.b,w0,w0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilege p16\.b,w0,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege p0\.b,w32,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege p0\.b,w0,w32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilege p0/m,w0,w0'
@@ -3177,7 +3177,7 @@
[^ :]+:[0-9]+: Info: whilege p0\.d, w0, w0
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege p0\.b,w31,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege p0\.b,w0,w31'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilegt p16\.b,x0,x0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilegt p16\.b,x0,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilegt p0\.b,x32,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilegt p0\.b,x0,x32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilegt p0/m,x0,x0'
@@ -3203,7 +3203,7 @@
[^ :]+:[0-9]+: Info: whilegt p0\.h, x0, x0
[^ :]+:[0-9]+: Info: whilegt p0\.s, x0, x0
[^ :]+:[0-9]+: Info: whilegt p0\.d, x0, x0
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilegt p16\.b,w0,w0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilegt p16\.b,w0,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilegt p0\.b,w32,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilegt p0\.b,w0,w32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilegt p0/m,w0,w0'
@@ -3215,7 +3215,7 @@
[^ :]+:[0-9]+: Info: whilegt p0\.d, w0, w0
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilegt p0\.b,w31,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilegt p0\.b,w0,w31'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilehi p16\.b,x0,x0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilehi p16\.b,x0,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehi p0\.b,x32,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehi p0\.b,x0,x32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilehi p0/m,x0,x0'
@@ -3241,7 +3241,7 @@
[^ :]+:[0-9]+: Info: whilehi p0\.h, x0, x0
[^ :]+:[0-9]+: Info: whilehi p0\.s, x0, x0
[^ :]+:[0-9]+: Info: whilehi p0\.d, x0, x0
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilehi p16\.b,w0,w0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilehi p16\.b,w0,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehi p0\.b,w32,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehi p0\.b,w0,w32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilehi p0/m,w0,w0'
@@ -3253,7 +3253,7 @@
[^ :]+:[0-9]+: Info: whilehi p0\.d, w0, w0
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehi p0\.b,w31,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehi p0\.b,w0,w31'
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilehs p16\.b,x0,x0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilehs p16\.b,x0,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehs p0\.b,x32,x0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehs p0\.b,x0,x32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilehs p0/m,x0,x0'
@@ -3279,7 +3279,7 @@
[^ :]+:[0-9]+: Info: whilehs p0\.h, x0, x0
[^ :]+:[0-9]+: Info: whilehs p0\.s, x0, x0
[^ :]+:[0-9]+: Info: whilehs p0\.d, x0, x0
-[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilehs p16\.b,w0,w0'
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilehs p16\.b,w0,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilehs p0\.b,w32,w0'
[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilehs p0\.b,w0,w32'
[^ :]+:[0-9]+: Error: operand mismatch -- `whilehs p0/m,w0,w0'
diff --git a/gas/testsuite/gas/aarch64/sme-9.d b/gas/testsuite/gas/aarch64/sme-9.d
index 9a6175c3906..69b27020d01 100644
--- a/gas/testsuite/gas/aarch64/sme-9.d
+++ b/gas/testsuite/gas/aarch64/sme-9.d
@@ -72,5 +72,5 @@ Disassembly of section \.text:
f8: 25277c61 psel p1, p15, p3.b\[w15, 0\]
fc: 252778a2 psel p2, p14, p5.b\[w15, 0\]
100: 25244200 \.inst 0x25244200 ; undefined
- 104: 25244010 \.inst 0x25244010 ; undefined
- 108: 25244210 \.inst 0x25244210 ; undefined
+ 104: 25244010 whilege pn8.b, x0, x4, vlx2
+ 108: 25244210 whilege pn8.b, x16, x4, vlx2
diff --git a/gas/testsuite/gas/aarch64/sme2-6-invalid.d b/gas/testsuite/gas/aarch64/sme2-6-invalid.d
new file mode 100644
index 00000000000..d3e9450a524
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-6-invalid.s
+#error_output: sme2-6-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-6-invalid.l b/gas/testsuite/gas/aarch64/sme2-6-invalid.l
new file mode 100644
index 00000000000..cac3ec4cfb7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-invalid.l
@@ -0,0 +1,139 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 1 -- `cntp 0,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `cntp x0,0,vlx2'
+[^ :]+:[0-9]+: Error: operand 3 must be VLx2 or VLx4 -- `cntp x0,pn0\.b,0'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 1 -- `cntp xsp,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 1 -- `cntp sp,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: operand mismatch -- `cntp w0,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.b, vlx2
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.h, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.s, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.d, vlx2
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 3 -- `cntp x0,p0\.b,vlx2'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `cntp x0,pn16\.b,vlx2'
+[^ :]+:[0-9]+: Error: operand 3 must be VLx2 or VLx4 -- `cntp x0,pn0\.b,#0'
+[^ :]+:[0-9]+: Error: operand 3 must be VLx2 or VLx4 -- `cntp x0,pn0\.b,vl'
+[^ :]+:[0-9]+: Error: operand 3 must be VLx2 or VLx4 -- `cntp x0,pn0\.b,vlx3'
+[^ :]+:[0-9]+: Error: operand mismatch -- `cntp x0,pn0,vlx2'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.b, vlx2
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.h, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.s, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.d, vlx2
+[^ :]+:[0-9]+: Error: operand mismatch -- `cntp x0,pn0\.q,vlx2'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.b, vlx2
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.h, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.s, vlx2
+[^ :]+:[0-9]+: Info: cntp x0, pn0\.d, vlx2
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `pext 0,pn8\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `pext p0\.b,0'
+[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 1 -- `pext pn8\.b,pn0\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `pext z0\.b,pn8\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `pext p8\.b,z8\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `pext p8\.b,x8'
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `pext p8\.b,p8\[0\]'
+[^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext p8\.b,pn8'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[4\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[1<<32\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `pext p8\.b,pn8\.b\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pext p8\.b, pn8\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: pext p8\.h, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext p8\.s, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext p8\.d, pn8\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `pext p8\.q,pn8\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pext p8\.b, pn8\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: pext p8\.h, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext p8\.s, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext p8\.d, pn8\[0\]
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `pext {p0\.b-p2\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `pext {p0-p1},pn8\[0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext {p0\.b-p1\.b},pn7\[0\]'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext {p0\.b-p1\.b},pn0\[0\]'
+[^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext {p0\.b-p1\.b},pn8'
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `pext {p0\.b-p1\.b},p0\[0\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `pext {p0\.b-p1\.b},pn8\.b\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: pext {p0\.b-p1\.b}, pn8\[0\]
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: pext {p0\.h-p1\.h}, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext {p0\.s-p1\.s}, pn8\[0\]
+[^ :]+:[0-9]+: Info: pext {p0\.d-p1\.d}, pn8\[0\]
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[2\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[1<<32\]'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `ptrue 0'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.b'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.b'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.h'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.h'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.s'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.s'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.d'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.d'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 1 -- `ptrue pn8\.b,all'
+[^ :]+:[0-9]+: Error: operand mismatch -- `ptrue pn8\.q'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: ptrue pn8\.b
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: ptrue pn8\.h
+[^ :]+:[0-9]+: Info: ptrue pn8\.s
+[^ :]+:[0-9]+: Info: ptrue pn8\.d
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sel 0,pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `sel {z0\.b-z1\.b},0,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 3 -- `sel {z0\.b-z1\.b},pn8,0,{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected '{' at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},0'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z1\.b-z2\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `sel {z0\.b-z1\.b},p8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel {z0\.b-z1\.b},pn7,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.b-z1\.b},pn8/z,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Info: sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.b-z1\.b},pn8/m,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Info: sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel {z0\.b-z1\.b},pn0,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z11\.b-z12\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z17\.b-z18\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z1\.b-z4\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z10\.b-z13\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z15\.b-z18\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z1\.b-z4\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z22\.b-z25\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z27\.b-z30\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z5\.b-z8\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z14\.b-z17\.b}'
+[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z19\.b-z22\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z1\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel {z0\.b-z2\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z2\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z2\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel {z0\.b-z2\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z2\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z0\.b-z2\.b}'
+[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.q-z1\.q},pn8,{z0\.q-z1\.q},{z0\.q-z1\.q}'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^ :]+:[0-9]+: Info: sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^ :]+:[0-9]+: Info: sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-6-invalid.s b/gas/testsuite/gas/aarch64/sme2-6-invalid.s
new file mode 100644
index 00000000000..b94dcbab65f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-invalid.s
@@ -0,0 +1,92 @@
+ cntp 0, pn0.b, vlx2
+ cntp x0, 0, vlx2
+ cntp x0, pn0.b, 0
+
+ cntp xsp, pn0.b, vlx2
+ cntp sp, pn0.b, vlx2
+ cntp w0, pn0.b, vlx2
+ cntp x0, p0.b, vlx2
+ cntp x0, pn16.b, vlx2
+ cntp x0, pn0.b, #0
+ cntp x0, pn0.b, vl
+ cntp x0, pn0.b, vlx3
+
+ cntp x0, pn0, vlx2
+ cntp x0, pn0.q, vlx2
+
+ pext 0, pn8[0]
+ pext p0.b, 0
+
+ pext pn8.b, pn0[0]
+ pext z0.b, pn8[0]
+ pext p8.b, z8[0]
+ pext p8.b, x8
+ pext p8.b, p8[0]
+ pext p8.b, pn8
+ pext p8.b, pn8[-1]
+ pext p8.b, pn8[4]
+ pext p8.b, pn8[1 << 32]
+ pext p8.b, pn8.b[0]
+ pext p8.q, pn8[0]
+
+ pext { p0.b - p2.b }, pn8[0]
+ pext { p0 - p1 }, pn8[0]
+ pext { p0.b - p1.b }, pn7[0]
+ pext { p0.b - p1.b }, pn0[0]
+ pext { p0.b - p1.b }, pn8
+ pext { p0.b - p1.b }, p0[0]
+ pext { p0.b - p1.b }, pn8.b[0]
+ pext { p0.b - p1.b }, pn8[-1]
+ pext { p0.b - p1.b }, pn8[2]
+ pext { p0.b - p1.b }, pn8[1 << 32]
+
+ ptrue 0
+
+ ptrue pn0.b
+ ptrue pn7.b
+ ptrue pn0.h
+ ptrue pn7.h
+ ptrue pn0.s
+ ptrue pn7.s
+ ptrue pn0.d
+ ptrue pn7.d
+ ptrue pn8.b, all
+ ptrue pn8.q
+
+ sel 0, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, 0, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, 0, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, 0
+
+ sel { z1.b - z2.b }, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, p8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn7, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8/z, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8/m, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn0, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z11.b - z12.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, { z17.b - z18.b }
+
+ sel { z1.b - z4.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z10.b - z13.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z15.b - z18.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z1.b - z4.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z22.b - z25.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z27.b - z30.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z5.b - z8.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z14.b - z17.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z19.b - z22.b }
+
+ sel { z0.b - z1.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z1.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z0.b - z1.b }
+
+ sel { z0.b - z2.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z2.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z0.b - z2.b }
+
+ sel { z0.b - z2.b }, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z2.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, { z0.b - z2.b }
+
+ sel { z0.q - z1.q }, pn8, { z0.q - z1.q }, { z0.q - z1.q }
diff --git a/gas/testsuite/gas/aarch64/sme2-6-noarch.d b/gas/testsuite/gas/aarch64/sme2-6-noarch.d
new file mode 100644
index 00000000000..5a2f1a5a889
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-6.s
+#error_output: sme2-6-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-6-noarch.l b/gas/testsuite/gas/aarch64/sme2-6-noarch.l
new file mode 100644
index 00000000000..173e99a2b3e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6-noarch.l
@@ -0,0 +1,145 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X0,PN0\.B,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x30,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp xzr,pn0\.b,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn15\.b,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.b,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X11,PN13\.b,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.h,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X0,PN0\.H,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x30,pn0\.h,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp xzr,pn0\.h,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn15\.h,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.h,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X20,PN9\.h,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.s,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X0,PN0\.s,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x30,pn0\.s,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp xzr,pn0\.s,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn15\.s,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.s,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X15,PN8\.s,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.d,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X0,PN0\.d,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x30,pn0\.d,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp xzr,pn0\.d,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn15\.d,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp x0,pn0\.d,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `cntp X4,PN5\.d,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.b,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext P0\.B,PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p15\.b,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.b,pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.b,pn8\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p4\.b,pn11\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.h,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext P0\.H,PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p15\.h,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.h,pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.h,pn8\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p5\.h,pn14\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.s,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext P0\.S,PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p15\.s,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.s,pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.s,pn8\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p6\.s,pn10\[2\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext P0\.D,PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p15\.d,pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn8\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext p7\.d,pn9\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b,p1\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.B-P1\.B},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.b-p15\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.b,p0\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.b-p0\.b},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p7\.b-p8\.b},pn12\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h,p1\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.H-P1\.H},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.h-p15\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.h,p0\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.h-p0\.h},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p2\.h-p3\.h},pn14\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s,p1\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.S-P1\.S},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.s-p15\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.s,p0\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.s-p0\.s},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p5\.s-p6\.s},pn13\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d,p1\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.D-P1\.D},PN8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.d-p15\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.d,p0\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.d-p0\.d},pn8\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn15\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn8\[1\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `pext {p12\.d-p13\.d},pn9\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn11\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn12\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.b-z31\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn15,{z0\.b-z1\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z30\.b-z31\.b},{z0\.b-z1\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z30\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z2\.b-z3\.b},pn12,{z6\.b-z7\.b},{z10\.b-z11\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.h-z31\.h},pn8,{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn15,{z0\.h-z1\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z30\.h-z31\.h},{z0\.h-z1\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z0\.h-z1\.h},{z30\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z12\.h-z13\.h},pn9,{z14\.h-z15\.h},{z16\.h-z17\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.s-z31\.s},pn8,{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn15,{z0\.s-z1\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z30\.s-z31\.s},{z0\.s-z1\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z0\.s-z1\.s},{z30\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z18\.s-z19\.s},pn11,{z22\.s-z23\.s},{z24\.s-z25\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.d-z31\.d},pn8,{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn15,{z0\.d-z1\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z30\.d-z31\.d},{z0\.d-z1\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z0\.d-z1\.d},{z30\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z8\.d-z9\.d},pn14,{z26\.d-z27\.d},{z28\.d-z29\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.b-z31\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z28\.b-z31\.b},{z0\.b-z3\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z28\.b-z31\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z4\.b-z7\.b},pn10,{z8\.b-z11\.b},{z12\.b-z15\.b}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.h-z31\.h},pn8,{z0\.h-z3\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z28\.h-z31\.h},{z0\.h-z3\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z0\.h-z3\.h},{z28\.h-z31\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z8\.h-z11\.h},pn10,{z16\.h-z19\.h},{z20\.h-z23\.h}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.s-z31\.s},pn8,{z0\.s-z3\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z28\.s-z31\.s},{z0\.s-z3\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z0\.s-z3\.s},{z28\.s-z31\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z16\.s-z19\.s},pn10,{z20\.s-z23\.s},{z24\.s-z27\.s}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.d-z31\.d},pn8,{z0\.d-z3\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z28\.d-z31\.d},{z0\.d-z3\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z0\.d-z3\.d},{z28\.d-z31\.d}'
+[^ :]+:[0-9]+: Error: selected processor does not support `sel {z20\.d-z23\.d},pn10,{z4\.d-z7\.d},{z8\.d-z11\.d}'
diff --git a/gas/testsuite/gas/aarch64/sme2-6.d b/gas/testsuite/gas/aarch64/sme2-6.d
new file mode 100644
index 00000000000..488cb099f32
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6.d
@@ -0,0 +1,153 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 25208200 cntp x0, pn0\.b, vlx2
+[^:]+: 25208200 cntp x0, pn0\.b, vlx2
+[^:]+: 2520821e cntp x30, pn0\.b, vlx2
+[^:]+: 2520821f cntp xzr, pn0\.b, vlx2
+[^:]+: 252083e0 cntp x0, pn15\.b, vlx2
+[^:]+: 25208600 cntp x0, pn0\.b, vlx4
+[^:]+: 252087ab cntp x11, pn13\.b, vlx4
+[^:]+: 25608200 cntp x0, pn0\.h, vlx2
+[^:]+: 25608200 cntp x0, pn0\.h, vlx2
+[^:]+: 2560821e cntp x30, pn0\.h, vlx2
+[^:]+: 2560821f cntp xzr, pn0\.h, vlx2
+[^:]+: 256083e0 cntp x0, pn15\.h, vlx2
+[^:]+: 25608600 cntp x0, pn0\.h, vlx4
+[^:]+: 25608334 cntp x20, pn9\.h, vlx2
+[^:]+: 25a08200 cntp x0, pn0\.s, vlx2
+[^:]+: 25a08200 cntp x0, pn0\.s, vlx2
+[^:]+: 25a0821e cntp x30, pn0\.s, vlx2
+[^:]+: 25a0821f cntp xzr, pn0\.s, vlx2
+[^:]+: 25a083e0 cntp x0, pn15\.s, vlx2
+[^:]+: 25a08600 cntp x0, pn0\.s, vlx4
+[^:]+: 25a0870f cntp x15, pn8\.s, vlx4
+[^:]+: 25e08200 cntp x0, pn0\.d, vlx2
+[^:]+: 25e08200 cntp x0, pn0\.d, vlx2
+[^:]+: 25e0821e cntp x30, pn0\.d, vlx2
+[^:]+: 25e0821f cntp xzr, pn0\.d, vlx2
+[^:]+: 25e083e0 cntp x0, pn15\.d, vlx2
+[^:]+: 25e08600 cntp x0, pn0\.d, vlx4
+[^:]+: 25e082a4 cntp x4, pn5\.d, vlx2
+[^:]+: 25207010 pext p0\.b, pn8\[0\]
+[^:]+: 25207010 pext p0\.b, pn8\[0\]
+[^:]+: 2520701f pext p15\.b, pn8\[0\]
+[^:]+: 252070f0 pext p0\.b, pn15\[0\]
+[^:]+: 25207310 pext p0\.b, pn8\[3\]
+[^:]+: 25207274 pext p4\.b, pn11\[2\]
+[^:]+: 25607010 pext p0\.h, pn8\[0\]
+[^:]+: 25607010 pext p0\.h, pn8\[0\]
+[^:]+: 2560701f pext p15\.h, pn8\[0\]
+[^:]+: 256070f0 pext p0\.h, pn15\[0\]
+[^:]+: 25607310 pext p0\.h, pn8\[3\]
+[^:]+: 256071d5 pext p5\.h, pn14\[1\]
+[^:]+: 25a07010 pext p0\.s, pn8\[0\]
+[^:]+: 25a07010 pext p0\.s, pn8\[0\]
+[^:]+: 25a0701f pext p15\.s, pn8\[0\]
+[^:]+: 25a070f0 pext p0\.s, pn15\[0\]
+[^:]+: 25a07310 pext p0\.s, pn8\[3\]
+[^:]+: 25a07256 pext p6\.s, pn10\[2\]
+[^:]+: 25e07010 pext p0\.d, pn8\[0\]
+[^:]+: 25e07010 pext p0\.d, pn8\[0\]
+[^:]+: 25e0701f pext p15\.d, pn8\[0\]
+[^:]+: 25e070f0 pext p0\.d, pn15\[0\]
+[^:]+: 25e07310 pext p0\.d, pn8\[3\]
+[^:]+: 25e07137 pext p7\.d, pn9\[1\]
+[^:]+: 25207410 pext {p0\.b-p1\.b}, pn8\[0\]
+[^:]+: 25207410 pext {p0\.b-p1\.b}, pn8\[0\]
+[^:]+: 25207410 pext {p0\.b-p1\.b}, pn8\[0\]
+[^:]+: 2520741e pext {p14\.b-p15\.b}, pn8\[0\]
+[^:]+: 2520741f pext {p15\.b-p0\.b}, pn8\[0\]
+[^:]+: 2520741f pext {p15\.b-p0\.b}, pn8\[0\]
+[^:]+: 252074f0 pext {p0\.b-p1\.b}, pn15\[0\]
+[^:]+: 25207510 pext {p0\.b-p1\.b}, pn8\[1\]
+[^:]+: 25207497 pext {p7\.b-p8\.b}, pn12\[0\]
+[^:]+: 25607410 pext {p0\.h-p1\.h}, pn8\[0\]
+[^:]+: 25607410 pext {p0\.h-p1\.h}, pn8\[0\]
+[^:]+: 25607410 pext {p0\.h-p1\.h}, pn8\[0\]
+[^:]+: 2560741e pext {p14\.h-p15\.h}, pn8\[0\]
+[^:]+: 2560741f pext {p15\.h-p0\.h}, pn8\[0\]
+[^:]+: 2560741f pext {p15\.h-p0\.h}, pn8\[0\]
+[^:]+: 256074f0 pext {p0\.h-p1\.h}, pn15\[0\]
+[^:]+: 25607510 pext {p0\.h-p1\.h}, pn8\[1\]
+[^:]+: 256074d2 pext {p2\.h-p3\.h}, pn14\[0\]
+[^:]+: 25a07410 pext {p0\.s-p1\.s}, pn8\[0\]
+[^:]+: 25a07410 pext {p0\.s-p1\.s}, pn8\[0\]
+[^:]+: 25a07410 pext {p0\.s-p1\.s}, pn8\[0\]
+[^:]+: 25a0741e pext {p14\.s-p15\.s}, pn8\[0\]
+[^:]+: 25a0741f pext {p15\.s-p0\.s}, pn8\[0\]
+[^:]+: 25a0741f pext {p15\.s-p0\.s}, pn8\[0\]
+[^:]+: 25a074f0 pext {p0\.s-p1\.s}, pn15\[0\]
+[^:]+: 25a07510 pext {p0\.s-p1\.s}, pn8\[1\]
+[^:]+: 25a074b5 pext {p5\.s-p6\.s}, pn13\[0\]
+[^:]+: 25e07410 pext {p0\.d-p1\.d}, pn8\[0\]
+[^:]+: 25e07410 pext {p0\.d-p1\.d}, pn8\[0\]
+[^:]+: 25e07410 pext {p0\.d-p1\.d}, pn8\[0\]
+[^:]+: 25e0741e pext {p14\.d-p15\.d}, pn8\[0\]
+[^:]+: 25e0741f pext {p15\.d-p0\.d}, pn8\[0\]
+[^:]+: 25e0741f pext {p15\.d-p0\.d}, pn8\[0\]
+[^:]+: 25e074f0 pext {p0\.d-p1\.d}, pn15\[0\]
+[^:]+: 25e07510 pext {p0\.d-p1\.d}, pn8\[1\]
+[^:]+: 25e0743c pext {p12\.d-p13\.d}, pn9\[0\]
+[^:]+: 25207810 ptrue pn8\.b
+[^:]+: 25207813 ptrue pn11\.b
+[^:]+: 25207817 ptrue pn15\.b
+[^:]+: 25607810 ptrue pn8\.h
+[^:]+: 25607811 ptrue pn9\.h
+[^:]+: 25607817 ptrue pn15\.h
+[^:]+: 25a07810 ptrue pn8\.s
+[^:]+: 25a07816 ptrue pn14\.s
+[^:]+: 25a07817 ptrue pn15\.s
+[^:]+: 25e07810 ptrue pn8\.d
+[^:]+: 25e07814 ptrue pn12\.d
+[^:]+: 25e07817 ptrue pn15\.d
+[^:]+: c1208000 sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c120801e sel {z30\.b-z31\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c1209c00 sel {z0\.b-z1\.b}, pn15, {z0\.b-z1\.b}, {z0\.b-z1\.b}
+[^:]+: c12083c0 sel {z0\.b-z1\.b}, pn8, {z30\.b-z31\.b}, {z0\.b-z1\.b}
+[^:]+: c13e8000 sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z30\.b-z31\.b}
+[^:]+: c12a90c2 sel {z2\.b-z3\.b}, pn12, {z6\.b-z7\.b}, {z10\.b-z11\.b}
+[^:]+: c1608000 sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c160801e sel {z30\.h-z31\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c1609c00 sel {z0\.h-z1\.h}, pn15, {z0\.h-z1\.h}, {z0\.h-z1\.h}
+[^:]+: c16083c0 sel {z0\.h-z1\.h}, pn8, {z30\.h-z31\.h}, {z0\.h-z1\.h}
+[^:]+: c17e8000 sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z30\.h-z31\.h}
+[^:]+: c17085cc sel {z12\.h-z13\.h}, pn9, {z14\.h-z15\.h}, {z16\.h-z17\.h}
+[^:]+: c1a08000 sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a0801e sel {z30\.s-z31\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a09c00 sel {z0\.s-z1\.s}, pn15, {z0\.s-z1\.s}, {z0\.s-z1\.s}
+[^:]+: c1a083c0 sel {z0\.s-z1\.s}, pn8, {z30\.s-z31\.s}, {z0\.s-z1\.s}
+[^:]+: c1be8000 sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z30\.s-z31\.s}
+[^:]+: c1b88ed2 sel {z18\.s-z19\.s}, pn11, {z22\.s-z23\.s}, {z24\.s-z25\.s}
+[^:]+: c1e08000 sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e0801e sel {z30\.d-z31\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e09c00 sel {z0\.d-z1\.d}, pn15, {z0\.d-z1\.d}, {z0\.d-z1\.d}
+[^:]+: c1e083c0 sel {z0\.d-z1\.d}, pn8, {z30\.d-z31\.d}, {z0\.d-z1\.d}
+[^:]+: c1fe8000 sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z30\.d-z31\.d}
+[^:]+: c1fc9b48 sel {z8\.d-z9\.d}, pn14, {z26\.d-z27\.d}, {z28\.d-z29\.d}
+[^:]+: c1218000 sel {z0\.b-z3\.b}, pn8, {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c121801c sel {z28\.b-z31\.b}, pn8, {z0\.b-z3\.b}, {z0\.b-z3\.b}
+[^:]+: c1218380 sel {z0\.b-z3\.b}, pn8, {z28\.b-z31\.b}, {z0\.b-z3\.b}
+[^:]+: c13d8000 sel {z0\.b-z3\.b}, pn8, {z0\.b-z3\.b}, {z28\.b-z31\.b}
+[^:]+: c12d8904 sel {z4\.b-z7\.b}, pn10, {z8\.b-z11\.b}, {z12\.b-z15\.b}
+[^:]+: c1618000 sel {z0\.h-z3\.h}, pn8, {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c161801c sel {z28\.h-z31\.h}, pn8, {z0\.h-z3\.h}, {z0\.h-z3\.h}
+[^:]+: c1618380 sel {z0\.h-z3\.h}, pn8, {z28\.h-z31\.h}, {z0\.h-z3\.h}
+[^:]+: c17d8000 sel {z0\.h-z3\.h}, pn8, {z0\.h-z3\.h}, {z28\.h-z31\.h}
+[^:]+: c1758a08 sel {z8\.h-z11\.h}, pn10, {z16\.h-z19\.h}, {z20\.h-z23\.h}
+[^:]+: c1a18000 sel {z0\.s-z3\.s}, pn8, {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a1801c sel {z28\.s-z31\.s}, pn8, {z0\.s-z3\.s}, {z0\.s-z3\.s}
+[^:]+: c1a18380 sel {z0\.s-z3\.s}, pn8, {z28\.s-z31\.s}, {z0\.s-z3\.s}
+[^:]+: c1bd8000 sel {z0\.s-z3\.s}, pn8, {z0\.s-z3\.s}, {z28\.s-z31\.s}
+[^:]+: c1b98a90 sel {z16\.s-z19\.s}, pn10, {z20\.s-z23\.s}, {z24\.s-z27\.s}
+[^:]+: c1e18000 sel {z0\.d-z3\.d}, pn8, {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e1801c sel {z28\.d-z31\.d}, pn8, {z0\.d-z3\.d}, {z0\.d-z3\.d}
+[^:]+: c1e18380 sel {z0\.d-z3\.d}, pn8, {z28\.d-z31\.d}, {z0\.d-z3\.d}
+[^:]+: c1fd8000 sel {z0\.d-z3\.d}, pn8, {z0\.d-z3\.d}, {z28\.d-z31\.d}
+[^:]+: c1e98894 sel {z20\.d-z23\.d}, pn10, {z4\.d-z7\.d}, {z8\.d-z11\.d}
diff --git a/gas/testsuite/gas/aarch64/sme2-6.s b/gas/testsuite/gas/aarch64/sme2-6.s
new file mode 100644
index 00000000000..0cc00f1387b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-6.s
@@ -0,0 +1,164 @@
+ cntp x0, pn0.b, vlx2
+ CNTP X0, PN0.B, VLx2
+ cntp x30, pn0.b, vlx2
+ cntp xzr, pn0.b, vlx2
+ cntp x0, pn15.b, vlx2
+ cntp x0, pn0.b, vlx4
+ CNTP X11, PN13.b, VLx4
+
+ cntp x0, pn0.h, vlx2
+ CNTP X0, PN0.H, VLx2
+ cntp x30, pn0.h, vlx2
+ cntp xzr, pn0.h, vlx2
+ cntp x0, pn15.h, vlx2
+ cntp x0, pn0.h, vlx4
+ CNTP X20, PN9.h, VLx2
+
+ cntp x0, pn0.s, vlx2
+ CNTP X0, PN0.s, VLx2
+ cntp x30, pn0.s, vlx2
+ cntp xzr, pn0.s, vlx2
+ cntp x0, pn15.s, vlx2
+ cntp x0, pn0.s, vlx4
+ CNTP X15, PN8.s, VLx4
+
+ cntp x0, pn0.d, vlx2
+ CNTP X0, PN0.d, VLx2
+ cntp x30, pn0.d, vlx2
+ cntp xzr, pn0.d, vlx2
+ cntp x0, pn15.d, vlx2
+ cntp x0, pn0.d, vlx4
+ CNTP X4, PN5.d, VLx2
+
+ pext p0.b, pn8[0]
+ PEXT P0.B, PN8[0]
+ pext p15.b, pn8[0]
+ pext p0.b, pn15[0]
+ pext p0.b, pn8[3]
+ pext p4.b, pn11[2]
+
+ pext p0.h, pn8[0]
+ PEXT P0.H, PN8[0]
+ pext p15.h, pn8[0]
+ pext p0.h, pn15[0]
+ pext p0.h, pn8[3]
+ pext p5.h, pn14[1]
+
+ pext p0.s, pn8[0]
+ PEXT P0.S, PN8[0]
+ pext p15.s, pn8[0]
+ pext p0.s, pn15[0]
+ pext p0.s, pn8[3]
+ pext p6.s, pn10[2]
+
+ pext p0.d, pn8[0]
+ PEXT P0.D, PN8[0]
+ pext p15.d, pn8[0]
+ pext p0.d, pn15[0]
+ pext p0.d, pn8[3]
+ pext p7.d, pn9[1]
+
+ pext { p0.b, p1.b }, pn8[0]
+ pext { p0.b - p1.b }, pn8[0]
+ PEXT { P0.B - P1.B }, PN8[0]
+ pext { p14.b - p15.b }, pn8[0]
+ pext { p15.b, p0.b }, pn8[0]
+ pext { p15.b - p0.b }, pn8[0]
+ pext { p0.b - p1.b }, pn15[0]
+ pext { p0.b - p1.b }, pn8[1]
+ pext { p7.b - p8.b }, pn12[0]
+
+ pext { p0.h, p1.h }, pn8[0]
+ pext { p0.h - p1.h }, pn8[0]
+ PEXT { P0.H - P1.H }, PN8[0]
+ pext { p14.h - p15.h }, pn8[0]
+ pext { p15.h, p0.h }, pn8[0]
+ pext { p15.h - p0.h }, pn8[0]
+ pext { p0.h - p1.h }, pn15[0]
+ pext { p0.h - p1.h }, pn8[1]
+ pext { p2.h - p3.h }, pn14[0]
+
+ pext { p0.s, p1.s }, pn8[0]
+ pext { p0.s - p1.s }, pn8[0]
+ PEXT { P0.S - P1.S }, PN8[0]
+ pext { p14.s - p15.s }, pn8[0]
+ pext { p15.s, p0.s }, pn8[0]
+ pext { p15.s - p0.s }, pn8[0]
+ pext { p0.s - p1.s }, pn15[0]
+ pext { p0.s - p1.s }, pn8[1]
+ pext { p5.s - p6.s }, pn13[0]
+
+ pext { p0.d, p1.d }, pn8[0]
+ pext { p0.d - p1.d }, pn8[0]
+ PEXT { P0.D - P1.D }, PN8[0]
+ pext { p14.d - p15.d }, pn8[0]
+ pext { p15.d, p0.d }, pn8[0]
+ pext { p15.d - p0.d }, pn8[0]
+ pext { p0.d - p1.d }, pn15[0]
+ pext { p0.d - p1.d }, pn8[1]
+ pext { p12.d - p13.d }, pn9[0]
+
+ ptrue pn8.b
+ ptrue pn11.b
+ ptrue pn15.b
+ ptrue pn8.h
+ ptrue pn9.h
+ ptrue pn15.h
+ ptrue pn8.s
+ ptrue pn14.s
+ ptrue pn15.s
+ ptrue pn8.d
+ ptrue pn12.d
+ ptrue pn15.d
+
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z30.b - z31.b }, pn8, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn15, { z0.b - z1.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z30.b - z31.b }, { z0.b - z1.b }
+ sel { z0.b - z1.b }, pn8, { z0.b - z1.b }, { z30.b - z31.b }
+ sel { z2.b - z3.b }, pn12, { z6.b - z7.b }, { z10.b - z11.b }
+
+ sel { z0.h - z1.h }, pn8, { z0.h - z1.h }, { z0.h - z1.h }
+ sel { z30.h - z31.h }, pn8, { z0.h - z1.h }, { z0.h - z1.h }
+ sel { z0.h - z1.h }, pn15, { z0.h - z1.h }, { z0.h - z1.h }
+ sel { z0.h - z1.h }, pn8, { z30.h - z31.h }, { z0.h - z1.h }
+ sel { z0.h - z1.h }, pn8, { z0.h - z1.h }, { z30.h - z31.h }
+ sel { z12.h - z13.h }, pn9, { z14.h - z15.h }, { z16.h - z17.h }
+
+ sel { z0.s - z1.s }, pn8, { z0.s - z1.s }, { z0.s - z1.s }
+ sel { z30.s - z31.s }, pn8, { z0.s - z1.s }, { z0.s - z1.s }
+ sel { z0.s - z1.s }, pn15, { z0.s - z1.s }, { z0.s - z1.s }
+ sel { z0.s - z1.s }, pn8, { z30.s - z31.s }, { z0.s - z1.s }
+ sel { z0.s - z1.s }, pn8, { z0.s - z1.s }, { z30.s - z31.s }
+ sel { z18.s - z19.s }, pn11, { z22.s - z23.s }, { z24.s - z25.s }
+
+ sel { z0.d - z1.d }, pn8, { z0.d - z1.d }, { z0.d - z1.d }
+ sel { z30.d - z31.d }, pn8, { z0.d - z1.d }, { z0.d - z1.d }
+ sel { z0.d - z1.d }, pn15, { z0.d - z1.d }, { z0.d - z1.d }
+ sel { z0.d - z1.d }, pn8, { z30.d - z31.d }, { z0.d - z1.d }
+ sel { z0.d - z1.d }, pn8, { z0.d - z1.d }, { z30.d - z31.d }
+ sel { z8.d - z9.d }, pn14, { z26.d - z27.d }, { z28.d - z29.d }
+
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z28.b - z31.b }, pn8, { z0.b - z3.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z28.b - z31.b }, { z0.b - z3.b }
+ sel { z0.b - z3.b }, pn8, { z0.b - z3.b }, { z28.b - z31.b }
+ sel { z4.b - z7.b }, pn10, { z8.b - z11.b }, { z12.b - z15.b }
+
+ sel { z0.h - z3.h }, pn8, { z0.h - z3.h }, { z0.h - z3.h }
+ sel { z28.h - z31.h }, pn8, { z0.h - z3.h }, { z0.h - z3.h }
+ sel { z0.h - z3.h }, pn8, { z28.h - z31.h }, { z0.h - z3.h }
+ sel { z0.h - z3.h }, pn8, { z0.h - z3.h }, { z28.h - z31.h }
+ sel { z8.h - z11.h }, pn10, { z16.h - z19.h }, { z20.h - z23.h }
+
+ sel { z0.s - z3.s }, pn8, { z0.s - z3.s }, { z0.s - z3.s }
+ sel { z28.s - z31.s }, pn8, { z0.s - z3.s }, { z0.s - z3.s }
+ sel { z0.s - z3.s }, pn8, { z28.s - z31.s }, { z0.s - z3.s }
+ sel { z0.s - z3.s }, pn8, { z0.s - z3.s }, { z28.s - z31.s }
+ sel { z16.s - z19.s }, pn10, { z20.s - z23.s }, { z24.s - z27.s }
+
+ sel { z0.d - z3.d }, pn8, { z0.d - z3.d }, { z0.d - z3.d }
+ sel { z28.d - z31.d }, pn8, { z0.d - z3.d }, { z0.d - z3.d }
+ sel { z0.d - z3.d }, pn8, { z28.d - z31.d }, { z0.d - z3.d }
+ sel { z0.d - z3.d }, pn8, { z0.d - z3.d }, { z28.d - z31.d }
+ sel { z20.d - z23.d }, pn10, { z4.d - z7.d }, { z8.d - z11.d }
diff --git a/gas/testsuite/gas/aarch64/sme2-7-invalid.d b/gas/testsuite/gas/aarch64/sme2-7-invalid.d
new file mode 100644
index 00000000000..889fd417d8e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-7-invalid.s
+#error_output: sme2-7-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-7-invalid.l b/gas/testsuite/gas/aarch64/sme2-7-invalid.l
new file mode 100644
index 00000000000..65b4cce932a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-invalid.l
@@ -0,0 +1,20 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `whilege 0,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege pn8\.b,0,x0,vlx2'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege pn8\.b,x0,0,vlx2'
+[^ :]+:[0-9]+: Error: operand 4 must be VLx2 or VLx4 -- `whilege pn8\.b,x0,x0,0'
+[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `whilege pn0\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `whilege p8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `whilege z8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: comma expected between operands at operand 4 -- `whilege pn8\.b,x0,x0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `whilege pn8\.b,w0,w0,vlx2'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: whilege pn8\.b, x0, x0, vlx2
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: whilege pn8\.h, x0, x0, vlx2
+[^ :]+:[0-9]+: Info: whilege pn8\.s, x0, x0, vlx2
+[^ :]+:[0-9]+: Info: whilege pn8\.d, x0, x0, vlx2
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege pn8\.b,sp,x0,vlx2'
+[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege pn8\.b,x0,sp,vlx2'
+[^ :]+:[0-9]+: Error: operand 4 must be VLx2 or VLx4 -- `whilege pn8\.b,x0,x0,#0'
+[^ :]+:[0-9]+: Error: operand 4 must be VLx2 or VLx4 -- `whilege pn8\.b,x0,x0,1'
diff --git a/gas/testsuite/gas/aarch64/sme2-7-invalid.s b/gas/testsuite/gas/aarch64/sme2-7-invalid.s
new file mode 100644
index 00000000000..0840e7f9169
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-invalid.s
@@ -0,0 +1,14 @@
+ whilege 0, x0, x0, vlx2
+ whilege pn8.b, 0, x0, vlx2
+ whilege pn8.b, x0, 0, vlx2
+ whilege pn8.b, x0, x0, 0
+
+ whilege pn0.b, x0, x0, vlx2
+ whilege p8.b, x0, x0, vlx2
+ whilege z8.b, x0, x0, vlx2
+ whilege pn8.b, x0, x0
+ whilege pn8.b, w0, w0, vlx2
+ whilege pn8.b, sp, x0, vlx2
+ whilege pn8.b, x0, sp, vlx2
+ whilege pn8.b, x0, x0, #0
+ whilege pn8.b, x0, x0, 1
diff --git a/gas/testsuite/gas/aarch64/sme2-7-noarch.d b/gas/testsuite/gas/aarch64/sme2-7-noarch.d
new file mode 100644
index 00000000000..50ea07c98a7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-7.s
+#error_output: sme2-7-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-7-noarch.l b/gas/testsuite/gas/aarch64/sme2-7-noarch.l
new file mode 100644
index 00000000000..b6b3c75fda6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7-noarch.l
@@ -0,0 +1,321 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilege pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilegt pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehi pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilehs pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilele pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelt pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilelo pn13\.d,x26,x9,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.B,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.B,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn15\.b,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.b,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn11\.b,x20,x1,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.h,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.h,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn15\.h,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.h,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn14\.h,x14,x25,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.s,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.s,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn15\.s,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.s,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn9\.s,x4,x27,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x0,x0,vlx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.d,X0,X0,VLx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels PN8\.d,X0,X0,VLx4'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn15\.d,x0,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x30,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,xzr,x0,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x0,x30,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn8\.d,x0,xzr,vlx2'
+[^ :]+:[0-9]+: Error: selected processor does not support `whilels pn13\.d,x26,x9,vlx4'
diff --git a/gas/testsuite/gas/aarch64/sme2-7.d b/gas/testsuite/gas/aarch64/sme2-7.d
new file mode 100644
index 00000000000..8c6fdc5d508
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-7.d
@@ -0,0 +1,329 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 25204010 whilege pn8\.b, x0, x0, vlx2
+[^:]+: 25206010 whilege pn8\.b, x0, x0, vlx4
+[^:]+: 25204010 whilege pn8\.b, x0, x0, vlx2
+[^:]+: 25206010 whilege pn8\.b, x0, x0, vlx4
+[^:]+: 25204017 whilege pn15\.b, x0, x0, vlx2
+[^:]+: 252043d0 whilege pn8\.b, x30, x0, vlx2
+[^:]+: 252043f0 whilege pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4010 whilege pn8\.b, x0, x30, vlx2
+[^:]+: 253f4010 whilege pn8\.b, x0, xzr, vlx2
+[^:]+: 25216293 whilege pn11\.b, x20, x1, vlx4
+[^:]+: 25604010 whilege pn8\.h, x0, x0, vlx2
+[^:]+: 25606010 whilege pn8\.h, x0, x0, vlx4
+[^:]+: 25604010 whilege pn8\.h, x0, x0, vlx2
+[^:]+: 25606010 whilege pn8\.h, x0, x0, vlx4
+[^:]+: 25604017 whilege pn15\.h, x0, x0, vlx2
+[^:]+: 256043d0 whilege pn8\.h, x30, x0, vlx2
+[^:]+: 256043f0 whilege pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4010 whilege pn8\.h, x0, x30, vlx2
+[^:]+: 257f4010 whilege pn8\.h, x0, xzr, vlx2
+[^:]+: 257961d6 whilege pn14\.h, x14, x25, vlx4
+[^:]+: 25a04010 whilege pn8\.s, x0, x0, vlx2
+[^:]+: 25a06010 whilege pn8\.s, x0, x0, vlx4
+[^:]+: 25a04010 whilege pn8\.s, x0, x0, vlx2
+[^:]+: 25a06010 whilege pn8\.s, x0, x0, vlx4
+[^:]+: 25a04017 whilege pn15\.s, x0, x0, vlx2
+[^:]+: 25a043d0 whilege pn8\.s, x30, x0, vlx2
+[^:]+: 25a043f0 whilege pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4010 whilege pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4010 whilege pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4091 whilege pn9\.s, x4, x27, vlx2
+[^:]+: 25e04010 whilege pn8\.d, x0, x0, vlx2
+[^:]+: 25e06010 whilege pn8\.d, x0, x0, vlx4
+[^:]+: 25e04010 whilege pn8\.d, x0, x0, vlx2
+[^:]+: 25e06010 whilege pn8\.d, x0, x0, vlx4
+[^:]+: 25e04017 whilege pn15\.d, x0, x0, vlx2
+[^:]+: 25e043d0 whilege pn8\.d, x30, x0, vlx2
+[^:]+: 25e043f0 whilege pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4010 whilege pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4010 whilege pn8\.d, x0, xzr, vlx2
+[^:]+: 25e96355 whilege pn13\.d, x26, x9, vlx4
+[^:]+: 25204018 whilegt pn8\.b, x0, x0, vlx2
+[^:]+: 25206018 whilegt pn8\.b, x0, x0, vlx4
+[^:]+: 25204018 whilegt pn8\.b, x0, x0, vlx2
+[^:]+: 25206018 whilegt pn8\.b, x0, x0, vlx4
+[^:]+: 2520401f whilegt pn15\.b, x0, x0, vlx2
+[^:]+: 252043d8 whilegt pn8\.b, x30, x0, vlx2
+[^:]+: 252043f8 whilegt pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4018 whilegt pn8\.b, x0, x30, vlx2
+[^:]+: 253f4018 whilegt pn8\.b, x0, xzr, vlx2
+[^:]+: 2521629b whilegt pn11\.b, x20, x1, vlx4
+[^:]+: 25604018 whilegt pn8\.h, x0, x0, vlx2
+[^:]+: 25606018 whilegt pn8\.h, x0, x0, vlx4
+[^:]+: 25604018 whilegt pn8\.h, x0, x0, vlx2
+[^:]+: 25606018 whilegt pn8\.h, x0, x0, vlx4
+[^:]+: 2560401f whilegt pn15\.h, x0, x0, vlx2
+[^:]+: 256043d8 whilegt pn8\.h, x30, x0, vlx2
+[^:]+: 256043f8 whilegt pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4018 whilegt pn8\.h, x0, x30, vlx2
+[^:]+: 257f4018 whilegt pn8\.h, x0, xzr, vlx2
+[^:]+: 257961de whilegt pn14\.h, x14, x25, vlx4
+[^:]+: 25a04018 whilegt pn8\.s, x0, x0, vlx2
+[^:]+: 25a06018 whilegt pn8\.s, x0, x0, vlx4
+[^:]+: 25a04018 whilegt pn8\.s, x0, x0, vlx2
+[^:]+: 25a06018 whilegt pn8\.s, x0, x0, vlx4
+[^:]+: 25a0401f whilegt pn15\.s, x0, x0, vlx2
+[^:]+: 25a043d8 whilegt pn8\.s, x30, x0, vlx2
+[^:]+: 25a043f8 whilegt pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4018 whilegt pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4018 whilegt pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4099 whilegt pn9\.s, x4, x27, vlx2
+[^:]+: 25e04018 whilegt pn8\.d, x0, x0, vlx2
+[^:]+: 25e06018 whilegt pn8\.d, x0, x0, vlx4
+[^:]+: 25e04018 whilegt pn8\.d, x0, x0, vlx2
+[^:]+: 25e06018 whilegt pn8\.d, x0, x0, vlx4
+[^:]+: 25e0401f whilegt pn15\.d, x0, x0, vlx2
+[^:]+: 25e043d8 whilegt pn8\.d, x30, x0, vlx2
+[^:]+: 25e043f8 whilegt pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4018 whilegt pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4018 whilegt pn8\.d, x0, xzr, vlx2
+[^:]+: 25e9635d whilegt pn13\.d, x26, x9, vlx4
+[^:]+: 25204818 whilehi pn8\.b, x0, x0, vlx2
+[^:]+: 25206818 whilehi pn8\.b, x0, x0, vlx4
+[^:]+: 25204818 whilehi pn8\.b, x0, x0, vlx2
+[^:]+: 25206818 whilehi pn8\.b, x0, x0, vlx4
+[^:]+: 2520481f whilehi pn15\.b, x0, x0, vlx2
+[^:]+: 25204bd8 whilehi pn8\.b, x30, x0, vlx2
+[^:]+: 25204bf8 whilehi pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4818 whilehi pn8\.b, x0, x30, vlx2
+[^:]+: 253f4818 whilehi pn8\.b, x0, xzr, vlx2
+[^:]+: 25216a9b whilehi pn11\.b, x20, x1, vlx4
+[^:]+: 25604818 whilehi pn8\.h, x0, x0, vlx2
+[^:]+: 25606818 whilehi pn8\.h, x0, x0, vlx4
+[^:]+: 25604818 whilehi pn8\.h, x0, x0, vlx2
+[^:]+: 25606818 whilehi pn8\.h, x0, x0, vlx4
+[^:]+: 2560481f whilehi pn15\.h, x0, x0, vlx2
+[^:]+: 25604bd8 whilehi pn8\.h, x30, x0, vlx2
+[^:]+: 25604bf8 whilehi pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4818 whilehi pn8\.h, x0, x30, vlx2
+[^:]+: 257f4818 whilehi pn8\.h, x0, xzr, vlx2
+[^:]+: 257969de whilehi pn14\.h, x14, x25, vlx4
+[^:]+: 25a04818 whilehi pn8\.s, x0, x0, vlx2
+[^:]+: 25a06818 whilehi pn8\.s, x0, x0, vlx4
+[^:]+: 25a04818 whilehi pn8\.s, x0, x0, vlx2
+[^:]+: 25a06818 whilehi pn8\.s, x0, x0, vlx4
+[^:]+: 25a0481f whilehi pn15\.s, x0, x0, vlx2
+[^:]+: 25a04bd8 whilehi pn8\.s, x30, x0, vlx2
+[^:]+: 25a04bf8 whilehi pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4818 whilehi pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4818 whilehi pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4899 whilehi pn9\.s, x4, x27, vlx2
+[^:]+: 25e04818 whilehi pn8\.d, x0, x0, vlx2
+[^:]+: 25e06818 whilehi pn8\.d, x0, x0, vlx4
+[^:]+: 25e04818 whilehi pn8\.d, x0, x0, vlx2
+[^:]+: 25e06818 whilehi pn8\.d, x0, x0, vlx4
+[^:]+: 25e0481f whilehi pn15\.d, x0, x0, vlx2
+[^:]+: 25e04bd8 whilehi pn8\.d, x30, x0, vlx2
+[^:]+: 25e04bf8 whilehi pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4818 whilehi pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4818 whilehi pn8\.d, x0, xzr, vlx2
+[^:]+: 25e96b5d whilehi pn13\.d, x26, x9, vlx4
+[^:]+: 25204810 whilehs pn8\.b, x0, x0, vlx2
+[^:]+: 25206810 whilehs pn8\.b, x0, x0, vlx4
+[^:]+: 25204810 whilehs pn8\.b, x0, x0, vlx2
+[^:]+: 25206810 whilehs pn8\.b, x0, x0, vlx4
+[^:]+: 25204817 whilehs pn15\.b, x0, x0, vlx2
+[^:]+: 25204bd0 whilehs pn8\.b, x30, x0, vlx2
+[^:]+: 25204bf0 whilehs pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4810 whilehs pn8\.b, x0, x30, vlx2
+[^:]+: 253f4810 whilehs pn8\.b, x0, xzr, vlx2
+[^:]+: 25216a93 whilehs pn11\.b, x20, x1, vlx4
+[^:]+: 25604810 whilehs pn8\.h, x0, x0, vlx2
+[^:]+: 25606810 whilehs pn8\.h, x0, x0, vlx4
+[^:]+: 25604810 whilehs pn8\.h, x0, x0, vlx2
+[^:]+: 25606810 whilehs pn8\.h, x0, x0, vlx4
+[^:]+: 25604817 whilehs pn15\.h, x0, x0, vlx2
+[^:]+: 25604bd0 whilehs pn8\.h, x30, x0, vlx2
+[^:]+: 25604bf0 whilehs pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4810 whilehs pn8\.h, x0, x30, vlx2
+[^:]+: 257f4810 whilehs pn8\.h, x0, xzr, vlx2
+[^:]+: 257969d6 whilehs pn14\.h, x14, x25, vlx4
+[^:]+: 25a04810 whilehs pn8\.s, x0, x0, vlx2
+[^:]+: 25a06810 whilehs pn8\.s, x0, x0, vlx4
+[^:]+: 25a04810 whilehs pn8\.s, x0, x0, vlx2
+[^:]+: 25a06810 whilehs pn8\.s, x0, x0, vlx4
+[^:]+: 25a04817 whilehs pn15\.s, x0, x0, vlx2
+[^:]+: 25a04bd0 whilehs pn8\.s, x30, x0, vlx2
+[^:]+: 25a04bf0 whilehs pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4810 whilehs pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4810 whilehs pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4891 whilehs pn9\.s, x4, x27, vlx2
+[^:]+: 25e04810 whilehs pn8\.d, x0, x0, vlx2
+[^:]+: 25e06810 whilehs pn8\.d, x0, x0, vlx4
+[^:]+: 25e04810 whilehs pn8\.d, x0, x0, vlx2
+[^:]+: 25e06810 whilehs pn8\.d, x0, x0, vlx4
+[^:]+: 25e04817 whilehs pn15\.d, x0, x0, vlx2
+[^:]+: 25e04bd0 whilehs pn8\.d, x30, x0, vlx2
+[^:]+: 25e04bf0 whilehs pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4810 whilehs pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4810 whilehs pn8\.d, x0, xzr, vlx2
+[^:]+: 25e96b55 whilehs pn13\.d, x26, x9, vlx4
+[^:]+: 25204418 whilele pn8\.b, x0, x0, vlx2
+[^:]+: 25206418 whilele pn8\.b, x0, x0, vlx4
+[^:]+: 25204418 whilele pn8\.b, x0, x0, vlx2
+[^:]+: 25206418 whilele pn8\.b, x0, x0, vlx4
+[^:]+: 2520441f whilele pn15\.b, x0, x0, vlx2
+[^:]+: 252047d8 whilele pn8\.b, x30, x0, vlx2
+[^:]+: 252047f8 whilele pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4418 whilele pn8\.b, x0, x30, vlx2
+[^:]+: 253f4418 whilele pn8\.b, x0, xzr, vlx2
+[^:]+: 2521669b whilele pn11\.b, x20, x1, vlx4
+[^:]+: 25604418 whilele pn8\.h, x0, x0, vlx2
+[^:]+: 25606418 whilele pn8\.h, x0, x0, vlx4
+[^:]+: 25604418 whilele pn8\.h, x0, x0, vlx2
+[^:]+: 25606418 whilele pn8\.h, x0, x0, vlx4
+[^:]+: 2560441f whilele pn15\.h, x0, x0, vlx2
+[^:]+: 256047d8 whilele pn8\.h, x30, x0, vlx2
+[^:]+: 256047f8 whilele pn8\.h, xzr, x0, vlx2
+[^:]+: 257e4418 whilele pn8\.h, x0, x30, vlx2
+[^:]+: 257f4418 whilele pn8\.h, x0, xzr, vlx2
+[^:]+: 257965de whilele pn14\.h, x14, x25, vlx4
+[^:]+: 25a04418 whilele pn8\.s, x0, x0, vlx2
+[^:]+: 25a06418 whilele pn8\.s, x0, x0, vlx4
+[^:]+: 25a04418 whilele pn8\.s, x0, x0, vlx2
+[^:]+: 25a06418 whilele pn8\.s, x0, x0, vlx4
+[^:]+: 25a0441f whilele pn15\.s, x0, x0, vlx2
+[^:]+: 25a047d8 whilele pn8\.s, x30, x0, vlx2
+[^:]+: 25a047f8 whilele pn8\.s, xzr, x0, vlx2
+[^:]+: 25be4418 whilele pn8\.s, x0, x30, vlx2
+[^:]+: 25bf4418 whilele pn8\.s, x0, xzr, vlx2
+[^:]+: 25bb4499 whilele pn9\.s, x4, x27, vlx2
+[^:]+: 25e04418 whilele pn8\.d, x0, x0, vlx2
+[^:]+: 25e06418 whilele pn8\.d, x0, x0, vlx4
+[^:]+: 25e04418 whilele pn8\.d, x0, x0, vlx2
+[^:]+: 25e06418 whilele pn8\.d, x0, x0, vlx4
+[^:]+: 25e0441f whilele pn15\.d, x0, x0, vlx2
+[^:]+: 25e047d8 whilele pn8\.d, x30, x0, vlx2
+[^:]+: 25e047f8 whilele pn8\.d, xzr, x0, vlx2
+[^:]+: 25fe4418 whilele pn8\.d, x0, x30, vlx2
+[^:]+: 25ff4418 whilele pn8\.d, x0, xzr, vlx2
+[^:]+: 25e9675d whilele pn13\.d, x26, x9, vlx4
+[^:]+: 25204410 whilelt pn8\.b, x0, x0, vlx2
+[^:]+: 25206410 whilelt pn8\.b, x0, x0, vlx4
+[^:]+: 25204410 whilelt pn8\.b, x0, x0, vlx2
+[^:]+: 25206410 whilelt pn8\.b, x0, x0, vlx4
+[^:]+: 25204417 whilelt pn15\.b, x0, x0, vlx2
+[^:]+: 252047d0 whilelt pn8\.b, x30, x0, vlx2
+[^:]+: 252047f0 whilelt pn8\.b, xzr, x0, vlx2
+[^:]+: 253e4410 whilelt pn8\.b, x0, x30, vlx2
+[^:]+: 253f4410 whilelt pn8\.b, x0, xzr, vlx2
+[^:]+: 25216693 whilelt pn11\.b, x20, x1, vlx4
+[^:]+: 25604410 whilelt pn8\.h, x0, x0, vlx2[...]
[diff truncated at 100000 bytes]
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2023-03-30 10:15 [binutils-gdb] aarch64: Add the SME2 predicate-related instructions Richard Sandiford
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