* [binutils-gdb] aarch64: Add the SME2 CLAMP instructions
@ 2023-03-30 10:15 Richard Sandiford
0 siblings, 0 replies; only message in thread
From: Richard Sandiford @ 2023-03-30 10:15 UTC (permalink / raw)
To: bfd-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=5f05951e4b7d0bf5fb21d61d5c52d75ec7d9e985
commit 5f05951e4b7d0bf5fb21d61d5c52d75ec7d9e985
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Thu Mar 30 11:09:15 2023 +0100
aarch64: Add the SME2 CLAMP instructions
FCLAMP, SCLAMP and UCLAMP share the same format, although FCLAMP
doesn't have a .B form.
Diff:
---
gas/testsuite/gas/aarch64/sme2-22-invalid.d | 3 +
gas/testsuite/gas/aarch64/sme2-22-invalid.l | 27 +
gas/testsuite/gas/aarch64/sme2-22-invalid.s | 13 +
gas/testsuite/gas/aarch64/sme2-22-noarch.d | 3 +
gas/testsuite/gas/aarch64/sme2-22-noarch.l | 111 ++
gas/testsuite/gas/aarch64/sme2-22.d | 119 ++
gas/testsuite/gas/aarch64/sme2-22.s | 131 ++
opcodes/aarch64-dis-2.c | 1720 ++++++++++++++-------------
opcodes/aarch64-tbl.h | 6 +
9 files changed, 1306 insertions(+), 827 deletions(-)
diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.d b/gas/testsuite/gas/aarch64/sme2-22-invalid.d
new file mode 100644
index 00000000000..87213eddbe3
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a
+#source: sme2-22-invalid.s
+#error_output: sme2-22-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.l b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
new file mode 100644
index 00000000000..85251cd1fee
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.l
@@ -0,0 +1,27 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `fclamp 0,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp {z0\.h-z1\.h},0,z0\.h'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp {z0\.h-z1\.h},z0\.h,0'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z1\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z3\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp {z0\.h-z3\.h}, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp {z0\.s-z3\.s}, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp {z0\.d-z3\.d}, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.q-z1\.q},z0\.q,z0\.q'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^ :]+:[0-9]+: Info: other valid variant\(s\):
+[^ :]+:[0-9]+: Info: fclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^ :]+:[0-9]+: Info: fclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fclamp {z0\.h-z2\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z2\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z4\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z2\.h-z5\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z3\.h-z6\.h},z0\.h,z0\.h'
diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.s b/gas/testsuite/gas/aarch64/sme2-22-invalid.s
new file mode 100644
index 00000000000..c284ef63f1e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.s
@@ -0,0 +1,13 @@
+ fclamp 0, z0.h, z0.h
+ fclamp { z0.h - z1.h }, 0, z0.h
+ fclamp { z0.h - z1.h }, z0.h, 0
+
+ fclamp { z0.b - z1.b }, z0.b, z0.b
+ fclamp { z0.b - z3.b }, z0.b, z0.b
+ fclamp { z0.q - z1.q }, z0.q, z0.q
+
+ fclamp { z0.h - z2.h }, z0.h, z0.h
+ fclamp { z1.h - z2.h }, z0.h, z0.h
+ fclamp { z1.h - z4.h }, z0.h, z0.h
+ fclamp { z2.h - z5.h }, z0.h, z0.h
+ fclamp { z3.h - z6.h }, z0.h, z0.h
diff --git a/gas/testsuite/gas/aarch64/sme2-22-noarch.d b/gas/testsuite/gas/aarch64/sme2-22-noarch.d
new file mode 100644
index 00000000000..162d84a74a7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sme2-22.s
+#error_output: sme2-22-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sme2-22-noarch.l b/gas/testsuite/gas/aarch64/sme2-22-noarch.l
new file mode 100644
index 00000000000..f313ad0ad99
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22-noarch.l
@@ -0,0 +1,111 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.h-z9\.h},z26\.h,z4\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z18\.s-z19\.s},z9\.s,z14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z10\.d-z11\.d},z11\.d,z22\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z20\.h-z23\.h},z15\.h,z17\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z24\.s-z27\.s},z29\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.d-z11\.d},z7\.d,z30\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z2\.b-z3\.b},z21\.b,z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.h-z9\.h},z26\.h,z4\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z18\.s-z19\.s},z9\.s,z14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z10\.d-z11\.d},z11\.d,z22\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z4\.b-z7\.b},z19\.b,z26\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z20\.h-z23\.h},z15\.h,z17\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z24\.s-z27\.s},z29\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.d-z11\.d},z7\.d,z30\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z2\.b-z3\.b},z21\.b,z9\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.h-z9\.h},z26\.h,z4\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z18\.s-z19\.s},z9\.s,z14\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z10\.d-z11\.d},z11\.d,z22\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.b-z31\.b},z0\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z31\.b,z0\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z31\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z4\.b-z7\.b},z19\.b,z26\.b'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.h-z31\.h},z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z20\.h-z23\.h},z15\.h,z17\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.s-z31\.s},z0\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z31\.s,z0\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z31\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z24\.s-z27\.s},z29\.s,z6\.s'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.d-z31\.d},z0\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z31\.d,z0\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z31\.d'
+[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.d-z11\.d},z7\.d,z30\.d'
diff --git a/gas/testsuite/gas/aarch64/sme2-22.d b/gas/testsuite/gas/aarch64/sme2-22.d
new file mode 100644
index 00000000000..19482207986
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22.d
@@ -0,0 +1,119 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: c160c000 fclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^:]+: c160c01e fclamp {z30\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160c3e0 fclamp {z0\.h-z1\.h}, z31\.h, z0\.h
+[^:]+: c17fc000 fclamp {z0\.h-z1\.h}, z0\.h, z31\.h
+[^:]+: c164c348 fclamp {z8\.h-z9\.h}, z26\.h, z4\.h
+[^:]+: c1a0c000 fclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^:]+: c1a0c01e fclamp {z30\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0c3e0 fclamp {z0\.s-z1\.s}, z31\.s, z0\.s
+[^:]+: c1bfc000 fclamp {z0\.s-z1\.s}, z0\.s, z31\.s
+[^:]+: c1aec132 fclamp {z18\.s-z19\.s}, z9\.s, z14\.s
+[^:]+: c1e0c000 fclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^:]+: c1e0c01e fclamp {z30\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0c3e0 fclamp {z0\.d-z1\.d}, z31\.d, z0\.d
+[^:]+: c1ffc000 fclamp {z0\.d-z1\.d}, z0\.d, z31\.d
+[^:]+: c1f6c16a fclamp {z10\.d-z11\.d}, z11\.d, z22\.d
+[^:]+: c160c800 fclamp {z0\.h-z3\.h}, z0\.h, z0\.h
+[^:]+: c160c81c fclamp {z28\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160cbe0 fclamp {z0\.h-z3\.h}, z31\.h, z0\.h
+[^:]+: c17fc800 fclamp {z0\.h-z3\.h}, z0\.h, z31\.h
+[^:]+: c171c9f4 fclamp {z20\.h-z23\.h}, z15\.h, z17\.h
+[^:]+: c1a0c800 fclamp {z0\.s-z3\.s}, z0\.s, z0\.s
+[^:]+: c1a0c81c fclamp {z28\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0cbe0 fclamp {z0\.s-z3\.s}, z31\.s, z0\.s
+[^:]+: c1bfc800 fclamp {z0\.s-z3\.s}, z0\.s, z31\.s
+[^:]+: c1a6cbb8 fclamp {z24\.s-z27\.s}, z29\.s, z6\.s
+[^:]+: c1e0c800 fclamp {z0\.d-z3\.d}, z0\.d, z0\.d
+[^:]+: c1e0c81c fclamp {z28\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0cbe0 fclamp {z0\.d-z3\.d}, z31\.d, z0\.d
+[^:]+: c1ffc800 fclamp {z0\.d-z3\.d}, z0\.d, z31\.d
+[^:]+: c1fec8e8 fclamp {z8\.d-z11\.d}, z7\.d, z30\.d
+[^:]+: c120c400 sclamp {z0\.b-z1\.b}, z0\.b, z0\.b
+[^:]+: c120c41e sclamp {z30\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120c7e0 sclamp {z0\.b-z1\.b}, z31\.b, z0\.b
+[^:]+: c13fc400 sclamp {z0\.b-z1\.b}, z0\.b, z31\.b
+[^:]+: c129c6a2 sclamp {z2\.b-z3\.b}, z21\.b, z9\.b
+[^:]+: c160c400 sclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^:]+: c160c41e sclamp {z30\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160c7e0 sclamp {z0\.h-z1\.h}, z31\.h, z0\.h
+[^:]+: c17fc400 sclamp {z0\.h-z1\.h}, z0\.h, z31\.h
+[^:]+: c164c748 sclamp {z8\.h-z9\.h}, z26\.h, z4\.h
+[^:]+: c1a0c400 sclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^:]+: c1a0c41e sclamp {z30\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0c7e0 sclamp {z0\.s-z1\.s}, z31\.s, z0\.s
+[^:]+: c1bfc400 sclamp {z0\.s-z1\.s}, z0\.s, z31\.s
+[^:]+: c1aec532 sclamp {z18\.s-z19\.s}, z9\.s, z14\.s
+[^:]+: c1e0c400 sclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^:]+: c1e0c41e sclamp {z30\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0c7e0 sclamp {z0\.d-z1\.d}, z31\.d, z0\.d
+[^:]+: c1ffc400 sclamp {z0\.d-z1\.d}, z0\.d, z31\.d
+[^:]+: c1f6c56a sclamp {z10\.d-z11\.d}, z11\.d, z22\.d
+[^:]+: c120cc00 sclamp {z0\.b-z3\.b}, z0\.b, z0\.b
+[^:]+: c120cc1c sclamp {z28\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120cfe0 sclamp {z0\.b-z3\.b}, z31\.b, z0\.b
+[^:]+: c13fcc00 sclamp {z0\.b-z3\.b}, z0\.b, z31\.b
+[^:]+: c13ace64 sclamp {z4\.b-z7\.b}, z19\.b, z26\.b
+[^:]+: c160cc00 sclamp {z0\.h-z3\.h}, z0\.h, z0\.h
+[^:]+: c160cc1c sclamp {z28\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160cfe0 sclamp {z0\.h-z3\.h}, z31\.h, z0\.h
+[^:]+: c17fcc00 sclamp {z0\.h-z3\.h}, z0\.h, z31\.h
+[^:]+: c171cdf4 sclamp {z20\.h-z23\.h}, z15\.h, z17\.h
+[^:]+: c1a0cc00 sclamp {z0\.s-z3\.s}, z0\.s, z0\.s
+[^:]+: c1a0cc1c sclamp {z28\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0cfe0 sclamp {z0\.s-z3\.s}, z31\.s, z0\.s
+[^:]+: c1bfcc00 sclamp {z0\.s-z3\.s}, z0\.s, z31\.s
+[^:]+: c1a6cfb8 sclamp {z24\.s-z27\.s}, z29\.s, z6\.s
+[^:]+: c1e0cc00 sclamp {z0\.d-z3\.d}, z0\.d, z0\.d
+[^:]+: c1e0cc1c sclamp {z28\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0cfe0 sclamp {z0\.d-z3\.d}, z31\.d, z0\.d
+[^:]+: c1ffcc00 sclamp {z0\.d-z3\.d}, z0\.d, z31\.d
+[^:]+: c1fecce8 sclamp {z8\.d-z11\.d}, z7\.d, z30\.d
+[^:]+: c120c401 uclamp {z0\.b-z1\.b}, z0\.b, z0\.b
+[^:]+: c120c41f uclamp {z30\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120c7e1 uclamp {z0\.b-z1\.b}, z31\.b, z0\.b
+[^:]+: c13fc401 uclamp {z0\.b-z1\.b}, z0\.b, z31\.b
+[^:]+: c129c6a3 uclamp {z2\.b-z3\.b}, z21\.b, z9\.b
+[^:]+: c160c401 uclamp {z0\.h-z1\.h}, z0\.h, z0\.h
+[^:]+: c160c41f uclamp {z30\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160c7e1 uclamp {z0\.h-z1\.h}, z31\.h, z0\.h
+[^:]+: c17fc401 uclamp {z0\.h-z1\.h}, z0\.h, z31\.h
+[^:]+: c164c749 uclamp {z8\.h-z9\.h}, z26\.h, z4\.h
+[^:]+: c1a0c401 uclamp {z0\.s-z1\.s}, z0\.s, z0\.s
+[^:]+: c1a0c41f uclamp {z30\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0c7e1 uclamp {z0\.s-z1\.s}, z31\.s, z0\.s
+[^:]+: c1bfc401 uclamp {z0\.s-z1\.s}, z0\.s, z31\.s
+[^:]+: c1aec533 uclamp {z18\.s-z19\.s}, z9\.s, z14\.s
+[^:]+: c1e0c401 uclamp {z0\.d-z1\.d}, z0\.d, z0\.d
+[^:]+: c1e0c41f uclamp {z30\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0c7e1 uclamp {z0\.d-z1\.d}, z31\.d, z0\.d
+[^:]+: c1ffc401 uclamp {z0\.d-z1\.d}, z0\.d, z31\.d
+[^:]+: c1f6c56b uclamp {z10\.d-z11\.d}, z11\.d, z22\.d
+[^:]+: c120cc01 uclamp {z0\.b-z3\.b}, z0\.b, z0\.b
+[^:]+: c120cc1d uclamp {z28\.b-z31\.b}, z0\.b, z0\.b
+[^:]+: c120cfe1 uclamp {z0\.b-z3\.b}, z31\.b, z0\.b
+[^:]+: c13fcc01 uclamp {z0\.b-z3\.b}, z0\.b, z31\.b
+[^:]+: c13ace65 uclamp {z4\.b-z7\.b}, z19\.b, z26\.b
+[^:]+: c160cc01 uclamp {z0\.h-z3\.h}, z0\.h, z0\.h
+[^:]+: c160cc1d uclamp {z28\.h-z31\.h}, z0\.h, z0\.h
+[^:]+: c160cfe1 uclamp {z0\.h-z3\.h}, z31\.h, z0\.h
+[^:]+: c17fcc01 uclamp {z0\.h-z3\.h}, z0\.h, z31\.h
+[^:]+: c171cdf5 uclamp {z20\.h-z23\.h}, z15\.h, z17\.h
+[^:]+: c1a0cc01 uclamp {z0\.s-z3\.s}, z0\.s, z0\.s
+[^:]+: c1a0cc1d uclamp {z28\.s-z31\.s}, z0\.s, z0\.s
+[^:]+: c1a0cfe1 uclamp {z0\.s-z3\.s}, z31\.s, z0\.s
+[^:]+: c1bfcc01 uclamp {z0\.s-z3\.s}, z0\.s, z31\.s
+[^:]+: c1a6cfb9 uclamp {z24\.s-z27\.s}, z29\.s, z6\.s
+[^:]+: c1e0cc01 uclamp {z0\.d-z3\.d}, z0\.d, z0\.d
+[^:]+: c1e0cc1d uclamp {z28\.d-z31\.d}, z0\.d, z0\.d
+[^:]+: c1e0cfe1 uclamp {z0\.d-z3\.d}, z31\.d, z0\.d
+[^:]+: c1ffcc01 uclamp {z0\.d-z3\.d}, z0\.d, z31\.d
+[^:]+: c1fecce9 uclamp {z8\.d-z11\.d}, z7\.d, z30\.d
diff --git a/gas/testsuite/gas/aarch64/sme2-22.s b/gas/testsuite/gas/aarch64/sme2-22.s
new file mode 100644
index 00000000000..a209de18141
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sme2-22.s
@@ -0,0 +1,131 @@
+ fclamp { z0.h - z1.h }, z0.h, z0.h
+ fclamp { z30.h - z31.h }, z0.h, z0.h
+ fclamp { z0.h - z1.h }, z31.h, z0.h
+ fclamp { z0.h - z1.h }, z0.h, z31.h
+ fclamp { z8.h - z9.h }, z26.h, z4.h
+
+ fclamp { z0.s - z1.s }, z0.s, z0.s
+ fclamp { z30.s - z31.s }, z0.s, z0.s
+ fclamp { z0.s - z1.s }, z31.s, z0.s
+ fclamp { z0.s - z1.s }, z0.s, z31.s
+ fclamp { z18.s - z19.s }, z9.s, z14.s
+
+ fclamp { z0.d - z1.d }, z0.d, z0.d
+ fclamp { z30.d - z31.d }, z0.d, z0.d
+ fclamp { z0.d - z1.d }, z31.d, z0.d
+ fclamp { z0.d - z1.d }, z0.d, z31.d
+ fclamp { z10.d - z11.d }, z11.d, z22.d
+
+ fclamp { z0.h - z3.h }, z0.h, z0.h
+ fclamp { z28.h - z31.h }, z0.h, z0.h
+ fclamp { z0.h - z3.h }, z31.h, z0.h
+ fclamp { z0.h - z3.h }, z0.h, z31.h
+ fclamp { z20.h - z23.h }, z15.h, z17.h
+
+ fclamp { z0.s - z3.s }, z0.s, z0.s
+ fclamp { z28.s - z31.s }, z0.s, z0.s
+ fclamp { z0.s - z3.s }, z31.s, z0.s
+ fclamp { z0.s - z3.s }, z0.s, z31.s
+ fclamp { z24.s - z27.s }, z29.s, z6.s
+
+ fclamp { z0.d - z3.d }, z0.d, z0.d
+ fclamp { z28.d - z31.d }, z0.d, z0.d
+ fclamp { z0.d - z3.d }, z31.d, z0.d
+ fclamp { z0.d - z3.d }, z0.d, z31.d
+ fclamp { z8.d - z11.d }, z7.d, z30.d
+
+ sclamp { z0.b - z1.b }, z0.b, z0.b
+ sclamp { z30.b - z31.b }, z0.b, z0.b
+ sclamp { z0.b - z1.b }, z31.b, z0.b
+ sclamp { z0.b - z1.b }, z0.b, z31.b
+ sclamp { z2.b - z3.b }, z21.b, z9.b
+
+ sclamp { z0.h - z1.h }, z0.h, z0.h
+ sclamp { z30.h - z31.h }, z0.h, z0.h
+ sclamp { z0.h - z1.h }, z31.h, z0.h
+ sclamp { z0.h - z1.h }, z0.h, z31.h
+ sclamp { z8.h - z9.h }, z26.h, z4.h
+
+ sclamp { z0.s - z1.s }, z0.s, z0.s
+ sclamp { z30.s - z31.s }, z0.s, z0.s
+ sclamp { z0.s - z1.s }, z31.s, z0.s
+ sclamp { z0.s - z1.s }, z0.s, z31.s
+ sclamp { z18.s - z19.s }, z9.s, z14.s
+
+ sclamp { z0.d - z1.d }, z0.d, z0.d
+ sclamp { z30.d - z31.d }, z0.d, z0.d
+ sclamp { z0.d - z1.d }, z31.d, z0.d
+ sclamp { z0.d - z1.d }, z0.d, z31.d
+ sclamp { z10.d - z11.d }, z11.d, z22.d
+
+ sclamp { z0.b - z3.b }, z0.b, z0.b
+ sclamp { z28.b - z31.b }, z0.b, z0.b
+ sclamp { z0.b - z3.b }, z31.b, z0.b
+ sclamp { z0.b - z3.b }, z0.b, z31.b
+ sclamp { z4.b - z7.b }, z19.b, z26.b
+
+ sclamp { z0.h - z3.h }, z0.h, z0.h
+ sclamp { z28.h - z31.h }, z0.h, z0.h
+ sclamp { z0.h - z3.h }, z31.h, z0.h
+ sclamp { z0.h - z3.h }, z0.h, z31.h
+ sclamp { z20.h - z23.h }, z15.h, z17.h
+
+ sclamp { z0.s - z3.s }, z0.s, z0.s
+ sclamp { z28.s - z31.s }, z0.s, z0.s
+ sclamp { z0.s - z3.s }, z31.s, z0.s
+ sclamp { z0.s - z3.s }, z0.s, z31.s
+ sclamp { z24.s - z27.s }, z29.s, z6.s
+
+ sclamp { z0.d - z3.d }, z0.d, z0.d
+ sclamp { z28.d - z31.d }, z0.d, z0.d
+ sclamp { z0.d - z3.d }, z31.d, z0.d
+ sclamp { z0.d - z3.d }, z0.d, z31.d
+ sclamp { z8.d - z11.d }, z7.d, z30.d
+
+ uclamp { z0.b - z1.b }, z0.b, z0.b
+ uclamp { z30.b - z31.b }, z0.b, z0.b
+ uclamp { z0.b - z1.b }, z31.b, z0.b
+ uclamp { z0.b - z1.b }, z0.b, z31.b
+ uclamp { z2.b - z3.b }, z21.b, z9.b
+
+ uclamp { z0.h - z1.h }, z0.h, z0.h
+ uclamp { z30.h - z31.h }, z0.h, z0.h
+ uclamp { z0.h - z1.h }, z31.h, z0.h
+ uclamp { z0.h - z1.h }, z0.h, z31.h
+ uclamp { z8.h - z9.h }, z26.h, z4.h
+
+ uclamp { z0.s - z1.s }, z0.s, z0.s
+ uclamp { z30.s - z31.s }, z0.s, z0.s
+ uclamp { z0.s - z1.s }, z31.s, z0.s
+ uclamp { z0.s - z1.s }, z0.s, z31.s
+ uclamp { z18.s - z19.s }, z9.s, z14.s
+
+ uclamp { z0.d - z1.d }, z0.d, z0.d
+ uclamp { z30.d - z31.d }, z0.d, z0.d
+ uclamp { z0.d - z1.d }, z31.d, z0.d
+ uclamp { z0.d - z1.d }, z0.d, z31.d
+ uclamp { z10.d - z11.d }, z11.d, z22.d
+
+ uclamp { z0.b - z3.b }, z0.b, z0.b
+ uclamp { z28.b - z31.b }, z0.b, z0.b
+ uclamp { z0.b - z3.b }, z31.b, z0.b
+ uclamp { z0.b - z3.b }, z0.b, z31.b
+ uclamp { z4.b - z7.b }, z19.b, z26.b
+
+ uclamp { z0.h - z3.h }, z0.h, z0.h
+ uclamp { z28.h - z31.h }, z0.h, z0.h
+ uclamp { z0.h - z3.h }, z31.h, z0.h
+ uclamp { z0.h - z3.h }, z0.h, z31.h
+ uclamp { z20.h - z23.h }, z15.h, z17.h
+
+ uclamp { z0.s - z3.s }, z0.s, z0.s
+ uclamp { z28.s - z31.s }, z0.s, z0.s
+ uclamp { z0.s - z3.s }, z31.s, z0.s
+ uclamp { z0.s - z3.s }, z0.s, z31.s
+ uclamp { z24.s - z27.s }, z29.s, z6.s
+
+ uclamp { z0.d - z3.d }, z0.d, z0.d
+ uclamp { z28.d - z31.d }, z0.d, z0.d
+ uclamp { z0.d - z3.d }, z31.d, z0.d
+ uclamp { z0.d - z3.d }, z0.d, z31.d
+ uclamp { z8.d - z11.d }, z7.d, z30.d
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 672475aee5b..9baf928fa96 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2839;
+ return 2845;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2587;
+ return 2589;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2586;
+ return 2588;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2585;
+ return 2587;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2594;
+ return 2596;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2590;
+ return 2592;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2584;
+ return 2586;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2583;
+ return 2585;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2605;
+ return 2607;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2604;
+ return 2606;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2582;
+ return 2584;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2592;
+ return 2594;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2588;
+ return 2590;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2595;
+ return 2597;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2591;
+ return 2593;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2593;
+ return 2595;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2589;
+ return 2591;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2521;
+ return 2523;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2522;
+ return 2524;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2545;
+ return 2547;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2546;
+ return 2548;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2537;
+ return 2539;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2538;
+ return 2540;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2529;
+ return 2531;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2530;
+ return 2532;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2553;
+ return 2555;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2554;
+ return 2556;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2577;
+ return 2579;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2578;
+ return 2580;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2569;
+ return 2571;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2570;
+ return 2572;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2561;
+ return 2563;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2562;
+ return 2564;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2663;
+ return 2667;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2664;
+ return 2668;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2517;
+ return 2519;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2518;
+ return 2520;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2541;
+ return 2543;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2542;
+ return 2544;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2533;
+ return 2535;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2534;
+ return 2536;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2525;
+ return 2527;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2526;
+ return 2528;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2549;
+ return 2551;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2550;
+ return 2552;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2573;
+ return 2575;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2574;
+ return 2576;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2565;
+ return 2567;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2566;
+ return 2568;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2557;
+ return 2559;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2558;
+ return 2560;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2677;
+ return 2681;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2678;
+ return 2682;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2701;
+ return 2705;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2702;
+ return 2706;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2693;
+ return 2697;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2694;
+ return 2698;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2685;
+ return 2689;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2686;
+ return 2690;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2709;
+ return 2713;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2710;
+ return 2714;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2733;
+ return 2737;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2734;
+ return 2738;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2725;
+ return 2729;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2726;
+ return 2730;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2717;
+ return 2721;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2718;
+ return 2722;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2673;
+ return 2677;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2674;
+ return 2678;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2697;
+ return 2701;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2698;
+ return 2702;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2689;
+ return 2693;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2690;
+ return 2694;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2681;
+ return 2685;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2682;
+ return 2686;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2705;
+ return 2709;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2706;
+ return 2710;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2729;
+ return 2733;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2730;
+ return 2734;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2721;
+ return 2725;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2722;
+ return 2726;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2713;
+ return 2717;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2714;
+ return 2718;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2639;
+ return 2643;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2820;
+ return 2826;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2640;
+ return 2644;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2641;
+ return 2645;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2821;
+ return 2827;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2822;
+ return 2828;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2784;
+ return 2790;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2748;
+ return 2752;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2785;
+ return 2791;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2786;
+ return 2792;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2749;
+ return 2753;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2750;
+ return 2754;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2655;
+ return 2659;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2656;
+ return 2660;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2657;
+ return 2661;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2800;
+ return 2806;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2801;
+ return 2807;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2802;
+ return 2808;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2523;
+ return 2525;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2547;
+ return 2549;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2539;
+ return 2541;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2531;
+ return 2533;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2555;
+ return 2557;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2579;
+ return 2581;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2571;
+ return 2573;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2563;
+ return 2565;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2524;
+ return 2526;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2581;
+ return 2583;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2548;
+ return 2550;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2540;
+ return 2542;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2532;
+ return 2534;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2556;
+ return 2558;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2580;
+ return 2582;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2572;
+ return 2574;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2564;
+ return 2566;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2842;
+ return 2848;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2843;
+ return 2849;
[...]
[diff truncated at 100000 bytes]
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