* [binutils-gdb] aarch64: Add new SVE dot-product instructions
@ 2023-03-30 10:16 Richard Sandiford
0 siblings, 0 replies; only message in thread
From: Richard Sandiford @ 2023-03-30 10:16 UTC (permalink / raw)
To: bfd-cvs
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=dfc12f9f533ea0614ad655370c5f8373081b0c61
commit dfc12f9f533ea0614ad655370c5f8373081b0c61
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Thu Mar 30 11:09:17 2023 +0100
aarch64: Add new SVE dot-product instructions
This patch adds the SVE FDOT, SDOT and UDOT instructions,
which are available when FEAT_SME2 is implemented. The patch
also reorders the existing SVE_Zm3_22_INDEX to keep the
operands numerically sorted.
Diff:
---
gas/config/tc-aarch64.c | 1 +
gas/testsuite/gas/aarch64/sve-invalid.l | 16 +-
gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d | 3 +
gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l | 17 +
gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s | 15 +
gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d | 3 +
gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l | 40 +
gas/testsuite/gas/aarch64/sve2-sme2-4.d | 54 +
gas/testsuite/gas/aarch64/sve2-sme2-4.s | 49 +
include/opcode/aarch64.h | 3 +-
opcodes/aarch64-asm-2.c | 69 +-
opcodes/aarch64-dis-2.c | 1673 ++++++++++++-----------
opcodes/aarch64-opc-2.c | 3 +-
opcodes/aarch64-opc.c | 3 +
opcodes/aarch64-opc.h | 1 +
opcodes/aarch64-tbl.h | 15 +-
16 files changed, 1111 insertions(+), 854 deletions(-)
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 781c87bbc41..5aa51400c03 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -6732,6 +6732,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SVE_Zm3_INDEX:
case AARCH64_OPND_SVE_Zm3_22_INDEX:
+ case AARCH64_OPND_SVE_Zm3_19_INDEX:
case AARCH64_OPND_SVE_Zm3_11_INDEX:
case AARCH64_OPND_SVE_Zm4_11_INDEX:
case AARCH64_OPND_SVE_Zm4_INDEX:
diff --git a/gas/testsuite/gas/aarch64/sve-invalid.l b/gas/testsuite/gas/aarch64/sve-invalid.l
index a02fbfe28ef..3dcb06341e5 100644
--- a/gas/testsuite/gas/aarch64/sve-invalid.l
+++ b/gas/testsuite/gas/aarch64/sve-invalid.l
@@ -1155,14 +1155,10 @@
.*: Info: sdot z0\.d, z1\.h, z2\.h
.*: Error: operand mismatch -- `sdot z0\.h,z1\.h,z2\.h'
.*: Info: did you mean this\?
-.*: Info: sdot z0\.d, z1\.h, z2\.h
-.*: Info: other valid variant\(s\):
-.*: Info: sdot z0\.s, z1\.b, z2\.b
+.*: Info: sdot z0\.s, z1\.h, z2\.h
.*: Error: operand mismatch -- `sdot z0\.s,z1\.s,z2\.s'
.*: Info: did you mean this\?
-.*: Info: sdot z0\.s, z1\.b, z2\.b
-.*: Info: other valid variant\(s\):
-.*: Info: sdot z0\.d, z1\.h, z2\.h
+.*: Info: sdot z0\.s, z1\.h, z2\.h
.*: Error: operand mismatch -- `sdot z0\.d,z1\.d,z2\.d'
.*: Info: did you mean this\?
.*: Info: sdot z0\.d, z1\.h, z2\.h
@@ -1187,14 +1183,10 @@
.*: Info: udot z0\.d, z1\.h, z2\.h
.*: Error: operand mismatch -- `udot z0\.h,z1\.h,z2\.h'
.*: Info: did you mean this\?
-.*: Info: udot z0\.d, z1\.h, z2\.h
-.*: Info: other valid variant\(s\):
-.*: Info: udot z0\.s, z1\.b, z2\.b
+.*: Info: udot z0\.s, z1\.h, z2\.h
.*: Error: operand mismatch -- `udot z0\.s,z1\.s,z2\.s'
.*: Info: did you mean this\?
-.*: Info: udot z0\.s, z1\.b, z2\.b
-.*: Info: other valid variant\(s\):
-.*: Info: udot z0\.d, z1\.h, z2\.h
+.*: Info: udot z0\.s, z1\.h, z2\.h
.*: Error: operand mismatch -- `udot z0\.d,z1\.d,z2\.d'
.*: Info: did you mean this\?
.*: Info: udot z0\.d, z1\.h, z2\.h
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d
new file mode 100644
index 00000000000..c7d6255c81c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme2
+#source: sve2-sme2-4-invalid.s
+#error_output: sve2-sme2-4-invalid.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l
new file mode 100644
index 00000000000..faa67b7b794
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l
@@ -0,0 +1,17 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `fdot 0,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fdot z0\.s,0,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fdot z0\.s,z0\.h,0'
+[^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `fdot z0\.s,z0\.h,z8\.h\[0\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fdot z0\.s,z0\.h,z0\.h\[-1\]'
+[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fdot z0\.s,z0\.h,z0\.h\[4\]'
+[^ :]+:[0-9]+: Error: operand mismatch -- `fdot z0\.h,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fdot z0\.s, z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Error: operand mismatch -- `fdot z0\.d,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Info: did you mean this\?
+[^ :]+:[0-9]+: Info: fdot z0\.s, z0\.h, z0\.h\[0\]
+[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' used as input at operand 2 -- `fdot z0\.s,z0\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' not used in current instruction at operand 1 -- `fdot z0\.s,z1\.h,z2\.h\[0\]'
+[^ :]+:[0-9]+: Warning: predicated instruction expected after `movprfx' -- `fdot z0\.s,z1\.h,z2\.h\[0\]'
+[^ :]+:[0-9]+: Warning: predicated instruction expected after `movprfx' -- `fdot z0\.s,z1\.h,z2\.h\[0\]'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s
new file mode 100644
index 00000000000..61cc5717dd0
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s
@@ -0,0 +1,15 @@
+ fdot 0, z0.h, z0.h[0]
+ fdot z0.s, 0, z0.h[0]
+ fdot z0.s, z0.h, 0
+
+ fdot z0.s, z0.h, z8.h[0]
+ fdot z0.s, z0.h, z0.h[-1]
+ fdot z0.s, z0.h, z0.h[4]
+ fdot z0.h, z0.h, z0.h[0]
+ fdot z0.d, z0.h, z0.h[0]
+
+ movprfx z0, z1; fdot z0.s, z0.h, z1.h[0]
+ movprfx z0, z1; fdot z0.s, z1.h, z0.h[0]
+ movprfx z3, z4; fdot z0.s, z1.h, z2.h[0]
+ movprfx z0.s, p0/m, z1.s; fdot z0.s, z1.h, z2.h[0]
+ movprfx z0.s, p0/z, z1.s; fdot z0.s, z1.h, z2.h[0]
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d
new file mode 100644
index 00000000000..1afb0c45801
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d
@@ -0,0 +1,3 @@
+#as: -march=armv8-a+sme
+#source: sve2-sme2-4.s
+#error_output: sve2-sme2-4-noarch.l
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l
new file mode 100644
index 00000000000..0eeae8bd345
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l
@@ -0,0 +1,40 @@
+[^ :]+: Assembler messages:
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot Z0\.S,Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z31\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z7\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z1\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z31\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z14\.s,z26\.h,z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z1\.h,z2\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot Z0\.S,Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z31\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z7\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z1\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z31\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z14\.s,z26\.h,z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z1\.h,z2\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot Z0\.S,Z0\.H,Z0\.H\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z31\.s,z0\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z31\.h,z0\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z7\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z0\.h\[3\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z1\.h,z1\.h\[0\]'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z31\.s,z0\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z31\.h,z0\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z31\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z14\.s,z26\.h,z9\.h'
+[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z1\.h,z2\.h'
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4.d b/gas/testsuite/gas/aarch64/sve2-sme2-4.d
new file mode 100644
index 00000000000..b7bf3afbcad
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4.d
@@ -0,0 +1,54 @@
+#as: -march=armv8-a+sme2
+#objdump: -dr
+
+[^:]+: file format .*
+
+
+[^:]+:
+
+[^:]+:
+[^:]+: 64204000 fdot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 64204000 fdot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 6420401f fdot z31\.s, z0\.h, z0\.h\[0\]
+[^:]+: 642043e0 fdot z0\.s, z31\.h, z0\.h\[0\]
+[^:]+: 64274000 fdot z0\.s, z0\.h, z7\.h\[0\]
+[^:]+: 64384000 fdot z0\.s, z0\.h, z0\.h\[3\]
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 64214020 fdot z0\.s, z1\.h, z1\.h\[0\]
+[^:]+: 64208000 fdot z0\.s, z0\.h, z0\.h
+[^:]+: 6420801f fdot z31\.s, z0\.h, z0\.h
+[^:]+: 642083e0 fdot z0\.s, z31\.h, z0\.h
+[^:]+: 643f8000 fdot z0\.s, z0\.h, z31\.h
+[^:]+: 6429834e fdot z14\.s, z26\.h, z9\.h
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 64228020 fdot z0\.s, z1\.h, z2\.h
+[^:]+: 4480c800 sdot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480c800 sdot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480c81f sdot z31\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480cbe0 sdot z0\.s, z31\.h, z0\.h\[0\]
+[^:]+: 4487c800 sdot z0\.s, z0\.h, z7\.h\[0\]
+[^:]+: 4498c800 sdot z0\.s, z0\.h, z0\.h\[3\]
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 4481c820 sdot z0\.s, z1\.h, z1\.h\[0\]
+[^:]+: 4400c800 sdot z0\.s, z0\.h, z0\.h
+[^:]+: 4400c81f sdot z31\.s, z0\.h, z0\.h
+[^:]+: 4400cbe0 sdot z0\.s, z31\.h, z0\.h
+[^:]+: 441fc800 sdot z0\.s, z0\.h, z31\.h
+[^:]+: 4409cb4e sdot z14\.s, z26\.h, z9\.h
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 4402c820 sdot z0\.s, z1\.h, z2\.h
+[^:]+: 4480cc00 udot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480cc00 udot z0\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480cc1f udot z31\.s, z0\.h, z0\.h\[0\]
+[^:]+: 4480cfe0 udot z0\.s, z31\.h, z0\.h\[0\]
+[^:]+: 4487cc00 udot z0\.s, z0\.h, z7\.h\[0\]
+[^:]+: 4498cc00 udot z0\.s, z0\.h, z0\.h\[3\]
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 4481cc20 udot z0\.s, z1\.h, z1\.h\[0\]
+[^:]+: 4400cc00 udot z0\.s, z0\.h, z0\.h
+[^:]+: 4400cc1f udot z31\.s, z0\.h, z0\.h
+[^:]+: 4400cfe0 udot z0\.s, z31\.h, z0\.h
+[^:]+: 441fcc00 udot z0\.s, z0\.h, z31\.h
+[^:]+: 4409cf4e udot z14\.s, z26\.h, z9\.h
+[^:]+: 0420bc20 movprfx z0, z1
+[^:]+: 4402cc20 udot z0\.s, z1\.h, z2\.h
diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4.s b/gas/testsuite/gas/aarch64/sve2-sme2-4.s
new file mode 100644
index 00000000000..1f823238726
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sve2-sme2-4.s
@@ -0,0 +1,49 @@
+ fdot z0.s, z0.h, z0.h[0]
+ FDOT Z0.S, Z0.H, Z0.H[0]
+ fdot z31.s, z0.h, z0.h[0]
+ fdot z0.s, z31.h, z0.h[0]
+ fdot z0.s, z0.h, z7.h[0]
+ fdot z0.s, z0.h, z0.h[3]
+
+ movprfx z0, z1; fdot z0.s, z1.h, z1.h[0]
+
+ fdot z0.s, z0.h, z0.h
+ fdot z31.s, z0.h, z0.h
+ fdot z0.s, z31.h, z0.h
+ fdot z0.s, z0.h, z31.h
+ fdot z14.s, z26.h, z9.h
+
+ movprfx z0, z1; fdot z0.s, z1.h, z2.h
+
+ sdot z0.s, z0.h, z0.h[0]
+ SDOT Z0.S, Z0.H, Z0.H[0]
+ sdot z31.s, z0.h, z0.h[0]
+ sdot z0.s, z31.h, z0.h[0]
+ sdot z0.s, z0.h, z7.h[0]
+ sdot z0.s, z0.h, z0.h[3]
+
+ movprfx z0, z1; sdot z0.s, z1.h, z1.h[0]
+
+ sdot z0.s, z0.h, z0.h
+ sdot z31.s, z0.h, z0.h
+ sdot z0.s, z31.h, z0.h
+ sdot z0.s, z0.h, z31.h
+ sdot z14.s, z26.h, z9.h
+
+ movprfx z0, z1; sdot z0.s, z1.h, z2.h
+ udot z0.s, z0.h, z0.h[0]
+ UDOT Z0.S, Z0.H, Z0.H[0]
+ udot z31.s, z0.h, z0.h[0]
+ udot z0.s, z31.h, z0.h[0]
+ udot z0.s, z0.h, z7.h[0]
+ udot z0.s, z0.h, z0.h[3]
+
+ movprfx z0, z1; udot z0.s, z1.h, z1.h[0]
+
+ udot z0.s, z0.h, z0.h
+ udot z31.s, z0.h, z0.h
+ udot z0.s, z31.h, z0.h
+ udot z0.s, z0.h, z31.h
+ udot z14.s, z26.h, z9.h
+
+ movprfx z0, z1; udot z0.s, z1.h, z2.h
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index a4f1623d4ca..e179e484b9a 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -476,8 +476,9 @@ enum aarch64_opnd
AARCH64_OPND_SVE_Zm_5, /* SVE vector register in Zm, bits [9,5]. */
AARCH64_OPND_SVE_Zm_16, /* SVE vector register in Zm, bits [20,16]. */
AARCH64_OPND_SVE_Zm3_INDEX, /* z0-z7[0-3] in Zm, bits [20,16]. */
- AARCH64_OPND_SVE_Zm3_22_INDEX, /* z0-z7[0-7] in Zm3_INDEX plus bit 22. */
AARCH64_OPND_SVE_Zm3_11_INDEX, /* z0-z7[0-7] in Zm3_INDEX plus bit 11. */
+ AARCH64_OPND_SVE_Zm3_19_INDEX, /* z0-z7[0-3] in Zm3_INDEX plus bit 19. */
+ AARCH64_OPND_SVE_Zm3_22_INDEX, /* z0-z7[0-7] in Zm3_INDEX plus bit 22. */
AARCH64_OPND_SVE_Zm4_11_INDEX, /* z0-z15[0-3] in Zm plus bit 11. */
AARCH64_OPND_SVE_Zm4_INDEX, /* z0-z15[0-1] in Zm, bits [20,16]. */
AARCH64_OPND_SVE_Zn, /* SVE vector register in Zn. */
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index 03d1c0e1221..1ea3da1aa21 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -665,15 +665,15 @@ aarch64_insert_operand (const aarch64_operand *self,
case 201:
case 202:
case 203:
- case 209:
- case 212:
- case 216:
- case 223:
+ case 210:
+ case 213:
+ case 217:
case 224:
- case 231:
+ case 225:
case 232:
case 233:
case 234:
+ case 235:
return aarch64_ins_regno (self, info, code, inst, errors);
case 15:
return aarch64_ins_reg_extended (self, info, code, inst, errors);
@@ -685,7 +685,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 270:
+ case 271:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -730,13 +730,13 @@ aarch64_insert_operand (const aarch64_operand *self,
case 192:
case 193:
case 194:
- case 237:
- case 264:
+ case 238:
case 265:
- case 267:
- case 269:
- case 274:
+ case 266:
+ case 268:
+ case 270:
case 275:
+ case 276:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
@@ -805,8 +805,8 @@ aarch64_insert_operand (const aarch64_operand *self,
case 107:
return aarch64_ins_prfop (self, info, code, inst, errors);
case 108:
- case 266:
- case 268:
+ case 267:
+ case 269:
return aarch64_ins_none (self, info, code, inst, errors);
case 109:
return aarch64_ins_hint (self, info, code, inst, errors);
@@ -886,41 +886,41 @@ aarch64_insert_operand (const aarch64_operand *self,
case 184:
case 185:
case 186:
- case 250:
+ case 251:
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
case 204:
case 205:
case 206:
case 207:
case 208:
+ case 209:
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
- case 210:
- return aarch64_ins_sve_index (self, info, code, inst, errors);
case 211:
- case 213:
- case 230:
- return aarch64_ins_sve_reglist (self, info, code, inst, errors);
+ return aarch64_ins_sve_index (self, info, code, inst, errors);
+ case 212:
case 214:
+ case 231:
+ return aarch64_ins_sve_reglist (self, info, code, inst, errors);
case 215:
- case 217:
+ case 216:
case 218:
case 219:
case 220:
- case 229:
- return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 221:
+ case 230:
+ return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors);
case 222:
+ case 223:
return aarch64_ins_sve_strided_reglist (self, info, code, inst, errors);
- case 225:
- case 227:
- case 238:
- return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
case 226:
case 228:
+ case 239:
+ return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors);
+ case 227:
+ case 229:
return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors);
- case 235:
case 236:
- case 251:
+ case 237:
case 252:
case 253:
case 254:
@@ -933,26 +933,27 @@ aarch64_insert_operand (const aarch64_operand *self,
case 261:
case 262:
case 263:
+ case 264:
return aarch64_ins_simple_index (self, info, code, inst, errors);
- case 239:
case 240:
case 241:
case 242:
case 243:
case 244:
case 245:
- return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 246:
- return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
+ return aarch64_ins_sme_za_array (self, info, code, inst, errors);
case 247:
- return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
+ return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors);
case 248:
- return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ return aarch64_ins_sme_sm_za (self, info, code, inst, errors);
case 249:
+ return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors);
+ case 250:
return aarch64_ins_plain_shrimm (self, info, code, inst, errors);
- case 271:
case 272:
case 273:
+ case 274:
return aarch64_ins_x0_to_x30 (self, info, code, inst, errors);
default: assert (0); abort ();
}
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index a122e908630..f67f77f1783 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -81,7 +81,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx01xxx
bmopa. */
- return 2465;
+ return 2471;
}
else
{
@@ -89,7 +89,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0000000100xxxxxxxxxxxxxxxx11xxx
bmops. */
- return 2466;
+ return 2472;
}
}
}
@@ -188,7 +188,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x100xxxxxxxxxxxxxxxxx
zero. */
- return 2895;
+ return 2901;
}
}
}
@@ -212,7 +212,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx0xxxxxxxxxxxxxx
luti4. */
- return 2609;
+ return 2615;
}
else
{
@@ -220,7 +220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x101xx1xxxxxxxxxxxxxx
luti4. */
- return 2608;
+ return 2614;
}
}
else
@@ -229,7 +229,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x10x101xxxxxxxxxxxxxxxxx
luti4. */
- return 2607;
+ return 2613;
}
}
}
@@ -248,7 +248,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x010xxxxx00xxxxxxxxxx
mov. */
- return 2616;
+ return 2622;
}
else
{
@@ -256,7 +256,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0x011xxxxx00xxxxxxxxxx
mov. */
- return 2612;
+ return 2618;
}
}
else
@@ -269,7 +269,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx0xx00xxxxxxxxxx
luti2. */
- return 2606;
+ return 2612;
}
else
{
@@ -277,7 +277,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000x00x11xxx1xx00xxxxxxxxxx
luti2. */
- return 2605;
+ return 2611;
}
}
else
@@ -290,7 +290,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x110xxxxx00xxxxxxxxxx
movt. */
- return 2627;
+ return 2633;
}
else
{
@@ -298,7 +298,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000010x111xxxxx00xxxxxxxxxx
movt. */
- return 2626;
+ return 2632;
}
}
else
@@ -307,7 +307,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000110x11xxxxxx00xxxxxxxxxx
luti2. */
- return 2604;
+ return 2610;
}
}
}
@@ -320,7 +320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx10xxxxxxxxxx
mov. */
- return 2614;
+ return 2620;
}
else
{
@@ -328,7 +328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx10xxxxxxxxxx
mov. */
- return 2610;
+ return 2616;
}
}
}
@@ -342,7 +342,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx01xxxxxxxxxx
mov. */
- return 2617;
+ return 2623;
}
else
{
@@ -350,7 +350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx01xxxxxxxxxx
mov. */
- return 2613;
+ return 2619;
}
}
else
@@ -361,7 +361,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx10xxxxx11xxxxxxxxxx
mov. */
- return 2615;
+ return 2621;
}
else
{
@@ -369,7 +369,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1000000xx0xx11xxxxx11xxxxxxxxxx
mov. */
- return 2611;
+ return 2617;
}
}
}
@@ -396,7 +396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2543;
+ return 2549;
}
else
{
@@ -404,7 +404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2544;
+ return 2550;
}
}
else
@@ -415,7 +415,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2567;
+ return 2573;
}
else
{
@@ -423,7 +423,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2568;
+ return 2574;
}
}
}
@@ -437,7 +437,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2559;
+ return 2565;
}
else
{
@@ -445,7 +445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2560;
+ return 2566;
}
}
else
@@ -456,7 +456,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2551;
+ return 2557;
}
else
{
@@ -464,7 +464,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2552;
+ return 2558;
}
}
}
@@ -481,7 +481,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2575;
+ return 2581;
}
else
{
@@ -489,7 +489,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2576;
+ return 2582;
}
}
else
@@ -500,7 +500,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2599;
+ return 2605;
}
else
{
@@ -508,7 +508,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2600;
+ return 2606;
}
}
}
@@ -522,7 +522,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2591;
+ return 2597;
}
else
{
@@ -530,7 +530,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2592;
+ return 2598;
}
}
else
@@ -541,7 +541,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2583;
+ return 2589;
}
else
{
@@ -549,7 +549,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000000xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2584;
+ return 2590;
}
}
}
@@ -584,7 +584,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000100xxxxxxxxxxxxxxxx01xxx
smopa. */
- return 2689;
+ return 2695;
}
}
else
@@ -612,7 +612,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100000100xxxxxxxxxxxxxxxx11xxx
smops. */
- return 2690;
+ return 2696;
}
}
}
@@ -635,7 +635,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx0
ld1b. */
- return 2539;
+ return 2545;
}
else
{
@@ -643,7 +643,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx0
ld1b. */
- return 2540;
+ return 2546;
}
}
else
@@ -654,7 +654,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx0
ld1w. */
- return 2563;
+ return 2569;
}
else
{
@@ -662,7 +662,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx0
ld1w. */
- return 2564;
+ return 2570;
}
}
}
@@ -676,7 +676,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx0
ld1h. */
- return 2555;
+ return 2561;
}
else
{
@@ -684,7 +684,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx0
ld1h. */
- return 2556;
+ return 2562;
}
}
else
@@ -695,7 +695,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx0
ld1d. */
- return 2547;
+ return 2553;
}
else
{
@@ -703,7 +703,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx0
ld1d. */
- return 2548;
+ return 2554;
}
}
}
@@ -720,7 +720,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx000xxxxxxxxxxxx1
ldnt1b. */
- return 2571;
+ return 2577;
}
else
{
@@ -728,7 +728,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx100xxxxxxxxxxxx1
ldnt1b. */
- return 2572;
+ return 2578;
}
}
else
@@ -739,7 +739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx010xxxxxxxxxxxx1
ldnt1w. */
- return 2595;
+ return 2601;
}
else
{
@@ -747,7 +747,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx110xxxxxxxxxxxx1
ldnt1w. */
- return 2596;
+ return 2602;
}
}
}
@@ -761,7 +761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx001xxxxxxxxxxxx1
ldnt1h. */
- return 2587;
+ return 2593;
}
else
{
@@ -769,7 +769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx101xxxxxxxxxxxx1
ldnt1h. */
- return 2588;
+ return 2594;
}
}
else
@@ -780,7 +780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx011xxxxxxxxxxxx1
ldnt1d. */
- return 2579;
+ return 2585;
}
else
{
@@ -788,7 +788,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100000010xxxxx111xxxxxxxxxxxx1
ldnt1d. */
- return 2580;
+ return 2586;
}
}
}
@@ -856,7 +856,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2715;
+ return 2721;
}
else
{
@@ -864,7 +864,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2716;
+ return 2722;
}
}
else
@@ -875,7 +875,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2739;
+ return 2745;
}
else
{
@@ -883,7 +883,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2740;
+ return 2746;
}
}
}
@@ -897,7 +897,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2731;
+ return 2737;
}
else
{
@@ -905,7 +905,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2732;
+ return 2738;
}
}
else
@@ -916,7 +916,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2723;
+ return 2729;
}
else
{
@@ -924,7 +924,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2724;
+ return 2730;
}
}
}
@@ -941,7 +941,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2747;
+ return 2753;
}
else
{
@@ -949,7 +949,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2748;
+ return 2754;
}
}
else
@@ -960,7 +960,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2771;
+ return 2777;
}
else
{
@@ -968,7 +968,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2772;
+ return 2778;
}
}
}
@@ -982,7 +982,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2763;
+ return 2769;
}
else
{
@@ -990,7 +990,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2764;
+ return 2770;
}
}
else
@@ -1001,7 +1001,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2755;
+ return 2761;
}
else
{
@@ -1009,7 +1009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000001xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2756;
+ return 2762;
}
}
}
@@ -1073,7 +1073,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx0
st1b. */
- return 2711;
+ return 2717;
}
else
{
@@ -1081,7 +1081,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx0
st1b. */
- return 2712;
+ return 2718;
}
}
else
@@ -1092,7 +1092,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx0
st1w. */
- return 2735;
+ return 2741;
}
else
{
@@ -1100,7 +1100,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx0
st1w. */
- return 2736;
+ return 2742;
}
}
}
@@ -1114,7 +1114,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx0
st1h. */
- return 2727;
+ return 2733;
}
else
{
@@ -1122,7 +1122,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx0
st1h. */
- return 2728;
+ return 2734;
}
}
else
@@ -1133,7 +1133,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx0
st1d. */
- return 2719;
+ return 2725;
}
else
{
@@ -1141,7 +1141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx0
st1d. */
- return 2720;
+ return 2726;
}
}
}
@@ -1158,7 +1158,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx000xxxxxxxxxxxx1
stnt1b. */
- return 2743;
+ return 2749;
}
else
{
@@ -1166,7 +1166,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx100xxxxxxxxxxxx1
stnt1b. */
- return 2744;
+ return 2750;
}
}
else
@@ -1177,7 +1177,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx010xxxxxxxxxxxx1
stnt1w. */
- return 2767;
+ return 2773;
}
else
{
@@ -1185,7 +1185,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx110xxxxxxxxxxxx1
stnt1w. */
- return 2768;
+ return 2774;
}
}
}
@@ -1199,7 +1199,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx001xxxxxxxxxxxx1
stnt1h. */
- return 2759;
+ return 2765;
}
else
{
@@ -1207,7 +1207,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx101xxxxxxxxxxxx1
stnt1h. */
- return 2760;
+ return 2766;
}
}
else
@@ -1218,7 +1218,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx011xxxxxxxxxxxx1
stnt1d. */
- return 2751;
+ return 2757;
}
else
{
@@ -1226,7 +1226,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0x00000011xxxxx111xxxxxxxxxxxx1
stnt1d. */
- return 2752;
+ return 2758;
}
}
}
@@ -1318,7 +1318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx000xx
smlall. */
- return 2665;
+ return 2671;
}
else
{
@@ -1326,7 +1326,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx001xx
usmlall. */
- return 2870;
+ return 2876;
}
}
else
@@ -1339,7 +1339,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx000xxx
smlall. */
- return 2666;
+ return 2672;
}
else
{
@@ -1347,7 +1347,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx000xxx
smlall. */
- return 2667;
+ return 2673;
}
}
else
@@ -1358,7 +1358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx100xxx
usmlall. */
- return 2871;
+ return 2877;
}
else
{
@@ -1366,7 +1366,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx100xxx
usmlall. */
- return 2872;
+ return 2878;
}
}
}
@@ -1381,7 +1381,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx100xx
umlall. */
- return 2828;
+ return 2834;
}
else
{
@@ -1389,7 +1389,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx101xx
sumlall. */
- return 2786;
+ return 2792;
}
}
else
@@ -1402,7 +1402,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx010xxx
umlall. */
- return 2829;
+ return 2835;
}
else
{
@@ -1410,7 +1410,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx010xxx
umlall. */
- return 2830;
+ return 2836;
}
}
else
@@ -1421,7 +1421,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxx110xxx
sumlall. */
- return 2787;
+ return 2793;
}
else
{
@@ -1429,7 +1429,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxx110xxx
sumlall. */
- return 2788;
+ return 2794;
}
}
}
@@ -1445,7 +1445,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx01xxx
smlsll. */
- return 2681;
+ return 2687;
}
else
{
@@ -1455,7 +1455,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx01xxx
smlsll. */
- return 2682;
+ return 2688;
}
else
{
@@ -1463,7 +1463,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx01xxx
smlsll. */
- return 2683;
+ return 2689;
}
}
}
@@ -1475,7 +1475,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010000xxxxxxxxxxxxxxx11xxx
umlsll. */
- return 2844;
+ return 2850;
}
else
{
@@ -1485,7 +1485,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx0xxxxxxxxxx11xxx
umlsll. */
- return 2845;
+ return 2851;
}
else
{
@@ -1493,7 +1493,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx0000010001xxxx1xxxxxxxxxx11xxx
umlsll. */
- return 2846;
+ return 2852;
}
}
}
@@ -1515,7 +1515,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx0xxx
ld1b. */
- return 2545;
+ return 2551;
}
else
{
@@ -1523,7 +1523,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx0xxx
ld1w. */
- return 2569;
+ return 2575;
}
}
else
@@ -1534,7 +1534,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx0xxx
ld1h. */
- return 2561;
+ return 2567;
}
else
{
@@ -1542,7 +1542,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx0xxx
ld1d. */
- return 2553;
+ return 2559;
}
}
}
@@ -1556,7 +1556,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx000xxxxxxxxx1xxx
ldnt1b. */
- return 2577;
+ return 2583;
}
else
{
@@ -1564,7 +1564,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx010xxxxxxxxx1xxx
ldnt1w. */
- return 2601;
+ return 2607;
}
}
else
@@ -1575,7 +1575,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx001xxxxxxxxx1xxx
ldnt1h. */
- return 2593;
+ return 2599;
}
else
{
@@ -1583,7 +1583,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx011xxxxxxxxx1xxx
ldnt1d. */
- return 2585;
+ return 2591;
}
}
}
@@ -1611,7 +1611,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0100001000xxxxx100xxxxxxxxx0xxx
ld1b. */
- return 2546;
+ return 2552;
}
else
{
@@ -1619,7 +1619,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1100001000xxxxx100xxxxxxxxx0xxx
ldr. */
- return 2603;
+ return 2609;
}
}
else
@@ -1628,7 +1628,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx0xxx
ld1w. */
- return 2570;
+ return 2576;
}
}
else
@@ -1639,7 +1639,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx0xxx
ld1h. */
- return 2562;
+ return 2568;
}
else
{
@@ -1647,7 +1647,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx0xxx
ld1d. */
- return 2554;
+ return 2560;
}
}
}
@@ -1661,7 +1661,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx100xxxxxxxxx1xxx
ldnt1b. */
- return 2578;
+ return 2584;
}
else
{
@@ -1669,7 +1669,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx110xxxxxxxxx1xxx
ldnt1w. */
- return 2602;
+ return 2608;
}
}
else
@@ -1680,7 +1680,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx101xxxxxxxxx1xxx
ldnt1h. */
- return 2594;
+ return 2600;
}
else
{
@@ -1688,7 +1688,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx100001000xxxxx111xxxxxxxxx1xxx
ldnt1d. */
- return 2586;
+ return 2592;
}
}
}
@@ -1721,7 +1721,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx00xxx
smlall. */
- return 2902;
+ return 2908;
}
else
{
@@ -1731,7 +1731,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx00xxx
smlall. */
- return 2903;
+ return 2909;
}
else
{
@@ -1739,7 +1739,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx00xxx
smlall. */
- return 2904;
+ return 2910;
}
}
}
@@ -1751,7 +1751,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx00xxx
fmlal. */
- return 2506;
+ return 2512;
}
else
{
@@ -1761,7 +1761,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx1xxxxxxx00xxx
fmlal. */
- return 2507;
+ return 2513;
}
else
{
@@ -1769,7 +1769,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx1xxxxxxx00xxx
fmlal. */
- return 2508;
+ return 2514;
}
}
}
@@ -1806,7 +1806,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx0xxxxxxx10xxx
umlall. */
- return 2911;
+ return 2917;
}
else
{
@@ -1816,7 +1816,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx0xx0xxxxxxx10xxx
umlall. */
- return 2912;
+ return 2918;
}
else
{
@@ -1824,7 +1824,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011001xxxx1xx0xxxxxxx10xxx
umlall. */
- return 2913;
+ return 2919;
}
}
}
@@ -1836,7 +1836,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10000011000xxxxxxx1xxxxxxx10xxx
bfmlal. */
- return 2448;
+ return 2454;
[...]
[diff truncated at 100000 bytes]
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