From: mengqinggang <mengqinggang@loongson.cn>
To: Feiyang Chen <chris.chenfeiyang@gmail.com>
Cc: Feiyang Chen <chenfeiyang@loongson.cn>,
liuzhensong@loongson.cn, xuchenghua@loongson.cn,
chenhuacai@loongson.cn, binutils@sourceware.org
Subject: Re: [PATCH] LoongArch: Add fcsr register names support
Date: Wed, 14 Jun 2023 16:39:38 +0800 [thread overview]
Message-ID: <09b1e6e3-0add-839e-1130-33bd1e40ccf0@loongson.cn> (raw)
In-Reply-To: <CACWXhK=aDDv2hzXjqhXtHqqaMrgpUj4o6XgwPtzCyd=9BqGNGQ@mail.gmail.com>
I think forbid r4-r31 is a safer choice.
To prevent the use of general registers (r0-r3) in the future, a warning
message can be output.
在 2023/6/14 下午3:28, Feiyang Chen 写道:
> On Wed, Jun 14, 2023 at 3:07 PM mengqinggang <mengqinggang@loongson.cn> wrote:
>> Because there are only fcsr0-fcsr3, whether fc_htab just append r0-r3?
>>
>> Any general register bigger than r3 is invalid?
>>
> I believe this is a good approach, similar to what LLVM appears to do.
> However, I'm not certain if there might be some code intentionally
> using r4, as the manual doesn't explicitly forbid its usage, only
> stating that doing so would result in undefined outcomes.
>
>> 在 2023/6/12 下午4:36, Feiyang Chen 写道:
>>> + /* Add general purpose registers for backward compatibility. */
>>> + for (i = 0; i < ARRAY_SIZE (loongarch_r_normal_name); i++)
>>> + str_hash_insert (fc_htab, loongarch_r_normal_name[i], (void *) (i + 1),
>>> + 0);
next prev parent reply other threads:[~2023-06-14 8:39 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-12 8:36 Feiyang Chen
2023-06-13 1:05 ` Chenghua Xu
2023-06-13 9:49 ` WANG Xuerui
2023-06-14 4:27 ` Feiyang Chen
2023-06-16 9:20 ` WANG Xuerui
2023-06-16 9:30 ` Xi Ruoyao
2023-06-14 3:33 ` mengqinggang
2023-06-14 4:14 ` Feiyang Chen
2023-06-14 7:07 ` mengqinggang
2023-06-14 7:28 ` Feiyang Chen
2023-06-14 8:39 ` mengqinggang [this message]
2023-06-14 9:27 ` Feiyang Chen
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