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From: Jan Beulich <jbeulich@suse.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>
Cc: Binutils <binutils@sourceware.org>, gdb-patches@sourceware.org
Subject: Re: [PATCH v2 1/2] RISC-V: Fix buffer overflow on print_insn_riscv
Date: Tue, 4 Oct 2022 12:18:17 +0200	[thread overview]
Message-ID: <146a0c71-252a-546b-2365-87f528f7a0cc@suse.com> (raw)
In-Reply-To: <200d2e03-e7d5-0a19-5f99-f0354bf93c74@suse.com>

On 04.10.2022 12:16, Jan Beulich via Binutils wrote:
> On 04.10.2022 12:13, Tsukasa OI wrote:
>> On 2022/10/04 18:58, Jan Beulich wrote:
>>> On 04.10.2022 11:45, Tsukasa OI wrote:
>>>> --- a/include/opcode/riscv.h
>>>> +++ b/include/opcode/riscv.h
>>>> @@ -55,6 +55,8 @@ static const char * const riscv_pred_succ[16] =
>>>>    "i", "iw", "ir", "irw", "io", "iow", "ior", "iorw"
>>>>  };
>>>>  
>>>> +#define RISCV_MAX_INSN_LEN 22  /* max 176-bit encoding.  */
>>>
>>> To be honest this still doesn't look sufficient to me: There's still
>>> no connection between this constant and riscv_insn_length(). Yet both
>>> want changing at the same time when it comes to insn length aspects.
>>> As said in reply to v1 - comments may be one way of dealing with this.
>>> We don't have BUILD_BUG_ON() or alike (and even if we had it wouldn't
>>> be usable in a portable way), so an actual build time check might not
>>> be feasible. A runtime check also doesn't look realistic, as
>>>
>>>     gas_assert (riscv_insn_length(~0) == RISCV_MAX_INSN_LEN);
>>>
>>> wouldn't be correct, and I'm unconvinced of using other than the most
>>> simple ~0 as an argument here.
>>
>> I have to agree that the constant with no direct connection with
>> riscv_insn_length is not good but I don't come up with better solution
>> than this (with given constraints).
>> In any case, keeping this stack buffer overflow is definitely a bad idea
>> and we have to do something to deal with it in a days.
> 
> Agreed. Hence could you add cross-referencing comments at both sides
> while introducing the #define, as a minimal measure?

Or wait - why don't you move the #define _into_ riscv_insn_length(),
placed right at the position that would need touching when adding
support for wider insns (or when deciding to reduce support again)?

Jan

  reply	other threads:[~2022-10-04 10:18 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-04  8:59 [PATCH 0/2] RISC-V: Fix buffer overflow after long instruction support Tsukasa OI
2022-10-04  8:59 ` [PATCH 1/2] RISC-V: Fix buffer overflow on print_insn_riscv Tsukasa OI
2022-10-04  8:59 ` [PATCH 2/2] gdb/riscv: Fix buffer overflow on riscv_insn::fetch_instruction Tsukasa OI
2022-10-04  9:04   ` Andreas Schwab
2022-10-04  9:07 ` [PATCH 0/2] RISC-V: Fix buffer overflow after long instruction support Jan Beulich
2022-10-04  9:26   ` Tsukasa OI
2022-10-04  9:44     ` Jan Beulich
2022-10-04  9:47       ` Tsukasa OI
2022-10-04  9:45 ` [PATCH v2 0/2] RISC-V: Fix buffer overflow after 176-bit " Tsukasa OI
2022-10-04  9:45   ` [PATCH v2 1/2] RISC-V: Fix buffer overflow on print_insn_riscv Tsukasa OI
2022-10-04  9:58     ` Jan Beulich
2022-10-04 10:13       ` Tsukasa OI
2022-10-04 10:16         ` Jan Beulich
2022-10-04 10:18           ` Jan Beulich [this message]
2022-10-04  9:45   ` [PATCH v2 2/2] gdb/riscv: Partial support for instructions up to 176-bits Tsukasa OI
2022-10-04 11:25   ` [PATCH v3 0/2] RISC-V: Fix buffer overflow after 176-bit instruction support Tsukasa OI
2022-10-04 11:25     ` [PATCH v3 1/2] RISC-V: Fix buffer overflow on print_insn_riscv Tsukasa OI
2022-10-04 11:25     ` [PATCH v3 2/2] gdb/riscv: Partial support for instructions up to 176-bit Tsukasa OI
2022-10-04 12:23     ` [PATCH v3 0/2] RISC-V: Fix buffer overflow after 176-bit instruction support Jan Beulich
2022-10-04 13:20       ` Nelson Chu

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