From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH 02/10] x86: fold legacy/VEX {,V}MOV{H,L}* entries
Date: Tue, 4 Jul 2023 17:19:53 +0200 [thread overview]
Message-ID: <18221c8c-4d6e-f0f1-3738-785023be1268@suse.com> (raw)
In-Reply-To: <de113d3f-86db-2196-8ac9-fa6dc7efa195@suse.com>
By changing decode order to do ModR/M.mod last (rather than VEX.L), the
VEX entries (which are already reused by EVEX decoding) can be folded
with their legacy counterparts as well. Note how this change of decode
order also allows removing two auxiliary #define-s, which were
introduced during earlier folding (because of that unhelpful order of
steps).
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -931,12 +931,6 @@ enum
MOD_0F38FB_PREFIX_1,
MOD_0F3A0F_PREFIX_1,
- MOD_VEX_0F12_PREFIX_0,
- MOD_VEX_0F12_PREFIX_2,
- MOD_VEX_0F13,
- MOD_VEX_0F16_PREFIX_0,
- MOD_VEX_0F16_PREFIX_2,
- MOD_VEX_0F17,
MOD_VEX_0F2B,
MOD_VEX_0F41_L_1,
MOD_VEX_0F42_L_1,
@@ -1362,14 +1356,12 @@ enum
enum
{
- VEX_LEN_0F12_P_0_M_0 = 0,
- VEX_LEN_0F12_P_0_M_1,
-#define VEX_LEN_0F12_P_2_M_0 VEX_LEN_0F12_P_0_M_0
- VEX_LEN_0F13_M_0,
- VEX_LEN_0F16_P_0_M_0,
- VEX_LEN_0F16_P_0_M_1,
-#define VEX_LEN_0F16_P_2_M_0 VEX_LEN_0F16_P_0_M_0
- VEX_LEN_0F17_M_0,
+ VEX_LEN_0F12_P_0 = 0,
+ VEX_LEN_0F12_P_2,
+ VEX_LEN_0F13,
+ VEX_LEN_0F16_P_0,
+ VEX_LEN_0F16_P_2,
+ VEX_LEN_0F17,
VEX_LEN_0F41,
VEX_LEN_0F42,
VEX_LEN_0F44,
@@ -3665,17 +3657,17 @@ static const struct dis386 prefix_table[
/* PREFIX_VEX_0F12 */
{
- { MOD_TABLE (MOD_VEX_0F12_PREFIX_0) },
+ { VEX_LEN_TABLE (VEX_LEN_0F12_P_0) },
{ "%XEvmov%XSldup", { XM, EXEvexXNoBcst }, 0 },
- { MOD_TABLE (MOD_VEX_0F12_PREFIX_2) },
+ { VEX_LEN_TABLE (VEX_LEN_0F12_P_2) },
{ "%XEvmov%XDdup", { XM, EXymmq }, 0 },
},
/* PREFIX_VEX_0F16 */
{
- { MOD_TABLE (MOD_VEX_0F16_PREFIX_0) },
+ { VEX_LEN_TABLE (VEX_LEN_0F16_P_0) },
{ "%XEvmov%XShdup", { XM, EXEvexXNoBcst }, 0 },
- { MOD_TABLE (MOD_VEX_0F16_PREFIX_2) },
+ { VEX_LEN_TABLE (VEX_LEN_0F16_P_2) },
},
/* PREFIX_VEX_0F2A */
@@ -5965,11 +5957,11 @@ static const struct dis386 vex_table[][2
{ PREFIX_TABLE (PREFIX_0F10) },
{ PREFIX_TABLE (PREFIX_0F11) },
{ PREFIX_TABLE (PREFIX_VEX_0F12) },
- { MOD_TABLE (MOD_VEX_0F13) },
+ { VEX_LEN_TABLE (VEX_LEN_0F13) },
{ "vunpcklpX", { XM, Vex, EXx }, PREFIX_OPCODE },
{ "vunpckhpX", { XM, Vex, EXx }, PREFIX_OPCODE },
{ PREFIX_TABLE (PREFIX_VEX_0F16) },
- { MOD_TABLE (MOD_VEX_0F17) },
+ { VEX_LEN_TABLE (VEX_LEN_0F17) },
/* 18 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -6819,34 +6811,34 @@ static const struct dis386 vex_table[][2
#include "i386-dis-evex.h"
static const struct dis386 vex_len_table[][2] = {
- /* VEX_LEN_0F12_P_0_M_0 / VEX_LEN_0F12_P_2_M_0 */
+ /* VEX_LEN_0F12_P_0 */
{
- { "%XEvmovlpYX", { XM, Vex, EXq }, 0 },
+ { MOD_TABLE (MOD_0F12_PREFIX_0) },
},
- /* VEX_LEN_0F12_P_0_M_1 */
+ /* VEX_LEN_0F12_P_2 */
{
- { "%XEvmovhlpY%XS", { XM, Vex, EXq }, 0 },
+ { MOD_TABLE (MOD_0F12_PREFIX_2) },
},
- /* VEX_LEN_0F13_M_0 */
+ /* VEX_LEN_0F13 */
{
- { "%XEvmovlpYX", { EXq, XM }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_0F13) },
},
- /* VEX_LEN_0F16_P_0_M_0 / VEX_LEN_0F16_P_2_M_0 */
+ /* VEX_LEN_0F16_P_0 */
{
- { "%XEvmovhpYX", { XM, Vex, EXq }, 0 },
+ { MOD_TABLE (MOD_0F16_PREFIX_0) },
},
- /* VEX_LEN_0F16_P_0_M_1 */
+ /* VEX_LEN_0F16_P_2 */
{
- { "%XEvmovlhpY%XS", { XM, Vex, EXq }, 0 },
+ { MOD_TABLE (MOD_0F16_PREFIX_2) },
},
- /* VEX_LEN_0F17_M_0 */
+ /* VEX_LEN_0F17 */
{
- { "%XEvmovhpYX", { EXq, XM }, PREFIX_OPCODE },
+ { MOD_TABLE (MOD_0F17) },
},
/* VEX_LEN_0F41 */
@@ -8039,29 +8031,29 @@ static const struct dis386 mod_table[][2
},
{
/* MOD_0F12_PREFIX_0 */
- { "movlpX", { XM, EXq }, 0 },
- { "movhlps", { XM, EXq }, 0 },
+ { "%XEVmovlpYX", { XM, Vex, EXq }, 0 },
+ { "%XEVmovhlpY%XS", { XM, Vex, EXq }, 0 },
},
{
/* MOD_0F12_PREFIX_2 */
- { "movlpX", { XM, EXq }, 0 },
+ { "%XEVmovlpYX", { XM, Vex, EXq }, 0 },
},
{
/* MOD_0F13 */
- { "movlpX", { EXq, XM }, PREFIX_OPCODE },
+ { "%XEVmovlpYX", { EXq, XM }, PREFIX_OPCODE },
},
{
/* MOD_0F16_PREFIX_0 */
- { "movhpX", { XM, EXq }, 0 },
- { "movlhps", { XM, EXq }, 0 },
+ { "%XEVmovhpYX", { XM, Vex, EXq }, 0 },
+ { "%XEVmovlhpY%XS", { XM, Vex, EXq }, 0 },
},
{
/* MOD_0F16_PREFIX_2 */
- { "movhpX", { XM, EXq }, 0 },
+ { "%XEVmovhpYX", { XM, Vex, EXq }, 0 },
},
{
/* MOD_0F17 */
- { "movhpX", { EXq, XM }, PREFIX_OPCODE },
+ { "%XEVmovhpYX", { EXq, XM }, PREFIX_OPCODE },
},
{
/* MOD_0F18_REG_0 */
@@ -8302,32 +8294,6 @@ static const struct dis386 mod_table[][2
{ REG_TABLE (REG_0F3A0F_PREFIX_1_MOD_3) },
},
{
- /* MOD_VEX_0F12_PREFIX_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F12_P_0_M_0) },
- { VEX_LEN_TABLE (VEX_LEN_0F12_P_0_M_1) },
- },
- {
- /* MOD_VEX_0F12_PREFIX_2 */
- { VEX_LEN_TABLE (VEX_LEN_0F12_P_2_M_0) },
- },
- {
- /* MOD_VEX_0F13 */
- { VEX_LEN_TABLE (VEX_LEN_0F13_M_0) },
- },
- {
- /* MOD_VEX_0F16_PREFIX_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F16_P_0_M_0) },
- { VEX_LEN_TABLE (VEX_LEN_0F16_P_0_M_1) },
- },
- {
- /* MOD_VEX_0F16_PREFIX_2 */
- { VEX_LEN_TABLE (VEX_LEN_0F16_P_2_M_0) },
- },
- {
- /* MOD_VEX_0F17 */
- { VEX_LEN_TABLE (VEX_LEN_0F17_M_0) },
- },
- {
/* MOD_VEX_0F2B */
{ "%XEvmovntpX", { Mx, XM }, PREFIX_OPCODE },
},
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -23,11 +23,11 @@ static const struct dis386 evex_table[][
{ PREFIX_TABLE (PREFIX_0F10) },
{ PREFIX_TABLE (PREFIX_0F11) },
{ PREFIX_TABLE (PREFIX_VEX_0F12) },
- { MOD_TABLE (MOD_VEX_0F13) },
+ { VEX_LEN_TABLE (VEX_LEN_0F13) },
{ "%XEvunpcklpX", { XM, Vex, EXx }, PREFIX_OPCODE },
{ "%XEvunpckhpX", { XM, Vex, EXx }, PREFIX_OPCODE },
{ PREFIX_TABLE (PREFIX_VEX_0F16) },
- { MOD_TABLE (MOD_VEX_0F17) },
+ { VEX_LEN_TABLE (VEX_LEN_0F17) },
/* 18 */
{ Bad_Opcode },
{ Bad_Opcode },
next prev parent reply other threads:[~2023-07-04 15:19 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-04 15:17 [PATCH 00/10] x86: disassembler table entry folding plus some cleanup Jan Beulich
2023-07-04 15:18 ` [PATCH 01/10] x86: fold certain legacy/VEX table entries Jan Beulich
2023-07-04 15:19 ` Jan Beulich [this message]
2023-07-04 15:20 ` [PATCH 03/10] x86: {,V}MOVNT* don't need to go through mod_table[] Jan Beulich
2023-07-04 15:21 ` [PATCH 04/10] x86: misc further memory-only insns " Jan Beulich
2023-07-04 15:21 ` [PATCH 05/10] x86: SIMD shift-by-immediate " Jan Beulich
2023-07-04 15:22 ` [PATCH 06/10] x86: slightly rework handling of some register-only insns Jan Beulich
2023-07-04 15:22 ` [PATCH 07/10] x86: various operations on mask registers can avoid going through mod_table[] Jan Beulich
2023-07-04 15:22 ` [PATCH 08/10] x86: misc further register-only insns don't need to go " Jan Beulich
2023-07-07 12:28 ` Jan Beulich
2023-07-04 15:23 ` [PATCH 09/10] x86: convert 0FXOP to just XOP in enumerator names Jan Beulich
2023-07-04 15:24 ` [PATCH 10/10] x86: simplify table-referencing macros Jan Beulich
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