[Committed] IBM zSystems: mgrk, mg first operand requires register pair

[Committed] IBM zSystems: mgrk, mg first operand requires register pair

[Andreas Krebbel]

opcodes/

	* s390-opc.c (INSTR_RRF_R0RER): New instruction type.
	(MASK_RRF_R0RER): Define mask for new instruction type.
	* s390-opc.txt: Use RRF_R0RER for mgrk and RXY_RERRD for mg.
---
 opcodes/s390-opc.c   | 2 ++
 opcodes/s390-opc.txt | 4 ++--
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
index fbb8b195bcd..18eb948fa96 100644
--- a/opcodes/s390-opc.c
+++ b/opcodes/s390-opc.c
@@ -362,6 +362,7 @@ const struct s390_operand s390_operands[] =
 #define INSTR_RRF_RURR2    4, { R_24,R_16,R_28,U4_20,0,0 }       /* e.g. lptea */
 #define INSTR_RRF_R0RR     4, { R_24,R_16,R_28,0,0,0 }           /* e.g. idte  */
 #define INSTR_RRF_R0RR2    4, { R_24,R_28,R_16,0,0,0 }           /* e.g. ark   */
+#define INSTR_RRF_R0RER    4, { RE_24,R_28,R_16,0,0,0 }          /* e.g. mgrk  */
 #define INSTR_RRF_R0RR3    4, { R_24,R_28,R_16,0,0,0 }           /* e.g. selrz */
 #define INSTR_RRF_U0FF     4, { F_24,U4_16,F_28,0,0,0 }          /* e.g. fidbr */
 #define INSTR_RRF_U0FEFE   4, { FE_24,U4_16,FE_28,0,0,0 }        /* e.g. fixbr */
@@ -585,6 +586,7 @@ const struct s390_operand s390_operands[] =
 #define MASK_RRF_RURR2    { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RRF_R0RR     { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RRF_R0RR2    { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
+#define MASK_RRF_R0RER    { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RRF_R0RR3    { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
 #define MASK_RRF_U0FF     { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
 #define MASK_RRF_U0FEFE   { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index e756e7848e1..931122586ef 100644
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -1851,8 +1851,8 @@ e30000000038 agh RXY_RRRD "add halfword to 64 bit value" arch12 zarch
 e30000000047 bic RXY_URRD "branch indirect on condition" arch12 zarch
 e3f000000047 bi RXY_0RRD "unconditional indirect branch" arch12 zarch
 e30000000047 bi*8 RXY_0RRD "branch indirect on condition" arch12 zarch
-b9ec mgrk RRF_R0RR2 "multiply 64x64reg -> 128" arch12 zarch
-e30000000084 mg RXY_RRRD "multiply 64x64mem -> 128" arch12 zarch
+b9ec mgrk RRF_R0RER "multiply 64x64reg -> 128" arch12 zarch
+e30000000084 mg RXY_RERRD "multiply 64x64mem -> 128" arch12 zarch
 e3000000003c mgh RXY_RRRD "multiply halfword 64x16mem -> 64" arch12 zarch
 b9fd msrkc RRF_R0RR2 "multiply single 32x32 -> 32" arch12 zarch
 b9ed msgrkc RRF_R0RR2 "multiply single 64x64 -> 64" arch12 zarch
-- 
2.35.1