[committed 1/2] arc: Update missing cipher.

public inbox for binutils@sourceware.org
 help / color / mirror / Atom feed

* [committed 1/2] arc: Update missing cipher.
@ 2022-07-18 11:25 Claudiu Zissulescu
  2022-07-18 11:25 ` [committed 2/2] opcodes/arc: Implement style support in the disassembler Claudiu Zissulescu
  0 siblings, 1 reply; 4+ messages in thread
From: Claudiu Zissulescu @ 2022-07-18 11:25 UTC (permalink / raw)
  To: binutils; +Cc: fbedard, Claudiu Zissulescu

From: Claudiu Zissulescu <claziss@synopsys.com>

The ciphers 5,7, and 9 are missing when parsing an assembly
instruction leading to errors when those ciphers are
used.

gas/config
	* tc-arc.c (md_assembly): Update strspn string with the
          missing ciphers.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
---
 gas/ChangeLog       | 5 +++++
 gas/config/tc-arc.c | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 4c2b03ef216..5a391a22636 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2022-07-18  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* config/tc-arc.c (md_assembly): Update strspn string with the
+	missing ciphers.
+
 2022-07-08  Nick Clifton  <nickc@redhat.com>
 
 	* 2.39 branch created.
diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index fd648b742b4..a606078f5b8 100644
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -2517,7 +2517,7 @@ md_assemble (char *str)
   struct arc_flags flags[MAX_INSN_FLGS];
 
   /* Split off the opcode.  */
-  opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_0123468");
+  opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_0123456789");
   opname = xmemdup0 (str, opnamelen);
 
   /* Signalize we are assembling the instructions.  */
-- 
2.30.2


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [committed 2/2] opcodes/arc: Implement style support in the disassembler
  2022-07-18 11:25 [committed 1/2] arc: Update missing cipher Claudiu Zissulescu
@ 2022-07-18 11:25 ` Claudiu Zissulescu
  2022-07-20  3:20   ` Alan Modra
  0 siblings, 1 reply; 4+ messages in thread
From: Claudiu Zissulescu @ 2022-07-18 11:25 UTC (permalink / raw)
  To: binutils; +Cc: fbedard

Update the ARC disassembler to supply style information to the
disassembler output. The output formatting remains unchanged.

opcodes/ChangeLog:
	* disassemble.c (disassemble_init_for_target): Set
	created_styled_output for ARC based targets.
	* arc-dis.c (find_format_from_table): Use fprintf_styled_ftype
	instead of fprintf_ftype throughout.
	(find_format): Likewise.
	(print_flags): Likewise.
	(print_insn_arc): Likewise.

Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
---
 opcodes/ChangeLog     |  10 +++
 opcodes/arc-dis.c     | 148 +++++++++++++++++++++++++++++-------------
 opcodes/disassemble.c |   5 ++
 3 files changed, 117 insertions(+), 46 deletions(-)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 3456b46f29e..3889a80f427 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,13 @@
+2022-07-18  Claudiu Zissulescu  <claziss@synopsys.com>
+
+	* disassemble.c (disassemble_init_for_target): Set
+	created_styled_output for ARC based targets.
+	* arc-dis.c (find_format_from_table): Use fprintf_styled_ftype
+	instead of fprintf_ftype throughout.
+	(find_format): Likewise.
+	(print_flags): Likewise.
+	(print_insn_arc): Likewise.
+
 2022-07-08  Nick Clifton  <nickc@redhat.com>
 
 	* 2.39 branch created.
diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index 771f786d18e..dbaa96178a8 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -375,11 +375,12 @@ find_format_from_table (struct disassemble_info *info,
 
   if (warn_p)
     {
-      info->fprintf_func (info->stream,
-			  _("\nWarning: disassembly may be wrong due to "
-			    "guessed opcode class choice.\n"
-			    "Use -M<class[,class]> to select the correct "
-			    "opcode class(es).\n\t\t\t\t"));
+      info->fprintf_styled_func
+	(info->stream, dis_style_text,
+	 _("\nWarning: disassembly may be wrong due to "
+	   "guessed opcode class choice.\n"
+	   "Use -M<class[,class]> to select the correct "
+	   "opcode class(es).\n\t\t\t\t"));
       return t_op;
     }
 
@@ -436,9 +437,10 @@ find_format (bfd_vma                       memaddr,
 	  opcode = arcExtMap_genOpcode (i, isa_mask, &errmsg);
 	  if (opcode == NULL)
 	    {
-	      (*info->fprintf_func) (info->stream,
-				     _("An error occurred while generating the "
-				       "extension instruction operations"));
+	      (*info->fprintf_styled_func)
+		(info->stream, dis_style_text,
+		 _("An error occurred while generating "
+		   "the extension instruction operations"));
 	      *opcode_result = NULL;
 	      return false;
 	    }
@@ -514,7 +516,8 @@ print_flags (const struct arc_opcode *opcode,
 	  name = arcExtMap_condCodeName (value);
 	  if (name)
 	    {
-	      (*info->fprintf_func) (info->stream, ".%s", name);
+	      (*info->fprintf_styled_func) (info->stream, dis_style_mnemonic,
+					    ".%s", name);
 	      continue;
 	    }
 	}
@@ -545,7 +548,8 @@ print_flags (const struct arc_opcode *opcode,
 	    {
 	       /* FIXME!: print correctly nt/t flag.  */
 	      if (!special_flag_p (opcode->name, flg_operand->name))
-		(*info->fprintf_func) (info->stream, ".");
+		(*info->fprintf_styled_func) (info->stream,
+					      dis_style_mnemonic, ".");
 	      else if (info->insn_type == dis_dref)
 		{
 		  switch (flg_operand->name[0])
@@ -580,7 +584,8 @@ print_flags (const struct arc_opcode *opcode,
 	      if (cl_flags->flag_class & F_CLASS_WB)
 		arc_infop->writeback_mode = flg_operand->code;
 
-	      (*info->fprintf_func) (info->stream, "%s", flg_operand->name);
+	      (*info->fprintf_styled_func) (info->stream, dis_style_mnemonic,
+					    "%s", flg_operand->name);
 	    }
 	}
     }
@@ -1061,13 +1066,28 @@ print_insn_arc (bfd_vma memaddr,
       switch (size)
 	{
 	case 1:
-	  (*info->fprintf_func) (info->stream, ".byte\t0x%02lx", data);
+	  (*info->fprintf_styled_func) (info->stream,
+					dis_style_assembler_directive,
+					".byte");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					"0x%02lx", data);
 	  break;
 	case 2:
-	  (*info->fprintf_func) (info->stream, ".short\t0x%04lx", data);
+	  (*info->fprintf_styled_func) (info->stream,
+					dis_style_assembler_directive,
+					".short");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					"0x%04lx", data);
 	  break;
 	case 4:
-	  (*info->fprintf_func) (info->stream, ".word\t0x%08lx", data);
+	  (*info->fprintf_styled_func) (info->stream,
+					dis_style_assembler_directive,
+					".word");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					"0x%08lx", data);
 	  break;
 	default:
 	  return -1;
@@ -1157,27 +1177,45 @@ print_insn_arc (bfd_vma memaddr,
       switch (insn_len)
 	{
 	case 2:
-	  (*info->fprintf_func) (info->stream, ".shor\t%#04llx",
-				 insn & 0xffff);
+	  (*info->fprintf_styled_func) (info->stream,
+					dis_style_assembler_directive,
+					".short");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					"0x%04llx", insn & 0xffff);
 	  break;
 
 	case 4:
-	  (*info->fprintf_func) (info->stream, ".word\t%#08llx",
-				 insn & 0xffffffff);
+	  (*info->fprintf_styled_func) (info->stream,
+					dis_style_assembler_directive,
+					".word");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					"0x%08llx", insn & 0xffffffff);
 	  break;
 
 	case 6:
-	  (*info->fprintf_func) (info->stream, ".long\t%#08llx",
-				 insn & 0xffffffff);
-	  (*info->fprintf_func) (info->stream, ".long\t%#04llx",
-				 (insn >> 32) & 0xffff);
+	  (*info->fprintf_styled_func) (info->stream,
+					dis_style_assembler_directive,
+					".long");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+				       "0x%08llx", insn & 0xffffffff);
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, " ");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					"0x%04llx", (insn >> 32) & 0xffff);
 	  break;
 
 	case 8:
-	  (*info->fprintf_func) (info->stream, ".long\t%#08llx",
-				 insn & 0xffffffff);
-	  (*info->fprintf_func) (info->stream, ".long\t%#08llx",
-				 insn >> 32);
+	  (*info->fprintf_styled_func) (info->stream,
+					dis_style_assembler_directive,
+					".long");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					"0x%08llx", insn & 0xffffffff);
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, " ");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					"0x%08llx", (insn >> 32));
 	  break;
 
 	default:
@@ -1189,7 +1227,8 @@ print_insn_arc (bfd_vma memaddr,
     }
 
   /* Print the mnemonic.  */
-  (*info->fprintf_func) (info->stream, "%s", opcode->name);
+  (*info->fprintf_styled_func) (info->stream, dis_style_mnemonic,
+				"%s", opcode->name);
 
   /* Preselect the insn class.  */
   info->insn_type = arc_opcode_to_insn_type (opcode);
@@ -1199,7 +1238,7 @@ print_insn_arc (bfd_vma memaddr,
   print_flags (opcode, &insn, info);
 
   if (opcode->operands[0] != 0)
-    (*info->fprintf_func) (info->stream, "\t");
+    (*info->fprintf_styled_func) (info->stream, dis_style_text, "\t");
 
   need_comma = false;
   open_braket = false;
@@ -1212,7 +1251,7 @@ print_insn_arc (bfd_vma memaddr,
     {
       if (open_braket && (operand->flags & ARC_OPERAND_BRAKET))
 	{
-	  (*info->fprintf_func) (info->stream, "]");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, "]");
 	  open_braket = false;
 	  continue;
 	}
@@ -1228,16 +1267,16 @@ print_insn_arc (bfd_vma memaddr,
 
       if (operand->flags & ARC_OPERAND_COLON)
 	{
-	  (*info->fprintf_func) (info->stream, ":");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, ":");
 	  continue;
 	}
 
       if (need_comma)
-	(*info->fprintf_func) (info->stream, ",");
+	(*info->fprintf_styled_func) (info->stream, dis_style_text,",");
 
       if (!open_braket && (operand->flags & ARC_OPERAND_BRAKET))
 	{
-	  (*info->fprintf_func) (info->stream, "[");
+	  (*info->fprintf_styled_func) (info->stream, dis_style_text, "[");
 	  open_braket = true;
 	  need_comma = false;
 	  continue;
@@ -1268,7 +1307,8 @@ print_insn_arc (bfd_vma memaddr,
 	  rname = arcExtMap_coreRegName (value);
 	  if (!rname)
 	    rname = regnames[value];
-	  (*info->fprintf_func) (info->stream, "%s", rname);
+	  (*info->fprintf_styled_func) (info->stream, dis_style_register,
+					"%s", rname);
 
 	  /* Check if we have a double register to print.  */
 	  if (operand->flags & ARC_OPERAND_TRUNCATE)
@@ -1282,7 +1322,8 @@ print_insn_arc (bfd_vma memaddr,
 	      else
 		rname = _("\nWarning: illegal use of double register "
 			  "pair.\n");
-	      (*info->fprintf_func) (info->stream, "%s", rname);
+	      (*info->fprintf_styled_func) (info->stream, dis_style_register,
+					    "%s", rname);
 	    }
 	  if (value == 63)
 	    rpcl = true;
@@ -1294,10 +1335,12 @@ print_insn_arc (bfd_vma memaddr,
 	  const char *rname = get_auxreg (opcode, value, isa_mask);
 
 	  if (rname && open_braket)
-	    (*info->fprintf_func) (info->stream, "%s", rname);
+	    (*info->fprintf_styled_func) (info->stream, dis_style_register,
+					  "%s", rname);
 	  else
 	    {
-	      (*info->fprintf_func) (info->stream, "%#x", value);
+	      (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					    "%#x", value);
 	      if (info->insn_type == dis_branch
 		  || info->insn_type == dis_jsr)
 		info->target = (bfd_vma) value;
@@ -1307,19 +1350,23 @@ print_insn_arc (bfd_vma memaddr,
 	{
 	  const char *rname = get_auxreg (opcode, value, isa_mask);
 	  if (rname && open_braket)
-	    (*info->fprintf_func) (info->stream, "%s", rname);
+	    (*info->fprintf_styled_func) (info->stream, dis_style_register,
+					  "%s", rname);
 	  else
 	    {
 	      if (print_hex)
-		(*info->fprintf_func) (info->stream, "%#x", value);
+		(*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					      "%#x", value);
 	      else
-		(*info->fprintf_func) (info->stream, "%d", value);
+		(*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					      "%d", value);
 	    }
 	}
       else if (operand->flags & ARC_OPERAND_ADDRTYPE)
 	{
 	  const char *addrtype = get_addrtype (value);
-	  (*info->fprintf_func) (info->stream, "%s", addrtype);
+	  (*info->fprintf_styled_func) (info->stream, dis_style_address,
+					"%s", addrtype);
 	  /* A colon follow an address type.  */
 	  need_comma = false;
 	}
@@ -1337,11 +1384,17 @@ print_insn_arc (bfd_vma memaddr,
 		  need_comma = false;
 		  break;
 		case 1:
-		  (*info->fprintf_func) (info->stream, "r13");
+		  (*info->fprintf_styled_func) (info->stream,
+						dis_style_register, "r13");
 		  break;
 		default:
-		  (*info->fprintf_func) (info->stream, "r13-%s",
-					 regnames[13 + value - 1]);
+		  (*info->fprintf_styled_func) (info->stream,
+						dis_style_register, "r13");
+		  (*info->fprintf_styled_func) (info->stream,
+						dis_style_text, "-");
+		  (*info->fprintf_styled_func) (info->stream,
+						dis_style_register, "%s",
+						regnames[13 + value - 1]);
 		  break;
 		}
 	      rpcl = false;
@@ -1351,9 +1404,11 @@ print_insn_arc (bfd_vma memaddr,
 	    {
 	      const char *rname = get_auxreg (opcode, value, isa_mask);
 	      if (rname && open_braket)
-		(*info->fprintf_func) (info->stream, "%s", rname);
+		(*info->fprintf_styled_func) (info->stream, dis_style_register,
+					      "%s", rname);
 	      else
-		(*info->fprintf_func) (info->stream, "%#x", value);
+		(*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+					      "%" PRIx32, value);
 	    }
 	}
 
@@ -1387,7 +1442,8 @@ print_insn_arc (bfd_vma memaddr,
 	   the addend is not currently pc-relative.  */
 	memaddr = 0;
 
-      (*info->fprintf_func) (info->stream, "\t;");
+      (*info->fprintf_styled_func) (info->stream,
+				    dis_style_comment_start, "\t;");
       (*info->print_address_func) ((memaddr & ~3) + vpcl, info);
     }
 
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index bd37f042b31..e2e5a2608d6 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -612,6 +612,11 @@ disassemble_init_for_target (struct disassemble_info * info)
       info->disassembler_needs_relocs = true;
       break;
 #endif
+#ifdef ARCH_arc
+    case bfd_arch_arc:
+      info->created_styled_output = true;
+      break;
+#endif
 #ifdef ARCH_arm
     case bfd_arch_arm:
       info->symbol_is_valid = arm_symbol_is_valid;
-- 
2.30.2


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [committed 2/2] opcodes/arc: Implement style support in the disassembler
  2022-07-18 11:25 ` [committed 2/2] opcodes/arc: Implement style support in the disassembler Claudiu Zissulescu
@ 2022-07-20  3:20   ` Alan Modra
  2022-07-20 13:51     ` Claudiu Zissulescu Ianculescu
  0 siblings, 1 reply; 4+ messages in thread
From: Alan Modra @ 2022-07-20  3:20 UTC (permalink / raw)
  To: Claudiu Zissulescu; +Cc: binutils, fbedard

On Mon, Jul 18, 2022 at 02:25:01PM +0300, Claudiu Zissulescu via Binutils wrote:
> Update the ARC disassembler to supply style information to the
> disassembler output. The output formatting remains unchanged.

I see lots of fails in the arc gas teststuite.  Please do run the
testsuite.

regexp "^0x[0-9a-f]+ 21c1 006b                  adc.lt  r1,r1,0x1$"
line   "0x000000c4 21c1 006b            adc.lt  r1,r1,1"

It's this one:
> -		(*info->fprintf_func) (info->stream, "%#x", value);
> +		(*info->fprintf_styled_func) (info->stream, dis_style_immediate,
> +					      "%" PRIx32, value);

PRIx32 is wrong anyway, when "value" is an int.  Fixed.

diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
index dbaa96178a8..3490bad4f66 100644
--- a/opcodes/arc-dis.c
+++ b/opcodes/arc-dis.c
@@ -1408,7 +1408,7 @@ print_insn_arc (bfd_vma memaddr,
 					      "%s", rname);
 	      else
 		(*info->fprintf_styled_func) (info->stream, dis_style_immediate,
-					      "%" PRIx32, value);
+					      "%#x", value);
 	    }
 	}
 

-- 
Alan Modra
Australia Development Lab, IBM

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [committed 2/2] opcodes/arc: Implement style support in the disassembler
  2022-07-20  3:20   ` Alan Modra
@ 2022-07-20 13:51     ` Claudiu Zissulescu Ianculescu
  0 siblings, 0 replies; 4+ messages in thread
From: Claudiu Zissulescu Ianculescu @ 2022-07-20 13:51 UTC (permalink / raw)
  To: Alan Modra; +Cc: Binutils, Francois Bedard

Ahhh, sorry for that.

Thanks for spotting that!
Claudiu

On Wed, Jul 20, 2022 at 6:20 AM Alan Modra <amodra@gmail.com> wrote:

> On Mon, Jul 18, 2022 at 02:25:01PM +0300, Claudiu Zissulescu via Binutils
> wrote:
> > Update the ARC disassembler to supply style information to the
> > disassembler output. The output formatting remains unchanged.
>
> I see lots of fails in the arc gas teststuite.  Please do run the
> testsuite.
>
> regexp "^0x[0-9a-f]+ 21c1 006b                  adc.lt  r1,r1,0x1$"
> line   "0x000000c4 21c1 006b            adc.lt  r1,r1,1"
>
> It's this one:
> > -             (*info->fprintf_func) (info->stream, "%#x", value);
> > +             (*info->fprintf_styled_func) (info->stream,
> dis_style_immediate,
> > +                                           "%" PRIx32, value);
>
> PRIx32 is wrong anyway, when "value" is an int.  Fixed.
>
> diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c
> index dbaa96178a8..3490bad4f66 100644
> --- a/opcodes/arc-dis.c
> +++ b/opcodes/arc-dis.c
> @@ -1408,7 +1408,7 @@ print_insn_arc (bfd_vma memaddr,
>                                               "%s", rname);
>               else
>                 (*info->fprintf_styled_func) (info->stream,
> dis_style_immediate,
> -                                             "%" PRIx32, value);
> +                                             "%#x", value);
>             }
>         }
>
>
> --
> Alan Modra
> Australia Development Lab, IBM
>

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2022-07-20 13:52 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-07-18 11:25 [committed 1/2] arc: Update missing cipher Claudiu Zissulescu
2022-07-18 11:25 ` [committed 2/2] opcodes/arc: Implement style support in the disassembler Claudiu Zissulescu
2022-07-20  3:20   ` Alan Modra
2022-07-20 13:51     ` Claudiu Zissulescu Ianculescu

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).