[RFC] Support RV64-ILP32

[RFC] Support RV64-ILP32

[shihua]

From: Liao Shihua <shihua@iscas.ac.cn>

    This is an imperfect patch and is only used to verify the relevant patches of gcc
    I haven't designed the new tuple and check it in cpu-riscv.c, yet.
    So I canceled a check in elfnn-riscv.c.
    The gcc patch is <https://gcc.gnu.org/pipermail/gcc-patches/2022-December/609213.html>

bfd/ChangeLog:

        * elfnn-riscv.c (riscv_merge_arch_attr_info):Remove the constraint between RV64 and ILP32.

gas/ChangeLog:

        * config/tc-riscv.c (riscv_set_abi_by_arch): Remove the constraint between RV64 and ILP32.
        (riscv_target_format):use abi_xlen instead of xlen
        (md_begin):Likewise
        (normalize_constant_expr):Likewise
        (load_const):Likewise
        (macro):Likewise
        (s_riscv_attribute):Likewise

---
 bfd/elfnn-riscv.c     |  9 +--------
 gas/config/tc-riscv.c | 22 ++++++++++------------
 2 files changed, 11 insertions(+), 20 deletions(-)

diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 3d2ddf4e651..c4e635c31f7 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -3596,15 +3596,8 @@ riscv_merge_arch_attr_info (bfd *ibfd, char *in_arch, char *out_arch)
       return NULL;
     }
 
-  if (xlen_in != ARCH_SIZE)
-    {
-      _bfd_error_handler
-	(_("error: %pB: unsupported XLEN (%u), you might be "
-	   "using wrong emulation"), ibfd, xlen_in);
-      return NULL;
-    }
 
-  merged_arch_str = riscv_arch_str (ARCH_SIZE, &merged_subsets);
+  merged_arch_str = riscv_arch_str (xlen_in, &merged_subsets);
 
   /* Release the subset lists.  */
   riscv_release_subset_list (&in_subsets);
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 22385d1baa0..e64fd688139 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -353,8 +353,6 @@ riscv_set_abi_by_arch (void)
       gas_assert (abi_xlen != 0 && xlen != 0 && float_abi != FLOAT_ABI_DEFAULT);
       if (abi_xlen > xlen)
 	as_bad ("can't have %d-bit ABI on %d-bit ISA", abi_xlen, xlen);
-      else if (abi_xlen < xlen)
-	as_bad ("%d-bit ABI not yet supported on %d-bit ISA", abi_xlen, xlen);
 
       if (riscv_subset_supports (&riscv_rps_as, "e") && !rve_abi)
 	as_bad ("only the ilp32e ABI is supported for e extension");
@@ -614,9 +612,9 @@ const char *
 riscv_target_format (void)
 {
   if (target_big_endian)
-    return xlen == 64 ? "elf64-bigriscv" : "elf32-bigriscv";
+    return abi_xlen == 64 ? "elf64-bigriscv" : "elf32-bigriscv";
   else
-    return xlen == 64 ? "elf64-littleriscv" : "elf32-littleriscv";
+    return abi_xlen == 64 ? "elf64-littleriscv" : "elf32-littleriscv";
 }
 
 /* Return the length of instruction INSN.  */
@@ -1370,7 +1368,7 @@ init_opcode_hash (const struct riscv_opcode *opcodes,
 void
 md_begin (void)
 {
-  unsigned long mach = xlen == 64 ? bfd_mach_riscv64 : bfd_mach_riscv32;
+  unsigned long mach = abi_xlen == 64 ? bfd_mach_riscv64 : bfd_mach_riscv32;
 
   if (! bfd_set_arch_mach (stdoutput, bfd_arch_riscv, mach))
     as_warn (_("could not set architecture and machine"));
@@ -1618,7 +1616,7 @@ md_assemblef (const char *format, ...)
 static void
 normalize_constant_expr (expressionS *ex)
 {
-  if (xlen > 32)
+  if (abi_xlen > 32)
     return;
   if ((ex->X_op == O_constant || ex->X_op == O_symbol)
       && IS_ZEXT_32BIT_NUM (ex->X_add_number))
@@ -1716,7 +1714,7 @@ load_const (int reg, expressionS *ep)
       return;
     }
 
-  if (xlen > 32 && !IS_SEXT_32BIT_NUM (ep->X_add_number))
+  if (abi_xlen > 32 && !IS_SEXT_32BIT_NUM (ep->X_add_number))
     {
       /* Reduce to a signed 32-bit constant using SLLI and ADDI.  */
       while (((upper.X_add_number >> shift) & 1) == 0)
@@ -1979,19 +1977,19 @@ macro (struct riscv_cl_insn *ip, expressionS *imm_expr,
       break;
 
     case M_ZEXTH:
-      riscv_ext (rd, rs1, xlen - 16, false);
+      riscv_ext (rd, rs1, abi_xlen - 16, false);
       break;
 
     case M_ZEXTW:
-      riscv_ext (rd, rs1, xlen - 32, false);
+      riscv_ext (rd, rs1, abi_xlen - 32, false);
       break;
 
     case M_SEXTB:
-      riscv_ext (rd, rs1, xlen - 8, true);
+      riscv_ext (rd, rs1, abi_xlen - 8, true);
       break;
 
     case M_SEXTH:
-      riscv_ext (rd, rs1, xlen - 16, true);
+      riscv_ext (rd, rs1, abi_xlen - 16, true);
       break;
 
     case M_VMSGE:
@@ -4648,7 +4646,7 @@ s_riscv_attribute (int ignored ATTRIBUTE_UNUSED)
       if (old_xlen != xlen)
 	{
 	  /* We must re-init bfd again if xlen is changed.  */
-	  unsigned long mach = xlen == 64 ? bfd_mach_riscv64 : bfd_mach_riscv32;
+	  unsigned long mach = abi_xlen == 64 ? bfd_mach_riscv64 : bfd_mach_riscv32;
 	  bfd_find_target (riscv_target_format (), stdoutput);
 
 	  if (! bfd_set_arch_mach (stdoutput, bfd_arch_riscv, mach))
-- 
2.38.0.windows.1