[PATCH 2/2] ld: RISC-V: Test R_RISCV_BRANCH truncation errors

[Palmer Dabbelt <palmer@rivosinc.com>]

We can't actually produce binaries with these errors from the assembler,
since it magically converts far branches into multi-instruction
sequences, so instead use objcopy to make the symbol weak after the
assembler has a chance to know that's going to happen.
---
 ld/testsuite/ld-riscv-elf/far-branch-fail-01.s | 16 ++++++++++++++++
 ld/testsuite/ld-riscv-elf/far-branch-fail-02.s | 12 ++++++++++++
 ld/testsuite/ld-riscv-elf/far-branch-fail.d    |  7 +++++++
 ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp     |  1 +
 4 files changed, 36 insertions(+)
 create mode 100644 ld/testsuite/ld-riscv-elf/far-branch-fail-01.s
 create mode 100644 ld/testsuite/ld-riscv-elf/far-branch-fail-02.s
 create mode 100644 ld/testsuite/ld-riscv-elf/far-branch-fail.d

diff --git a/ld/testsuite/ld-riscv-elf/far-branch-fail-01.s b/ld/testsuite/ld-riscv-elf/far-branch-fail-01.s
new file mode 100644
index 00000000000..4c96671c78e
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/far-branch-fail-01.s
@@ -0,0 +1,16 @@
+.text
+.global space1
+space1:
+.rep 1024
+	nop
+.endr
+
+.global glob
+glob:
+	addi x0, x0, 2
+
+.global space2
+space2:
+.rep 1024
+	nop
+.endr
diff --git a/ld/testsuite/ld-riscv-elf/far-branch-fail-02.s b/ld/testsuite/ld-riscv-elf/far-branch-fail-02.s
new file mode 100644
index 00000000000..fc51a0bed6e
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/far-branch-fail-02.s
@@ -0,0 +1,12 @@
+.text
+.global _start
+_start:
+	beq a0, a1, space1
+	beq a0, a1, glob
+	beq a0, a1, space2
+
+.global glob
+glob:
+.global glob_orig
+glob_orig:
+	addi x0, x0, 1
diff --git a/ld/testsuite/ld-riscv-elf/far-branch-fail.d b/ld/testsuite/ld-riscv-elf/far-branch-fail.d
new file mode 100644
index 00000000000..668b63a8d08
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/far-branch-fail.d
@@ -0,0 +1,7 @@
+#name: fail on branch overflows
+#source: far-branch-fail-01.s
+#source: far-branch-fail-02.s RUN_OBJCOPY
+#objcopy_objects: -W glob
+#objdump: -d
+#ld:
+#error: .*relocation truncated to fit: R_RISCV_BRANCH against symbol.*glob.*
diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
index 0f7ccd92ed5..1edbe8bd67a 100644
--- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
+++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
@@ -169,6 +169,7 @@ if [istarget "riscv*-*-*"] {
     run_dump_test "attr-merge-priv-spec-failed-05"
     run_dump_test "attr-merge-priv-spec-failed-06"
     run_dump_test "attr-phdr"
+    run_dump_test "far-branch-fail"
     run_ld_link_tests [list \
 	[list "Weak reference 32" "-T weakref.ld -m[riscv_choose_ilp32_emul]" "" \
 	    "-march=rv32i -mabi=ilp32" {weakref32.s} \
-- 
2.39.0