Re: [PATCH 1/2] gas: RISC-V: Add a test for near->far branch conversion

[Nelson Chu <nelson@rivosinc.com>]

I always thought the test cases were already there, because the
assembler branch relaxation (or branch conversion, whatever called)
has been supported since the very beginning of the risc-v porting.
Anyway, both of the gas and ld test cases for this are what we need,
so thanks for adding them :)

Nelson

On Tue, Jan 31, 2023 at 5:07 AM Palmer Dabbelt <palmer@rivosinc.com> wrote:
>
> This works in GAS and has for a very long time, but I couldn't find a
> test case for it.  It doesn't appear to be documented anywhere, but GCC
> depends on it and I'd bet a bunch of handwritten assembly does too so
> it's probably too late to drop.
> ---
>  gas/testsuite/gas/riscv/far-branch.d | 13 +++++++++++++
>  gas/testsuite/gas/riscv/far-branch.s |  6 ++++++
>  2 files changed, 19 insertions(+)
>  create mode 100644 gas/testsuite/gas/riscv/far-branch.d
>  create mode 100644 gas/testsuite/gas/riscv/far-branch.s
>
> diff --git a/gas/testsuite/gas/riscv/far-branch.d b/gas/testsuite/gas/riscv/far-branch.d
> new file mode 100644
> index 00000000000..e781e3eadb5
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/far-branch.d
> @@ -0,0 +1,13 @@
> +#as: -march=rv32i
> +#objdump: -d
> +
> +.*:[   ]+file format .*
> +
> +
> +Disassembly of section .text:
> +
> +0+000 <target>:
> +[^:]+:[        ]+00b51063[     ]+bne[  ]+a0,a1,0 <target>
> +#...
> +[^:]+:[        ]+00b50463[     ]+beq[  ]+a0,a1,.*
> +[^:]+:[        ]+ff9fe06f[     ]+j[    ]+0 <target>
> diff --git a/gas/testsuite/gas/riscv/far-branch.s b/gas/testsuite/gas/riscv/far-branch.s
> new file mode 100644
> index 00000000000..2b369ffb538
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/far-branch.s
> @@ -0,0 +1,6 @@
> +target:
> +       bne a0, a1, target
> +.rep 1024
> +       nop
> +.endr
> +       bne a0, a1, target
> --
> 2.39.0
>