* [PATCH] RISC-V: Add 'Smcntrpmf' extension and its CSRs
@ 2023-07-24 5:24 Jiawei
2023-08-01 4:51 ` Nelson Chu
0 siblings, 1 reply; 4+ messages in thread
From: Jiawei @ 2023-07-24 5:24 UTC (permalink / raw)
To: binutils
Cc: nelson, kito.cheng, palmer, jbeulich, christoph.muellner,
wuwei2016, shihua, shiyulong, chenyixuan, Jiawei
This patch supports RISC-V cycle and instret privilege mode filtering
extension(Smcntrpmf)[1]. It adds two new 64-bits register mcyclecfg
and minstretcfg that configure privilege mode filtering for the cycle
and instret counters, respectively. Remove dropped CSRs that use the
same CSR number with Smcntrpmf extension(mscounteren, mhcounteren).
[1] https://github.com/riscv/riscv-smcntrpmf
bfd/ChangeLog:
* elfxx-riscv.c: New CSR extension.
gas/ChangeLog:
* config/tc-riscv.c (enum riscv_csr_class): New CSR class.
(riscv_csr_address): New handling for CSR class.
* testsuite/gas/riscv/csr-dw-regnums.d: Add new CSRs & remove
* same address drop CSRs.
* testsuite/gas/riscv/csr-dw-regnums.s: Ditto.
* testsuite/gas/riscv/csr-version-1p10.d: Ditto.
* testsuite/gas/riscv/csr-version-1p10.l: Ditto.
* testsuite/gas/riscv/csr-version-1p11.d: Ditto.
* testsuite/gas/riscv/csr-version-1p11.l: Ditto.
* testsuite/gas/riscv/csr-version-1p12.d: Ditto.
* testsuite/gas/riscv/csr-version-1p12.l: Ditto.
* testsuite/gas/riscv/csr-version-1p9p1.d: Ditto.
* testsuite/gas/riscv/csr-version-1p9p1.l: Ditto.
* testsuite/gas/riscv/csr.s: Ditto.
include/ChangeLog:
* opcode/riscv-opc.h (CSR_MSCOUNTEREN): New CSR number.
(CSR_MHCOUNTEREN): Ditto.
(CSR_MCYCLECFG): Ditto.
(CSR_MINSTRETCFG): Ditto.
(CSR_MCYCLECFGH): Ditto.
(CSR_MINSTRETCFGH): Ditto.
(DECLARE_CSR): New CSR declaration.
---
bfd/elfxx-riscv.c | 2 ++
gas/config/tc-riscv.c | 8 ++++++
gas/testsuite/gas/riscv/csr-dw-regnums.d | 6 ++--
gas/testsuite/gas/riscv/csr-dw-regnums.s | 7 +++--
gas/testsuite/gas/riscv/csr-version-1p10.d | 12 +++++---
gas/testsuite/gas/riscv/csr-version-1p10.l | 32 +++++++++++++++------
gas/testsuite/gas/riscv/csr-version-1p11.d | 12 +++++---
gas/testsuite/gas/riscv/csr-version-1p11.l | 32 +++++++++++++++------
gas/testsuite/gas/riscv/csr-version-1p12.d | 12 +++++---
gas/testsuite/gas/riscv/csr-version-1p12.l | 32 +++++++++++++++------
gas/testsuite/gas/riscv/csr-version-1p9p1.d | 12 +++++---
gas/testsuite/gas/riscv/csr-version-1p9p1.l | 24 ++++++++++++++++
gas/testsuite/gas/riscv/csr.s | 8 ++++--
include/opcode/riscv-opc.h | 14 ++++++---
14 files changed, 163 insertions(+), 50 deletions(-)
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index ee96608358e..c3d5cfa5ce7 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1181,6 +1181,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"sscofpmf", "zicsr", check_implicit_always},
{"ssstateen", "zicsr", check_implicit_always},
{"sstc", "zicsr", check_implicit_always},
+ {"smcntrpmf", "zicsr", check_implicit_always},
{NULL, NULL, NULL}
};
@@ -1319,6 +1320,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
{"smaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smepmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
+ {"smcntrpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"sscofpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 80c14a3cd22..c46acc87794 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -76,6 +76,8 @@ enum riscv_csr_class
CSR_CLASS_SMAIA_32, /* Smaia, rv32 only */
CSR_CLASS_SMSTATEEN, /* Smstateen only */
CSR_CLASS_SMSTATEEN_32, /* Smstateen RV32 only */
+ CSR_CLASS_SMCNTRPMF, /* Smcntrpmf only */
+ CSR_CLASS_SMCNTRPMF_32, /* Smcntrpmf RV32 only */
CSR_CLASS_SSAIA, /* Ssaia */
CSR_CLASS_SSAIA_AND_H, /* Ssaia with H */
CSR_CLASS_SSAIA_32, /* Ssaia, rv32 only */
@@ -1058,6 +1060,12 @@ riscv_csr_address (const char *csr_name,
case CSR_CLASS_SMSTATEEN:
extension = "smstateen";
break;
+ case CSR_CLASS_SMCNTRPMF_32:
+ is_rv32_only = true;
+ /* Fall through. */
+ case CSR_CLASS_SMCNTRPMF:
+ extension = "smcntrpmf";
+ break;
case CSR_CLASS_SSAIA:
case CSR_CLASS_SSAIA_AND_H:
case CSR_CLASS_SSAIA_32:
diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.d b/gas/testsuite/gas/riscv/csr-dw-regnums.d
index fd830666ab8..ec882deec50 100644
--- a/gas/testsuite/gas/riscv/csr-dw-regnums.d
+++ b/gas/testsuite/gas/riscv/csr-dw-regnums.d
@@ -344,6 +344,10 @@ Contents of the .* section:
DW_CFA_offset_extended_sf: r5661 \(hstateen1h\) at cfa\+6260
DW_CFA_offset_extended_sf: r5662 \(hstateen2h\) at cfa\+6264
DW_CFA_offset_extended_sf: r5663 \(hstateen3h\) at cfa\+6268
+ DW_CFA_offset_extended_sf: r4897 \(mcyclecfg\) at cfa\+3204
+ DW_CFA_offset_extended_sf: r4898 \(minstretcfg\) at cfa\+3208
+ DW_CFA_offset_extended_sf: r5921 \(mcyclecfgh\) at cfa\+7204
+ DW_CFA_offset_extended_sf: r5922 \(minstretcfgh\) at cfa\+7208
DW_CFA_offset_extended_sf: r4432 \(siselect\) at cfa\+1344
DW_CFA_offset_extended_sf: r4433 \(sireg\) at cfa\+1348
DW_CFA_offset_extended_sf: r4444 \(stopei\) at cfa\+1392
@@ -410,8 +414,6 @@ Contents of the .* section:
DW_CFA_offset_extended_sf: r4995 \(mibound\) at cfa\+3596
DW_CFA_offset_extended_sf: r4996 \(mdbase\) at cfa\+3600
DW_CFA_offset_extended_sf: r4997 \(mdbound\) at cfa\+3604
- DW_CFA_offset_extended_sf: r4897 \(mscounteren\) at cfa\+3204
- DW_CFA_offset_extended_sf: r4898 \(mhcounteren\) at cfa\+3208
DW_CFA_offset_extended: r4096 \(ustatus\) at cfa\+0
DW_CFA_offset_extended_sf: r4100 \(uie\) at cfa\+16
DW_CFA_offset_extended_sf: r4101 \(utvec\) at cfa\+20
diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.s b/gas/testsuite/gas/riscv/csr-dw-regnums.s
index b8b0f790229..88ac94256ee 100644
--- a/gas/testsuite/gas/riscv/csr-dw-regnums.s
+++ b/gas/testsuite/gas/riscv/csr-dw-regnums.s
@@ -342,6 +342,11 @@ _start:
.cfi_offset hstateen1h, 6260
.cfi_offset hstateen2h, 6264
.cfi_offset hstateen3h, 6268
+ # Smcntrpmf extension
+ .cfi_offset mcyclecfg, 3204
+ .cfi_offset minstretcfg, 3208
+ .cfi_offset mcyclecfgh, 7204
+ .cfi_offset minstretcfgh, 7208
# Ssaia extension
.cfi_offset siselect, 1344
.cfi_offset sireg, 1348
@@ -412,8 +417,6 @@ _start:
.cfi_offset mibound, 3596
.cfi_offset mdbase, 3600
.cfi_offset mdbound, 3604
- .cfi_offset mscounteren, 3204
- .cfi_offset mhcounteren, 3208
.cfi_offset ustatus, 0
.cfi_offset uie, 16
.cfi_offset utvec, 20
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d b/gas/testsuite/gas/riscv/csr-version-1p10.d
index ee41e1025cc..808022e3e8e 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
@@ -663,6 +663,14 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
[ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
[ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
+[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
+[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
+[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
+[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
+[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
+[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
+[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
+[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
[ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
[ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
[ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
@@ -795,10 +803,6 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+0x384,a1
[ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,0x385
[ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+0x385,a1
-[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,0x321
-[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+0x321,a1
-[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,0x322
-[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+0x322,a1
[ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,ustatus
[ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+ustatus,a1
[ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,uie
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l b/gas/testsuite/gas/riscv/csr-version-1p10.l
index 27bdc80c0d5..10caa362123 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
@@ -1033,6 +1033,30 @@
.*Info: macro .*
.*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
+.*Info: macro .*
.*Warning: invalid CSR `siselect', needs `ssaia' extension
.*Info: macro .*
.*Warning: invalid CSR `siselect', needs `ssaia' extension
@@ -1531,14 +1555,6 @@
.*Info: macro .*
.*Warning: invalid CSR `mdbound' for the privileged spec `1.10'
.*Info: macro .*
-.*Warning: invalid CSR `mscounteren' for the privileged spec `1.10'
-.*Info: macro .*
-.*Warning: invalid CSR `mscounteren' for the privileged spec `1.10'
-.*Info: macro .*
-.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.10'
-.*Info: macro .*
-.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.10'
-.*Info: macro .*
.*Warning: invalid CSR `fflags', needs `f' extension
.*Info: macro .*
.*Warning: invalid CSR `fflags', needs `f' extension
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d b/gas/testsuite/gas/riscv/csr-version-1p11.d
index a83b1bf68f9..ac3bd6d0e46 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
@@ -663,6 +663,14 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
[ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
[ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
+[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
+[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
+[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
+[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
+[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
+[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
+[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
+[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
[ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
[ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
[ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
@@ -795,10 +803,6 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+0x384,a1
[ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,0x385
[ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+0x385,a1
-[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,0x321
-[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+0x321,a1
-[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,0x322
-[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+0x322,a1
[ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,ustatus
[ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+ustatus,a1
[ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,uie
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l b/gas/testsuite/gas/riscv/csr-version-1p11.l
index ba497228d7f..44f59d92299 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
@@ -1029,6 +1029,30 @@
.*Info: macro .*
.*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
+.*Info: macro .*
.*Warning: invalid CSR `siselect', needs `ssaia' extension
.*Info: macro .*
.*Warning: invalid CSR `siselect', needs `ssaia' extension
@@ -1527,14 +1551,6 @@
.*Info: macro .*
.*Warning: invalid CSR `mdbound' for the privileged spec `1.11'
.*Info: macro .*
-.*Warning: invalid CSR `mscounteren' for the privileged spec `1.11'
-.*Info: macro .*
-.*Warning: invalid CSR `mscounteren' for the privileged spec `1.11'
-.*Info: macro .*
-.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.11'
-.*Info: macro .*
-.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.11'
-.*Info: macro .*
.*Warning: invalid CSR `fflags', needs `f' extension
.*Info: macro .*
.*Warning: invalid CSR `fflags', needs `f' extension
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d b/gas/testsuite/gas/riscv/csr-version-1p12.d
index 612aac28076..99918d22054 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
@@ -663,6 +663,14 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
[ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
[ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
+[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
+[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
+[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
+[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
+[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
+[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
+[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
+[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
[ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
[ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
[ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
@@ -795,10 +803,6 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+0x384,a1
[ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,0x385
[ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+0x385,a1
-[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,0x321
-[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+0x321,a1
-[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,0x322
-[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+0x322,a1
[ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,0x0
[ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+0x0,a1
[ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,0x4
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l b/gas/testsuite/gas/riscv/csr-version-1p12.l
index bdebea22334..96e52fe4538 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
@@ -753,6 +753,30 @@
.*Info: macro .*
.*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
+.*Info: macro .*
.*Warning: invalid CSR `siselect', needs `ssaia' extension
.*Info: macro .*
.*Warning: invalid CSR `siselect', needs `ssaia' extension
@@ -1251,14 +1275,6 @@
.*Info: macro .*
.*Warning: invalid CSR `mdbound' for the privileged spec `1.12'
.*Info: macro .*
-.*Warning: invalid CSR `mscounteren' for the privileged spec `1.12'
-.*Info: macro .*
-.*Warning: invalid CSR `mscounteren' for the privileged spec `1.12'
-.*Info: macro .*
-.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.12'
-.*Info: macro .*
-.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.12'
-.*Info: macro .*
.*Warning: invalid CSR `ustatus' for the privileged spec `1.12'
.*Info: macro .*
.*Warning: invalid CSR `ustatus' for the privileged spec `1.12'
diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.d b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
index 0fe849c269c..85b3bc34d33 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p9p1.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
@@ -663,6 +663,14 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
[ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
[ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
+[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
+[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
+[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
+[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
+[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
+[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
+[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
+[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
[ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
[ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
[ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
@@ -795,10 +803,6 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+mdbase,a1
[ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,mdbound
[ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+mdbound,a1
-[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mscounteren
-[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mscounteren,a1
-[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,mhcounteren
-[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+mhcounteren,a1
[ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,ustatus
[ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+ustatus,a1
[ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,uie
diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.l b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
index 49bd95954e2..705a6d0add2 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p9p1.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
@@ -1133,6 +1133,30 @@
.*Info: macro .*
.*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
+.*Info: macro .*
+.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
+.*Info: macro .*
.*Warning: invalid CSR `siselect', needs `ssaia' extension
.*Info: macro .*
.*Warning: invalid CSR `siselect', needs `ssaia' extension
diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
index c7406ce34c2..e79c49e23e2 100644
--- a/gas/testsuite/gas/riscv/csr.s
+++ b/gas/testsuite/gas/riscv/csr.s
@@ -372,6 +372,12 @@
csr hstateen2h
csr hstateen3h
+ # Smcntrpmf extension
+ csr mcyclecfg
+ csr minstretcfg
+ csr mcyclecfgh
+ csr minstretcfgh
+
# Ssaia
csr siselect
csr sireg
@@ -446,8 +452,6 @@
csr mibound # 0x383 in 1.9.1, dropped in 1.10
csr mdbase # 0x384 in 1.9.1, dropped in 1.10
csr mdbound # 0x385 in 1.9.1, dropped in 1.10
- csr mscounteren # 0x321 in 1.9.1, dropped in 1.10
- csr mhcounteren # 0x322 in 1.9.1, dropped in 1.10
csr ustatus # 0x0 in 1.9.1, dropped in 1.12
csr uie # 0x4 in 1.9.1, dropped in 1.12
csr utvec # 0x5 in 1.9.1, dropped in 1.12
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 53f5f200508..08f0025e4e1 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -2839,8 +2839,6 @@
#define CSR_MIBOUND 0x383
#define CSR_MDBASE 0x384
#define CSR_MDBOUND 0x385
-#define CSR_MSCOUNTEREN 0x321
-#define CSR_MHCOUNTEREN 0x322
#define CSR_USTATUS 0x0
#define CSR_UIE 0x4
#define CSR_UTVEC 0x5
@@ -2884,6 +2882,11 @@
#define CSR_HSTATEEN1H 0x61d
#define CSR_HSTATEEN2H 0x61e
#define CSR_HSTATEEN3H 0x61f
+/* Smcntrpmf extension */
+#define CSR_MCYCLECFG 0x321
+#define CSR_MINSTRETCFG 0x322
+#define CSR_MCYCLECFGH 0x721
+#define CSR_MINSTRETCFGH 0x722
/* Ssaia extension */
#define CSR_SISELECT 0x150
#define CSR_SIREG 0x151
@@ -3861,6 +3864,11 @@ DECLARE_CSR(hstateen0h, CSR_HSTATEEN0H, CSR_CLASS_SSSTATEEN_AND_H_32, PRIV_SPEC_
DECLARE_CSR(hstateen1h, CSR_HSTATEEN1H, CSR_CLASS_SSSTATEEN_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen2h, CSR_HSTATEEN2H, CSR_CLASS_SSSTATEEN_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(hstateen3h, CSR_HSTATEEN3H, CSR_CLASS_SSSTATEEN_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+/* Smcntrpmf extension */
+DECLARE_CSR(mcyclecfg, CSR_MCYCLECFG, CSR_CLASS_SMCNTRPMF, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(minstretcfg, CSR_MINSTRETCFG, CSR_CLASS_SMCNTRPMF, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcyclecfgh, CSR_MCYCLECFGH, CSR_CLASS_SMCNTRPMF_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(minstretcfgh, CSR_MINSTRETCFGH, CSR_CLASS_SMCNTRPMF_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
/* Ssaia extension */
DECLARE_CSR(siselect, CSR_SISELECT, CSR_CLASS_SSAIA, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(sireg, CSR_SIREG, CSR_CLASS_SSAIA, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
@@ -3926,8 +3934,6 @@ DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CL
DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
-DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
-DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P12)
DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P12)
DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P12)
--
2.25.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] RISC-V: Add 'Smcntrpmf' extension and its CSRs
2023-07-24 5:24 [PATCH] RISC-V: Add 'Smcntrpmf' extension and its CSRs Jiawei
@ 2023-08-01 4:51 ` Nelson Chu
2023-08-01 6:11 ` Jan Beulich
2023-08-01 7:05 ` Tsukasa OI
0 siblings, 2 replies; 4+ messages in thread
From: Nelson Chu @ 2023-08-01 4:51 UTC (permalink / raw)
To: Jiawei
Cc: binutils, kito.cheng, palmer, jbeulich, christoph.muellner,
wuwei2016, shihua, shiyulong, chenyixuan
[-- Attachment #1: Type: text/plain, Size: 28544 bytes --]
On Mon, Jul 24, 2023 at 1:25 PM Jiawei <jiawei@iscas.ac.cn> wrote:
> This patch supports RISC-V cycle and instret privilege mode filtering
> extension(Smcntrpmf)[1]. It adds two new 64-bits register mcyclecfg
> and minstretcfg that configure privilege mode filtering for the cycle
> and instret counters, respectively. Remove dropped CSRs that use the
> same CSR number with Smcntrpmf extension(mscounteren, mhcounteren).
>
If we still want to support the privileged versions, then we should use
DECLARE_CSR_ALIAS for these kinds of the reused csrs. However, maybe it's
time that we should give up on supporting the multiple privileged versions
in binutils, and then support the newest one.
Nelson
>
> [1] https://github.com/riscv/riscv-smcntrpmf
>
> bfd/ChangeLog:
>
> * elfxx-riscv.c: New CSR extension.
>
> gas/ChangeLog:
>
> * config/tc-riscv.c (enum riscv_csr_class): New CSR class.
> (riscv_csr_address): New handling for CSR class.
> * testsuite/gas/riscv/csr-dw-regnums.d: Add new CSRs & remove
> * same address drop CSRs.
> * testsuite/gas/riscv/csr-dw-regnums.s: Ditto.
> * testsuite/gas/riscv/csr-version-1p10.d: Ditto.
> * testsuite/gas/riscv/csr-version-1p10.l: Ditto.
> * testsuite/gas/riscv/csr-version-1p11.d: Ditto.
> * testsuite/gas/riscv/csr-version-1p11.l: Ditto.
> * testsuite/gas/riscv/csr-version-1p12.d: Ditto.
> * testsuite/gas/riscv/csr-version-1p12.l: Ditto.
> * testsuite/gas/riscv/csr-version-1p9p1.d: Ditto.
> * testsuite/gas/riscv/csr-version-1p9p1.l: Ditto.
> * testsuite/gas/riscv/csr.s: Ditto.
>
> include/ChangeLog:
>
> * opcode/riscv-opc.h (CSR_MSCOUNTEREN): New CSR number.
> (CSR_MHCOUNTEREN): Ditto.
> (CSR_MCYCLECFG): Ditto.
> (CSR_MINSTRETCFG): Ditto.
> (CSR_MCYCLECFGH): Ditto.
> (CSR_MINSTRETCFGH): Ditto.
> (DECLARE_CSR): New CSR declaration.
>
> ---
> bfd/elfxx-riscv.c | 2 ++
> gas/config/tc-riscv.c | 8 ++++++
> gas/testsuite/gas/riscv/csr-dw-regnums.d | 6 ++--
> gas/testsuite/gas/riscv/csr-dw-regnums.s | 7 +++--
> gas/testsuite/gas/riscv/csr-version-1p10.d | 12 +++++---
> gas/testsuite/gas/riscv/csr-version-1p10.l | 32 +++++++++++++++------
> gas/testsuite/gas/riscv/csr-version-1p11.d | 12 +++++---
> gas/testsuite/gas/riscv/csr-version-1p11.l | 32 +++++++++++++++------
> gas/testsuite/gas/riscv/csr-version-1p12.d | 12 +++++---
> gas/testsuite/gas/riscv/csr-version-1p12.l | 32 +++++++++++++++------
> gas/testsuite/gas/riscv/csr-version-1p9p1.d | 12 +++++---
> gas/testsuite/gas/riscv/csr-version-1p9p1.l | 24 ++++++++++++++++
> gas/testsuite/gas/riscv/csr.s | 8 ++++--
> include/opcode/riscv-opc.h | 14 ++++++---
> 14 files changed, 163 insertions(+), 50 deletions(-)
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index ee96608358e..c3d5cfa5ce7 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1181,6 +1181,7 @@ static struct riscv_implicit_subset
> riscv_implicit_subsets[] =
> {"sscofpmf", "zicsr", check_implicit_always},
> {"ssstateen", "zicsr", check_implicit_always},
> {"sstc", "zicsr", check_implicit_always},
> + {"smcntrpmf", "zicsr", check_implicit_always},
> {NULL, NULL, NULL}
> };
>
> @@ -1319,6 +1320,7 @@ static struct riscv_supported_ext
> riscv_supported_std_s_ext[] =
> {"smaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"smepmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> + {"smcntrpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"ssaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"sscofpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> {"ssstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 80c14a3cd22..c46acc87794 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -76,6 +76,8 @@ enum riscv_csr_class
> CSR_CLASS_SMAIA_32, /* Smaia, rv32 only */
> CSR_CLASS_SMSTATEEN, /* Smstateen only */
> CSR_CLASS_SMSTATEEN_32, /* Smstateen RV32 only */
> + CSR_CLASS_SMCNTRPMF, /* Smcntrpmf only */
> + CSR_CLASS_SMCNTRPMF_32, /* Smcntrpmf RV32 only */
> CSR_CLASS_SSAIA, /* Ssaia */
> CSR_CLASS_SSAIA_AND_H, /* Ssaia with H */
> CSR_CLASS_SSAIA_32, /* Ssaia, rv32 only */
> @@ -1058,6 +1060,12 @@ riscv_csr_address (const char *csr_name,
> case CSR_CLASS_SMSTATEEN:
> extension = "smstateen";
> break;
> + case CSR_CLASS_SMCNTRPMF_32:
> + is_rv32_only = true;
> + /* Fall through. */
> + case CSR_CLASS_SMCNTRPMF:
> + extension = "smcntrpmf";
> + break;
> case CSR_CLASS_SSAIA:
> case CSR_CLASS_SSAIA_AND_H:
> case CSR_CLASS_SSAIA_32:
> diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.d
> b/gas/testsuite/gas/riscv/csr-dw-regnums.d
> index fd830666ab8..ec882deec50 100644
> --- a/gas/testsuite/gas/riscv/csr-dw-regnums.d
> +++ b/gas/testsuite/gas/riscv/csr-dw-regnums.d
> @@ -344,6 +344,10 @@ Contents of the .* section:
> DW_CFA_offset_extended_sf: r5661 \(hstateen1h\) at cfa\+6260
> DW_CFA_offset_extended_sf: r5662 \(hstateen2h\) at cfa\+6264
> DW_CFA_offset_extended_sf: r5663 \(hstateen3h\) at cfa\+6268
> + DW_CFA_offset_extended_sf: r4897 \(mcyclecfg\) at cfa\+3204
> + DW_CFA_offset_extended_sf: r4898 \(minstretcfg\) at cfa\+3208
> + DW_CFA_offset_extended_sf: r5921 \(mcyclecfgh\) at cfa\+7204
> + DW_CFA_offset_extended_sf: r5922 \(minstretcfgh\) at cfa\+7208
> DW_CFA_offset_extended_sf: r4432 \(siselect\) at cfa\+1344
> DW_CFA_offset_extended_sf: r4433 \(sireg\) at cfa\+1348
> DW_CFA_offset_extended_sf: r4444 \(stopei\) at cfa\+1392
> @@ -410,8 +414,6 @@ Contents of the .* section:
> DW_CFA_offset_extended_sf: r4995 \(mibound\) at cfa\+3596
> DW_CFA_offset_extended_sf: r4996 \(mdbase\) at cfa\+3600
> DW_CFA_offset_extended_sf: r4997 \(mdbound\) at cfa\+3604
> - DW_CFA_offset_extended_sf: r4897 \(mscounteren\) at cfa\+3204
> - DW_CFA_offset_extended_sf: r4898 \(mhcounteren\) at cfa\+3208
> DW_CFA_offset_extended: r4096 \(ustatus\) at cfa\+0
> DW_CFA_offset_extended_sf: r4100 \(uie\) at cfa\+16
> DW_CFA_offset_extended_sf: r4101 \(utvec\) at cfa\+20
> diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.s
> b/gas/testsuite/gas/riscv/csr-dw-regnums.s
> index b8b0f790229..88ac94256ee 100644
> --- a/gas/testsuite/gas/riscv/csr-dw-regnums.s
> +++ b/gas/testsuite/gas/riscv/csr-dw-regnums.s
> @@ -342,6 +342,11 @@ _start:
> .cfi_offset hstateen1h, 6260
> .cfi_offset hstateen2h, 6264
> .cfi_offset hstateen3h, 6268
> + # Smcntrpmf extension
> + .cfi_offset mcyclecfg, 3204
> + .cfi_offset minstretcfg, 3208
> + .cfi_offset mcyclecfgh, 7204
> + .cfi_offset minstretcfgh, 7208
> # Ssaia extension
> .cfi_offset siselect, 1344
> .cfi_offset sireg, 1348
> @@ -412,8 +417,6 @@ _start:
> .cfi_offset mibound, 3596
> .cfi_offset mdbase, 3600
> .cfi_offset mdbound, 3604
> - .cfi_offset mscounteren, 3204
> - .cfi_offset mhcounteren, 3208
> .cfi_offset ustatus, 0
> .cfi_offset uie, 16
> .cfi_offset utvec, 20
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d
> b/gas/testsuite/gas/riscv/csr-version-1p10.d
> index ee41e1025cc..808022e3e8e 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p10.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
> @@ -663,6 +663,14 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
> [ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
> [ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
> +[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
> +[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
> +[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
> +[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
> +[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
> +[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
> +[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
> +[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
> [ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
> [ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
> [ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
> @@ -795,10 +803,6 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+0x384,a1
> [ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,0x385
> [ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+0x385,a1
> -[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,0x321
> -[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+0x321,a1
> -[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,0x322
> -[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+0x322,a1
> [ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,ustatus
> [ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+ustatus,a1
> [ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,uie
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l
> b/gas/testsuite/gas/riscv/csr-version-1p10.l
> index 27bdc80c0d5..10caa362123 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p10.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
> @@ -1033,6 +1033,30 @@
> .*Info: macro .*
> .*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> .*Warning: invalid CSR `siselect', needs `ssaia' extension
> .*Info: macro .*
> .*Warning: invalid CSR `siselect', needs `ssaia' extension
> @@ -1531,14 +1555,6 @@
> .*Info: macro .*
> .*Warning: invalid CSR `mdbound' for the privileged spec `1.10'
> .*Info: macro .*
> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.10'
> -.*Info: macro .*
> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.10'
> -.*Info: macro .*
> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.10'
> -.*Info: macro .*
> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.10'
> -.*Info: macro .*
> .*Warning: invalid CSR `fflags', needs `f' extension
> .*Info: macro .*
> .*Warning: invalid CSR `fflags', needs `f' extension
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d
> b/gas/testsuite/gas/riscv/csr-version-1p11.d
> index a83b1bf68f9..ac3bd6d0e46 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p11.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
> @@ -663,6 +663,14 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
> [ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
> [ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
> +[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
> +[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
> +[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
> +[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
> +[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
> +[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
> +[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
> +[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
> [ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
> [ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
> [ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
> @@ -795,10 +803,6 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+0x384,a1
> [ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,0x385
> [ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+0x385,a1
> -[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,0x321
> -[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+0x321,a1
> -[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,0x322
> -[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+0x322,a1
> [ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,ustatus
> [ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+ustatus,a1
> [ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,uie
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l
> b/gas/testsuite/gas/riscv/csr-version-1p11.l
> index ba497228d7f..44f59d92299 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p11.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
> @@ -1029,6 +1029,30 @@
> .*Info: macro .*
> .*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> .*Warning: invalid CSR `siselect', needs `ssaia' extension
> .*Info: macro .*
> .*Warning: invalid CSR `siselect', needs `ssaia' extension
> @@ -1527,14 +1551,6 @@
> .*Info: macro .*
> .*Warning: invalid CSR `mdbound' for the privileged spec `1.11'
> .*Info: macro .*
> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.11'
> -.*Info: macro .*
> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.11'
> -.*Info: macro .*
> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.11'
> -.*Info: macro .*
> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.11'
> -.*Info: macro .*
> .*Warning: invalid CSR `fflags', needs `f' extension
> .*Info: macro .*
> .*Warning: invalid CSR `fflags', needs `f' extension
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d
> b/gas/testsuite/gas/riscv/csr-version-1p12.d
> index 612aac28076..99918d22054 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p12.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
> @@ -663,6 +663,14 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
> [ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
> [ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
> +[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
> +[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
> +[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
> +[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
> +[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
> +[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
> +[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
> +[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
> [ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
> [ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
> [ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
> @@ -795,10 +803,6 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+0x384,a1
> [ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,0x385
> [ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+0x385,a1
> -[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,0x321
> -[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+0x321,a1
> -[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,0x322
> -[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+0x322,a1
> [ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,0x0
> [ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+0x0,a1
> [ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,0x4
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l
> b/gas/testsuite/gas/riscv/csr-version-1p12.l
> index bdebea22334..96e52fe4538 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p12.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
> @@ -753,6 +753,30 @@
> .*Info: macro .*
> .*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> .*Warning: invalid CSR `siselect', needs `ssaia' extension
> .*Info: macro .*
> .*Warning: invalid CSR `siselect', needs `ssaia' extension
> @@ -1251,14 +1275,6 @@
> .*Info: macro .*
> .*Warning: invalid CSR `mdbound' for the privileged spec `1.12'
> .*Info: macro .*
> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.12'
> -.*Info: macro .*
> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.12'
> -.*Info: macro .*
> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.12'
> -.*Info: macro .*
> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.12'
> -.*Info: macro .*
> .*Warning: invalid CSR `ustatus' for the privileged spec `1.12'
> .*Info: macro .*
> .*Warning: invalid CSR `ustatus' for the privileged spec `1.12'
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.d
> b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
> index 0fe849c269c..85b3bc34d33 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p9p1.d
> +++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
> @@ -663,6 +663,14 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
> [ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
> [ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
> +[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
> +[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
> +[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
> +[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
> +[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
> +[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
> +[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
> +[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
> [ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
> [ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
> [ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
> @@ -795,10 +803,6 @@ Disassembly of section .text:
> [ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+mdbase,a1
> [ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,mdbound
> [ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+mdbound,a1
> -[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mscounteren
> -[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mscounteren,a1
> -[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,mhcounteren
> -[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+mhcounteren,a1
> [ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,ustatus
> [ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+ustatus,a1
> [ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,uie
> diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.l
> b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
> index 49bd95954e2..705a6d0add2 100644
> --- a/gas/testsuite/gas/riscv/csr-version-1p9p1.l
> +++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
> @@ -1133,6 +1133,30 @@
> .*Info: macro .*
> .*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
> .*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
> +.*Info: macro .*
> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
> +.*Info: macro .*
> .*Warning: invalid CSR `siselect', needs `ssaia' extension
> .*Info: macro .*
> .*Warning: invalid CSR `siselect', needs `ssaia' extension
> diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
> index c7406ce34c2..e79c49e23e2 100644
> --- a/gas/testsuite/gas/riscv/csr.s
> +++ b/gas/testsuite/gas/riscv/csr.s
> @@ -372,6 +372,12 @@
> csr hstateen2h
> csr hstateen3h
>
> + # Smcntrpmf extension
> + csr mcyclecfg
> + csr minstretcfg
> + csr mcyclecfgh
> + csr minstretcfgh
> +
> # Ssaia
> csr siselect
> csr sireg
> @@ -446,8 +452,6 @@
> csr mibound # 0x383 in 1.9.1, dropped in 1.10
> csr mdbase # 0x384 in 1.9.1, dropped in 1.10
> csr mdbound # 0x385 in 1.9.1, dropped in 1.10
> - csr mscounteren # 0x321 in 1.9.1, dropped in 1.10
> - csr mhcounteren # 0x322 in 1.9.1, dropped in 1.10
> csr ustatus # 0x0 in 1.9.1, dropped in 1.12
> csr uie # 0x4 in 1.9.1, dropped in 1.12
> csr utvec # 0x5 in 1.9.1, dropped in 1.12
> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
> index 53f5f200508..08f0025e4e1 100644
> --- a/include/opcode/riscv-opc.h
> +++ b/include/opcode/riscv-opc.h
> @@ -2839,8 +2839,6 @@
> #define CSR_MIBOUND 0x383
> #define CSR_MDBASE 0x384
> #define CSR_MDBOUND 0x385
> -#define CSR_MSCOUNTEREN 0x321
> -#define CSR_MHCOUNTEREN 0x322
> #define CSR_USTATUS 0x0
> #define CSR_UIE 0x4
> #define CSR_UTVEC 0x5
> @@ -2884,6 +2882,11 @@
> #define CSR_HSTATEEN1H 0x61d
> #define CSR_HSTATEEN2H 0x61e
> #define CSR_HSTATEEN3H 0x61f
> +/* Smcntrpmf extension */
> +#define CSR_MCYCLECFG 0x321
> +#define CSR_MINSTRETCFG 0x322
> +#define CSR_MCYCLECFGH 0x721
> +#define CSR_MINSTRETCFGH 0x722
> /* Ssaia extension */
> #define CSR_SISELECT 0x150
> #define CSR_SIREG 0x151
> @@ -3861,6 +3864,11 @@ DECLARE_CSR(hstateen0h, CSR_HSTATEEN0H,
> CSR_CLASS_SSSTATEEN_AND_H_32, PRIV_SPEC_
> DECLARE_CSR(hstateen1h, CSR_HSTATEEN1H, CSR_CLASS_SSSTATEEN_AND_H_32,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> DECLARE_CSR(hstateen2h, CSR_HSTATEEN2H, CSR_CLASS_SSSTATEEN_AND_H_32,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> DECLARE_CSR(hstateen3h, CSR_HSTATEEN3H, CSR_CLASS_SSSTATEEN_AND_H_32,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> +/* Smcntrpmf extension */
> +DECLARE_CSR(mcyclecfg, CSR_MCYCLECFG, CSR_CLASS_SMCNTRPMF,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> +DECLARE_CSR(minstretcfg, CSR_MINSTRETCFG, CSR_CLASS_SMCNTRPMF,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> +DECLARE_CSR(mcyclecfgh, CSR_MCYCLECFGH, CSR_CLASS_SMCNTRPMF_32,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> +DECLARE_CSR(minstretcfgh, CSR_MINSTRETCFGH, CSR_CLASS_SMCNTRPMF_32,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> /* Ssaia extension */
> DECLARE_CSR(siselect, CSR_SISELECT, CSR_CLASS_SSAIA,
> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
> DECLARE_CSR(sireg, CSR_SIREG, CSR_CLASS_SSAIA, PRIV_SPEC_CLASS_NONE,
> PRIV_SPEC_CLASS_NONE)
> @@ -3926,8 +3934,6 @@ DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I,
> PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CL
> DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
> PRIV_SPEC_CLASS_1P10)
> DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
> PRIV_SPEC_CLASS_1P10)
> DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
> PRIV_SPEC_CLASS_1P10)
> -DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I,
> PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
> -DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I,
> PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
> DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
> PRIV_SPEC_CLASS_1P12)
> DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
> PRIV_SPEC_CLASS_1P12)
> DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
> PRIV_SPEC_CLASS_1P12)
> --
> 2.25.1
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] RISC-V: Add 'Smcntrpmf' extension and its CSRs
2023-08-01 4:51 ` Nelson Chu
@ 2023-08-01 6:11 ` Jan Beulich
2023-08-01 7:05 ` Tsukasa OI
1 sibling, 0 replies; 4+ messages in thread
From: Jan Beulich @ 2023-08-01 6:11 UTC (permalink / raw)
To: Nelson Chu
Cc: binutils, kito.cheng, palmer, christoph.muellner, wuwei2016,
shihua, shiyulong, chenyixuan, Jiawei
On 01.08.2023 06:51, Nelson Chu wrote:
> On Mon, Jul 24, 2023 at 1:25 PM Jiawei <jiawei@iscas.ac.cn> wrote:
>
>> This patch supports RISC-V cycle and instret privilege mode filtering
>> extension(Smcntrpmf)[1]. It adds two new 64-bits register mcyclecfg
>> and minstretcfg that configure privilege mode filtering for the cycle
>> and instret counters, respectively. Remove dropped CSRs that use the
>> same CSR number with Smcntrpmf extension(mscounteren, mhcounteren).
>>
>
> If we still want to support the privileged versions, then we should use
> DECLARE_CSR_ALIAS for these kinds of the reused csrs. However, maybe it's
> time that we should give up on supporting the multiple privileged versions
> in binutils, and then support the newest one.
That might work now, but going forward you won't be able to always only
support the newest version, I suppose.
Jan
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] RISC-V: Add 'Smcntrpmf' extension and its CSRs
2023-08-01 4:51 ` Nelson Chu
2023-08-01 6:11 ` Jan Beulich
@ 2023-08-01 7:05 ` Tsukasa OI
1 sibling, 0 replies; 4+ messages in thread
From: Tsukasa OI @ 2023-08-01 7:05 UTC (permalink / raw)
To: Nelson Chu; +Cc: binutils
On 2023/08/01 13:51, Nelson Chu wrote:
> On Mon, Jul 24, 2023 at 1:25 PM Jiawei <jiawei@iscas.ac.cn> wrote:
>
>> This patch supports RISC-V cycle and instret privilege mode filtering
>> extension(Smcntrpmf)[1]. It adds two new 64-bits register mcyclecfg
>> and minstretcfg that configure privilege mode filtering for the cycle
>> and instret counters, respectively. Remove dropped CSRs that use the
>> same CSR number with Smcntrpmf extension(mscounteren, mhcounteren).
>>
>
> If we still want to support the privileged versions, then we should use
> DECLARE_CSR_ALIAS for these kinds of the reused csrs. However, maybe it's
> time that we should give up on supporting the multiple privileged versions
> in binutils, and then support the newest one.
>
> Nelson
Hmm, privileged specification 1.10 itself is mature enough (released in
2017) but in the market, there's widely produced chip implementing the
privileged specification 1.9... Kendryte K210.
Because changing the support here have an effect to GDB-based debugging,
dropping support needs to be careful. In the current situation,
modifying 'Smcntrpmf' patch seems better (just using DECLARE_CSR_ALIAS
should work).
If we encounter more severe problem implementing new extensions, I will
start actively supporting to drop old privilege specifications. In this
particular case, I don't see an urgent need to drop 1.9.1 entirely.
Thanks,
Tsukasa
>
>
>>
>> [1] https://github.com/riscv/riscv-smcntrpmf
>>
>> bfd/ChangeLog:
>>
>> * elfxx-riscv.c: New CSR extension.
>>
>> gas/ChangeLog:
>>
>> * config/tc-riscv.c (enum riscv_csr_class): New CSR class.
>> (riscv_csr_address): New handling for CSR class.
>> * testsuite/gas/riscv/csr-dw-regnums.d: Add new CSRs & remove
>> * same address drop CSRs.
>> * testsuite/gas/riscv/csr-dw-regnums.s: Ditto.
>> * testsuite/gas/riscv/csr-version-1p10.d: Ditto.
>> * testsuite/gas/riscv/csr-version-1p10.l: Ditto.
>> * testsuite/gas/riscv/csr-version-1p11.d: Ditto.
>> * testsuite/gas/riscv/csr-version-1p11.l: Ditto.
>> * testsuite/gas/riscv/csr-version-1p12.d: Ditto.
>> * testsuite/gas/riscv/csr-version-1p12.l: Ditto.
>> * testsuite/gas/riscv/csr-version-1p9p1.d: Ditto.
>> * testsuite/gas/riscv/csr-version-1p9p1.l: Ditto.
>> * testsuite/gas/riscv/csr.s: Ditto.
>>
>> include/ChangeLog:
>>
>> * opcode/riscv-opc.h (CSR_MSCOUNTEREN): New CSR number.
>> (CSR_MHCOUNTEREN): Ditto.
>> (CSR_MCYCLECFG): Ditto.
>> (CSR_MINSTRETCFG): Ditto.
>> (CSR_MCYCLECFGH): Ditto.
>> (CSR_MINSTRETCFGH): Ditto.
>> (DECLARE_CSR): New CSR declaration.
>>
>> ---
>> bfd/elfxx-riscv.c | 2 ++
>> gas/config/tc-riscv.c | 8 ++++++
>> gas/testsuite/gas/riscv/csr-dw-regnums.d | 6 ++--
>> gas/testsuite/gas/riscv/csr-dw-regnums.s | 7 +++--
>> gas/testsuite/gas/riscv/csr-version-1p10.d | 12 +++++---
>> gas/testsuite/gas/riscv/csr-version-1p10.l | 32 +++++++++++++++------
>> gas/testsuite/gas/riscv/csr-version-1p11.d | 12 +++++---
>> gas/testsuite/gas/riscv/csr-version-1p11.l | 32 +++++++++++++++------
>> gas/testsuite/gas/riscv/csr-version-1p12.d | 12 +++++---
>> gas/testsuite/gas/riscv/csr-version-1p12.l | 32 +++++++++++++++------
>> gas/testsuite/gas/riscv/csr-version-1p9p1.d | 12 +++++---
>> gas/testsuite/gas/riscv/csr-version-1p9p1.l | 24 ++++++++++++++++
>> gas/testsuite/gas/riscv/csr.s | 8 ++++--
>> include/opcode/riscv-opc.h | 14 ++++++---
>> 14 files changed, 163 insertions(+), 50 deletions(-)
>>
>> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
>> index ee96608358e..c3d5cfa5ce7 100644
>> --- a/bfd/elfxx-riscv.c
>> +++ b/bfd/elfxx-riscv.c
>> @@ -1181,6 +1181,7 @@ static struct riscv_implicit_subset
>> riscv_implicit_subsets[] =
>> {"sscofpmf", "zicsr", check_implicit_always},
>> {"ssstateen", "zicsr", check_implicit_always},
>> {"sstc", "zicsr", check_implicit_always},
>> + {"smcntrpmf", "zicsr", check_implicit_always},
>> {NULL, NULL, NULL}
>> };
>>
>> @@ -1319,6 +1320,7 @@ static struct riscv_supported_ext
>> riscv_supported_std_s_ext[] =
>> {"smaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
>> {"smepmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
>> {"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
>> + {"smcntrpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
>> {"ssaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
>> {"sscofpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
>> {"ssstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
>> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
>> index 80c14a3cd22..c46acc87794 100644
>> --- a/gas/config/tc-riscv.c
>> +++ b/gas/config/tc-riscv.c
>> @@ -76,6 +76,8 @@ enum riscv_csr_class
>> CSR_CLASS_SMAIA_32, /* Smaia, rv32 only */
>> CSR_CLASS_SMSTATEEN, /* Smstateen only */
>> CSR_CLASS_SMSTATEEN_32, /* Smstateen RV32 only */
>> + CSR_CLASS_SMCNTRPMF, /* Smcntrpmf only */
>> + CSR_CLASS_SMCNTRPMF_32, /* Smcntrpmf RV32 only */
>> CSR_CLASS_SSAIA, /* Ssaia */
>> CSR_CLASS_SSAIA_AND_H, /* Ssaia with H */
>> CSR_CLASS_SSAIA_32, /* Ssaia, rv32 only */
>> @@ -1058,6 +1060,12 @@ riscv_csr_address (const char *csr_name,
>> case CSR_CLASS_SMSTATEEN:
>> extension = "smstateen";
>> break;
>> + case CSR_CLASS_SMCNTRPMF_32:
>> + is_rv32_only = true;
>> + /* Fall through. */
>> + case CSR_CLASS_SMCNTRPMF:
>> + extension = "smcntrpmf";
>> + break;
>> case CSR_CLASS_SSAIA:
>> case CSR_CLASS_SSAIA_AND_H:
>> case CSR_CLASS_SSAIA_32:
>> diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.d
>> b/gas/testsuite/gas/riscv/csr-dw-regnums.d
>> index fd830666ab8..ec882deec50 100644
>> --- a/gas/testsuite/gas/riscv/csr-dw-regnums.d
>> +++ b/gas/testsuite/gas/riscv/csr-dw-regnums.d
>> @@ -344,6 +344,10 @@ Contents of the .* section:
>> DW_CFA_offset_extended_sf: r5661 \(hstateen1h\) at cfa\+6260
>> DW_CFA_offset_extended_sf: r5662 \(hstateen2h\) at cfa\+6264
>> DW_CFA_offset_extended_sf: r5663 \(hstateen3h\) at cfa\+6268
>> + DW_CFA_offset_extended_sf: r4897 \(mcyclecfg\) at cfa\+3204
>> + DW_CFA_offset_extended_sf: r4898 \(minstretcfg\) at cfa\+3208
>> + DW_CFA_offset_extended_sf: r5921 \(mcyclecfgh\) at cfa\+7204
>> + DW_CFA_offset_extended_sf: r5922 \(minstretcfgh\) at cfa\+7208
>> DW_CFA_offset_extended_sf: r4432 \(siselect\) at cfa\+1344
>> DW_CFA_offset_extended_sf: r4433 \(sireg\) at cfa\+1348
>> DW_CFA_offset_extended_sf: r4444 \(stopei\) at cfa\+1392
>> @@ -410,8 +414,6 @@ Contents of the .* section:
>> DW_CFA_offset_extended_sf: r4995 \(mibound\) at cfa\+3596
>> DW_CFA_offset_extended_sf: r4996 \(mdbase\) at cfa\+3600
>> DW_CFA_offset_extended_sf: r4997 \(mdbound\) at cfa\+3604
>> - DW_CFA_offset_extended_sf: r4897 \(mscounteren\) at cfa\+3204
>> - DW_CFA_offset_extended_sf: r4898 \(mhcounteren\) at cfa\+3208
>> DW_CFA_offset_extended: r4096 \(ustatus\) at cfa\+0
>> DW_CFA_offset_extended_sf: r4100 \(uie\) at cfa\+16
>> DW_CFA_offset_extended_sf: r4101 \(utvec\) at cfa\+20
>> diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.s
>> b/gas/testsuite/gas/riscv/csr-dw-regnums.s
>> index b8b0f790229..88ac94256ee 100644
>> --- a/gas/testsuite/gas/riscv/csr-dw-regnums.s
>> +++ b/gas/testsuite/gas/riscv/csr-dw-regnums.s
>> @@ -342,6 +342,11 @@ _start:
>> .cfi_offset hstateen1h, 6260
>> .cfi_offset hstateen2h, 6264
>> .cfi_offset hstateen3h, 6268
>> + # Smcntrpmf extension
>> + .cfi_offset mcyclecfg, 3204
>> + .cfi_offset minstretcfg, 3208
>> + .cfi_offset mcyclecfgh, 7204
>> + .cfi_offset minstretcfgh, 7208
>> # Ssaia extension
>> .cfi_offset siselect, 1344
>> .cfi_offset sireg, 1348
>> @@ -412,8 +417,6 @@ _start:
>> .cfi_offset mibound, 3596
>> .cfi_offset mdbase, 3600
>> .cfi_offset mdbound, 3604
>> - .cfi_offset mscounteren, 3204
>> - .cfi_offset mhcounteren, 3208
>> .cfi_offset ustatus, 0
>> .cfi_offset uie, 16
>> .cfi_offset utvec, 20
>> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d
>> b/gas/testsuite/gas/riscv/csr-version-1p10.d
>> index ee41e1025cc..808022e3e8e 100644
>> --- a/gas/testsuite/gas/riscv/csr-version-1p10.d
>> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
>> @@ -663,6 +663,14 @@ Disassembly of section .text:
>> [ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
>> [ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
>> [ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
>> +[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
>> +[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
>> +[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
>> +[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
>> +[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
>> +[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
>> +[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
>> +[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
>> [ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
>> [ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
>> [ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
>> @@ -795,10 +803,6 @@ Disassembly of section .text:
>> [ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+0x384,a1
>> [ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,0x385
>> [ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+0x385,a1
>> -[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,0x321
>> -[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+0x321,a1
>> -[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,0x322
>> -[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+0x322,a1
>> [ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,ustatus
>> [ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+ustatus,a1
>> [ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,uie
>> diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l
>> b/gas/testsuite/gas/riscv/csr-version-1p10.l
>> index 27bdc80c0d5..10caa362123 100644
>> --- a/gas/testsuite/gas/riscv/csr-version-1p10.l
>> +++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
>> @@ -1033,6 +1033,30 @@
>> .*Info: macro .*
>> .*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
>> .*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> .*Warning: invalid CSR `siselect', needs `ssaia' extension
>> .*Info: macro .*
>> .*Warning: invalid CSR `siselect', needs `ssaia' extension
>> @@ -1531,14 +1555,6 @@
>> .*Info: macro .*
>> .*Warning: invalid CSR `mdbound' for the privileged spec `1.10'
>> .*Info: macro .*
>> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.10'
>> -.*Info: macro .*
>> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.10'
>> -.*Info: macro .*
>> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.10'
>> -.*Info: macro .*
>> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.10'
>> -.*Info: macro .*
>> .*Warning: invalid CSR `fflags', needs `f' extension
>> .*Info: macro .*
>> .*Warning: invalid CSR `fflags', needs `f' extension
>> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d
>> b/gas/testsuite/gas/riscv/csr-version-1p11.d
>> index a83b1bf68f9..ac3bd6d0e46 100644
>> --- a/gas/testsuite/gas/riscv/csr-version-1p11.d
>> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
>> @@ -663,6 +663,14 @@ Disassembly of section .text:
>> [ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
>> [ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
>> [ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
>> +[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
>> +[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
>> +[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
>> +[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
>> +[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
>> +[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
>> +[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
>> +[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
>> [ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
>> [ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
>> [ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
>> @@ -795,10 +803,6 @@ Disassembly of section .text:
>> [ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+0x384,a1
>> [ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,0x385
>> [ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+0x385,a1
>> -[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,0x321
>> -[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+0x321,a1
>> -[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,0x322
>> -[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+0x322,a1
>> [ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,ustatus
>> [ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+ustatus,a1
>> [ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,uie
>> diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l
>> b/gas/testsuite/gas/riscv/csr-version-1p11.l
>> index ba497228d7f..44f59d92299 100644
>> --- a/gas/testsuite/gas/riscv/csr-version-1p11.l
>> +++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
>> @@ -1029,6 +1029,30 @@
>> .*Info: macro .*
>> .*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
>> .*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> .*Warning: invalid CSR `siselect', needs `ssaia' extension
>> .*Info: macro .*
>> .*Warning: invalid CSR `siselect', needs `ssaia' extension
>> @@ -1527,14 +1551,6 @@
>> .*Info: macro .*
>> .*Warning: invalid CSR `mdbound' for the privileged spec `1.11'
>> .*Info: macro .*
>> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.11'
>> -.*Info: macro .*
>> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.11'
>> -.*Info: macro .*
>> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.11'
>> -.*Info: macro .*
>> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.11'
>> -.*Info: macro .*
>> .*Warning: invalid CSR `fflags', needs `f' extension
>> .*Info: macro .*
>> .*Warning: invalid CSR `fflags', needs `f' extension
>> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d
>> b/gas/testsuite/gas/riscv/csr-version-1p12.d
>> index 612aac28076..99918d22054 100644
>> --- a/gas/testsuite/gas/riscv/csr-version-1p12.d
>> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
>> @@ -663,6 +663,14 @@ Disassembly of section .text:
>> [ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
>> [ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
>> [ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
>> +[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
>> +[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
>> +[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
>> +[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
>> +[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
>> +[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
>> +[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
>> +[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
>> [ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
>> [ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
>> [ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
>> @@ -795,10 +803,6 @@ Disassembly of section .text:
>> [ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+0x384,a1
>> [ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,0x385
>> [ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+0x385,a1
>> -[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,0x321
>> -[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+0x321,a1
>> -[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,0x322
>> -[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+0x322,a1
>> [ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,0x0
>> [ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+0x0,a1
>> [ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,0x4
>> diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l
>> b/gas/testsuite/gas/riscv/csr-version-1p12.l
>> index bdebea22334..96e52fe4538 100644
>> --- a/gas/testsuite/gas/riscv/csr-version-1p12.l
>> +++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
>> @@ -753,6 +753,30 @@
>> .*Info: macro .*
>> .*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
>> .*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> .*Warning: invalid CSR `siselect', needs `ssaia' extension
>> .*Info: macro .*
>> .*Warning: invalid CSR `siselect', needs `ssaia' extension
>> @@ -1251,14 +1275,6 @@
>> .*Info: macro .*
>> .*Warning: invalid CSR `mdbound' for the privileged spec `1.12'
>> .*Info: macro .*
>> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.12'
>> -.*Info: macro .*
>> -.*Warning: invalid CSR `mscounteren' for the privileged spec `1.12'
>> -.*Info: macro .*
>> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.12'
>> -.*Info: macro .*
>> -.*Warning: invalid CSR `mhcounteren' for the privileged spec `1.12'
>> -.*Info: macro .*
>> .*Warning: invalid CSR `ustatus' for the privileged spec `1.12'
>> .*Info: macro .*
>> .*Warning: invalid CSR `ustatus' for the privileged spec `1.12'
>> diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.d
>> b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
>> index 0fe849c269c..85b3bc34d33 100644
>> --- a/gas/testsuite/gas/riscv/csr-version-1p9p1.d
>> +++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
>> @@ -663,6 +663,14 @@ Disassembly of section .text:
>> [ ]+[0-9a-f]+:[ ]+61e59073[ ]+csrw[ ]+hstateen2h,a1
>> [ ]+[0-9a-f]+:[ ]+61f02573[ ]+csrr[ ]+a0,hstateen3h
>> [ ]+[0-9a-f]+:[ ]+61f59073[ ]+csrw[ ]+hstateen3h,a1
>> +[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mcyclecfg
>> +[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mcyclecfg,a1
>> +[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,minstretcfg
>> +[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+minstretcfg,a1
>> +[ ]+[0-9a-f]+:[ ]+72102573[ ]+csrr[ ]+a0,mcyclecfgh
>> +[ ]+[0-9a-f]+:[ ]+72159073[ ]+csrw[ ]+mcyclecfgh,a1
>> +[ ]+[0-9a-f]+:[ ]+72202573[ ]+csrr[ ]+a0,minstretcfgh
>> +[ ]+[0-9a-f]+:[ ]+72259073[ ]+csrw[ ]+minstretcfgh,a1
>> [ ]+[0-9a-f]+:[ ]+15002573[ ]+csrr[ ]+a0,siselect
>> [ ]+[0-9a-f]+:[ ]+15059073[ ]+csrw[ ]+siselect,a1
>> [ ]+[0-9a-f]+:[ ]+15102573[ ]+csrr[ ]+a0,sireg
>> @@ -795,10 +803,6 @@ Disassembly of section .text:
>> [ ]+[0-9a-f]+:[ ]+38459073[ ]+csrw[ ]+mdbase,a1
>> [ ]+[0-9a-f]+:[ ]+38502573[ ]+csrr[ ]+a0,mdbound
>> [ ]+[0-9a-f]+:[ ]+38559073[ ]+csrw[ ]+mdbound,a1
>> -[ ]+[0-9a-f]+:[ ]+32102573[ ]+csrr[ ]+a0,mscounteren
>> -[ ]+[0-9a-f]+:[ ]+32159073[ ]+csrw[ ]+mscounteren,a1
>> -[ ]+[0-9a-f]+:[ ]+32202573[ ]+csrr[ ]+a0,mhcounteren
>> -[ ]+[0-9a-f]+:[ ]+32259073[ ]+csrw[ ]+mhcounteren,a1
>> [ ]+[0-9a-f]+:[ ]+00002573[ ]+csrr[ ]+a0,ustatus
>> [ ]+[0-9a-f]+:[ ]+00059073[ ]+csrw[ ]+ustatus,a1
>> [ ]+[0-9a-f]+:[ ]+00402573[ ]+csrr[ ]+a0,uie
>> diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.l
>> b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
>> index 49bd95954e2..705a6d0add2 100644
>> --- a/gas/testsuite/gas/riscv/csr-version-1p9p1.l
>> +++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
>> @@ -1133,6 +1133,30 @@
>> .*Info: macro .*
>> .*Warning: invalid CSR `hstateen3h', needs `ssstateen' extension
>> .*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfg', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `mcyclecfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs rv32i extension
>> +.*Info: macro .*
>> +.*Warning: invalid CSR `minstretcfgh', needs `smcntrpmf' extension
>> +.*Info: macro .*
>> .*Warning: invalid CSR `siselect', needs `ssaia' extension
>> .*Info: macro .*
>> .*Warning: invalid CSR `siselect', needs `ssaia' extension
>> diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
>> index c7406ce34c2..e79c49e23e2 100644
>> --- a/gas/testsuite/gas/riscv/csr.s
>> +++ b/gas/testsuite/gas/riscv/csr.s
>> @@ -372,6 +372,12 @@
>> csr hstateen2h
>> csr hstateen3h
>>
>> + # Smcntrpmf extension
>> + csr mcyclecfg
>> + csr minstretcfg
>> + csr mcyclecfgh
>> + csr minstretcfgh
>> +
>> # Ssaia
>> csr siselect
>> csr sireg
>> @@ -446,8 +452,6 @@
>> csr mibound # 0x383 in 1.9.1, dropped in 1.10
>> csr mdbase # 0x384 in 1.9.1, dropped in 1.10
>> csr mdbound # 0x385 in 1.9.1, dropped in 1.10
>> - csr mscounteren # 0x321 in 1.9.1, dropped in 1.10
>> - csr mhcounteren # 0x322 in 1.9.1, dropped in 1.10
>> csr ustatus # 0x0 in 1.9.1, dropped in 1.12
>> csr uie # 0x4 in 1.9.1, dropped in 1.12
>> csr utvec # 0x5 in 1.9.1, dropped in 1.12
>> diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
>> index 53f5f200508..08f0025e4e1 100644
>> --- a/include/opcode/riscv-opc.h
>> +++ b/include/opcode/riscv-opc.h
>> @@ -2839,8 +2839,6 @@
>> #define CSR_MIBOUND 0x383
>> #define CSR_MDBASE 0x384
>> #define CSR_MDBOUND 0x385
>> -#define CSR_MSCOUNTEREN 0x321
>> -#define CSR_MHCOUNTEREN 0x322
>> #define CSR_USTATUS 0x0
>> #define CSR_UIE 0x4
>> #define CSR_UTVEC 0x5
>> @@ -2884,6 +2882,11 @@
>> #define CSR_HSTATEEN1H 0x61d
>> #define CSR_HSTATEEN2H 0x61e
>> #define CSR_HSTATEEN3H 0x61f
>> +/* Smcntrpmf extension */
>> +#define CSR_MCYCLECFG 0x321
>> +#define CSR_MINSTRETCFG 0x322
>> +#define CSR_MCYCLECFGH 0x721
>> +#define CSR_MINSTRETCFGH 0x722
>> /* Ssaia extension */
>> #define CSR_SISELECT 0x150
>> #define CSR_SIREG 0x151
>> @@ -3861,6 +3864,11 @@ DECLARE_CSR(hstateen0h, CSR_HSTATEEN0H,
>> CSR_CLASS_SSSTATEEN_AND_H_32, PRIV_SPEC_
>> DECLARE_CSR(hstateen1h, CSR_HSTATEEN1H, CSR_CLASS_SSSTATEEN_AND_H_32,
>> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
>> DECLARE_CSR(hstateen2h, CSR_HSTATEEN2H, CSR_CLASS_SSSTATEEN_AND_H_32,
>> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
>> DECLARE_CSR(hstateen3h, CSR_HSTATEEN3H, CSR_CLASS_SSSTATEEN_AND_H_32,
>> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
>> +/* Smcntrpmf extension */
>> +DECLARE_CSR(mcyclecfg, CSR_MCYCLECFG, CSR_CLASS_SMCNTRPMF,
>> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
>> +DECLARE_CSR(minstretcfg, CSR_MINSTRETCFG, CSR_CLASS_SMCNTRPMF,
>> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
>> +DECLARE_CSR(mcyclecfgh, CSR_MCYCLECFGH, CSR_CLASS_SMCNTRPMF_32,
>> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
>> +DECLARE_CSR(minstretcfgh, CSR_MINSTRETCFGH, CSR_CLASS_SMCNTRPMF_32,
>> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
>> /* Ssaia extension */
>> DECLARE_CSR(siselect, CSR_SISELECT, CSR_CLASS_SSAIA,
>> PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
>> DECLARE_CSR(sireg, CSR_SIREG, CSR_CLASS_SSAIA, PRIV_SPEC_CLASS_NONE,
>> PRIV_SPEC_CLASS_NONE)
>> @@ -3926,8 +3934,6 @@ DECLARE_CSR(mibase, CSR_MIBASE, CSR_CLASS_I,
>> PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CL
>> DECLARE_CSR(mibound, CSR_MIBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
>> PRIV_SPEC_CLASS_1P10)
>> DECLARE_CSR(mdbase, CSR_MDBASE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
>> PRIV_SPEC_CLASS_1P10)
>> DECLARE_CSR(mdbound, CSR_MDBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
>> PRIV_SPEC_CLASS_1P10)
>> -DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN, CSR_CLASS_I,
>> PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
>> -DECLARE_CSR(mhcounteren, CSR_MHCOUNTEREN, CSR_CLASS_I,
>> PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
>> DECLARE_CSR(ustatus, CSR_USTATUS, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
>> PRIV_SPEC_CLASS_1P12)
>> DECLARE_CSR(uie, CSR_UIE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
>> PRIV_SPEC_CLASS_1P12)
>> DECLARE_CSR(utvec, CSR_UTVEC, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1,
>> PRIV_SPEC_CLASS_1P12)
>> --
>> 2.25.1
>>
>>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-08-01 7:05 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-07-24 5:24 [PATCH] RISC-V: Add 'Smcntrpmf' extension and its CSRs Jiawei
2023-08-01 4:51 ` Nelson Chu
2023-08-01 6:11 ` Jan Beulich
2023-08-01 7:05 ` Tsukasa OI
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