* [PATCH v4 9/9] Support APX JMPABS for disassembler
@ 2023-12-07 9:01 Cui, Lili
2023-12-11 13:03 ` Jan Beulich
0 siblings, 1 reply; 6+ messages in thread
From: Cui, Lili @ 2023-12-07 9:01 UTC (permalink / raw)
To: hongjiu.lu; +Cc: binutils, jbeulich, Hu, Lin1
From: "Hu, Lin1" <lin1.hu@intel.com>
gas/ChangeLog:
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs-inval.d: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs-inval.s: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs.d: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (JMPABS_Fixup): New Fixup function to disassemble jmpabs.
(print_insn): Add #UD exception for jmpabs.
(dis386): Modify a1 unit for support jmpabs.
* i386-mnem.h: Regenerated.
* i386-opc.tbl: New insns.
* i386-tbl.h: Regenerated.
---
.../gas/i386/x86-64-apx-jmpabs-intel.d | 11 +++++
.../gas/i386/x86-64-apx-jmpabs-inval.d | 40 ++++++++++++++++++
.../gas/i386/x86-64-apx-jmpabs-inval.s | 15 +++++++
gas/testsuite/gas/i386/x86-64-apx-jmpabs.d | 11 +++++
gas/testsuite/gas/i386/x86-64-apx-jmpabs.s | 5 +++
gas/testsuite/gas/i386/x86-64.exp | 3 ++
opcodes/i386-dis.c | 41 +++++++++++++++++--
7 files changed, 123 insertions(+), 3 deletions(-)
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
new file mode 100644
index 00000000000..8c229315904
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
@@ -0,0 +1,11 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 APX_F JMPABS insns (Intel disassembly)
+#source: x86-64-apx-jmpabs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs 0x2
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
new file mode 100644
index 00000000000..c3dc0b0ad79
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
@@ -0,0 +1,40 @@
+#as: --64
+#objdump: -dw
+#name: illegal decoding of APX_F jmpabs insns
+#source: x86-64-apx-jmpabs-inval.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <.text>:
+\s*[a-f0-9]+: 66 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 67 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: f2 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: f3 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: f0 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: d5 08 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*...
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
new file mode 100644
index 00000000000..de4440a5466
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
@@ -0,0 +1,15 @@
+# Check bytecode of APX_F jmpabs instructions with illegal encode.
+
+ .text
+# With 66 prefix
+ .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With 67 prefix
+ .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With F2 prefix
+ .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With F3 prefix
+ .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With LOCK prefix
+ .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# REX2.M0 = 0 REX2.W = 1
+ .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
new file mode 100644
index 00000000000..f2dbd617527
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
@@ -0,0 +1,11 @@
+#as:
+#objdump: -dw
+#name: x86_64 APX_F JMPABS insns
+#source: x86-64-apx-jmpabs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs \$0x2
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
new file mode 100644
index 00000000000..69ffb763260
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
@@ -0,0 +1,5 @@
+# Check 64bit APX_F JMPABS instructions
+
+ .text
+ _start:
+ .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index d1e25495a81..74433a20e24 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -377,6 +377,9 @@ run_dump_test "x86-64-apx-evex-promoted"
run_dump_test "x86-64-apx-evex-promoted-intel"
run_dump_test "x86-64-apx-evex-egpr"
run_dump_test "x86-64-apx-ndd"
+run_dump_test "x86-64-apx-jmpabs"
+run_dump_test "x86-64-apx-jmpabs-intel"
+run_dump_test "x86-64-apx-jmpabs-inval"
run_dump_test "x86-64-avx512f-rcigrz-intel"
run_dump_test "x86-64-avx512f-rcigrz"
run_dump_test "x86-64-clwb"
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index db974de21a1..fa242c4dff5 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -106,6 +106,7 @@ static bool MOVSXD_Fixup (instr_info *, int, int);
static bool DistinctDest_Fixup (instr_info *, int, int);
static bool PREFETCHI_Fixup (instr_info *, int, int);
static bool PUSH2_POP2_Fixup (instr_info *, int, int);
+static bool JMPABS_Fixup (instr_info *, int, int);
static void ATTRIBUTE_PRINTF_3 i386_dis_printf (const disassemble_info *,
enum disassembler_style,
@@ -2024,7 +2025,7 @@ static const struct dis386 dis386[] = {
{ "lahf", { XX }, 0 },
/* a0 */
{ "mov%LB", { AL, Ob }, PREFIX_REX2_ILLEGAL },
- { "mov%LS", { eAX, Ov }, PREFIX_REX2_ILLEGAL },
+ { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, PREFIX_REX2_ILLEGAL },
{ "mov%LB", { Ob, AL }, PREFIX_REX2_ILLEGAL },
{ "mov%LS", { Ov, eAX }, PREFIX_REX2_ILLEGAL },
{ "movs{b|}", { Ybr, Xb }, PREFIX_REX2_ILLEGAL },
@@ -9692,7 +9693,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
}
if ((dp->prefix_requirement & PREFIX_REX2_ILLEGAL)
- && ins.last_rex2_prefix >= 0)
+ && ins.last_rex2_prefix >= 0 && (ins.rex2 & REX2_SPECIAL) == 0)
{
i386_dis_printf (info, dis_style_text, "(bad)");
ret = ins.end_codep - priv.the_buffer;
@@ -9777,7 +9778,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
ins.all_prefixes[ins.last_rex_prefix] = 0;
/* Check if the REX2 prefix is used. */
- if (ins.last_rex2_prefix >= 0 && (ins.rex2 & 7))
+ if (ins.last_rex2_prefix >= 0 && (ins.rex2 & (7 | REX2_SPECIAL)))
ins.all_prefixes[ins.last_rex2_prefix] = 0;
/* Check if the SEG prefix is used. */
@@ -13933,3 +13934,37 @@ PUSH2_POP2_Fixup (instr_info *ins, int bytemode, int sizeflag)
return OP_VEX (ins, bytemode, sizeflag);
}
+
+static bool
+JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag)
+{
+ if (ins->address_mode == mode_64bit
+ && ins->last_rex2_prefix >= 0
+ && (ins->rex2 & 0x80) == 0x0)
+ {
+ uint64_t op;
+
+ if (bytemode == eAX_reg)
+ return true;
+
+ if (!get64 (ins, &op))
+ return false;
+
+ if ((ins->prefixes & (PREFIX_OPCODE | PREFIX_ADDR | PREFIX_LOCK)) != 0x0
+ || (ins->rex & REX_W) != 0x0)
+ {
+ oappend (ins, "(bad)");
+ return true;
+ }
+
+ ins->mnemonicendp = stpcpy (ins->obuf, "jmpabs");
+ ins->rex2 |= REX2_SPECIAL;
+ oappend_immediate (ins, op);
+
+ return true;
+ }
+
+ if (bytemode == eAX_reg)
+ return OP_IMREG (ins, bytemode, sizeflag);
+ return OP_OFF64 (ins, bytemode, sizeflag);
+}
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 9/9] Support APX JMPABS for disassembler
2023-12-07 9:01 [PATCH v4 9/9] Support APX JMPABS for disassembler Cui, Lili
@ 2023-12-11 13:03 ` Jan Beulich
2023-12-12 7:10 ` Hu, Lin1
0 siblings, 1 reply; 6+ messages in thread
From: Jan Beulich @ 2023-12-11 13:03 UTC (permalink / raw)
To: Cui, Lili, Hu, Lin1; +Cc: binutils, hongjiu.lu
On 07.12.2023 10:01, Cui, Lili wrote:
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
> @@ -0,0 +1,11 @@
> +#as:
> +#objdump: -dw -Mintel
> +#name: x86_64 APX_F JMPABS insns (Intel disassembly)
> +#source: x86-64-apx-jmpabs.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs 0x2
Missing #pass ?
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
> @@ -0,0 +1,40 @@
> +#as: --64
> +#objdump: -dw
> +#name: illegal decoding of APX_F jmpabs insns
> +#source: x86-64-apx-jmpabs-inval.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <.text>:
> +\s*[a-f0-9]+: 66 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 67 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: f2 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: f3 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: f0 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: d5 08 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*...
The more "canonical" way of expressing this is #pass.
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
> @@ -0,0 +1,15 @@
> +# Check bytecode of APX_F jmpabs instructions with illegal encode.
> +
> + .text
> +# With 66 prefix
> + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
At the example of this, can't this be
.insn {rex2} data16 0xa1, $1{:u64}
I notice though that
.insn {rex} 0xa1, $1{:u64}
presently ignores {rex}, which looks like a bug I ought to fix.
.insn rex 0xa1, $1{:u64}
does work though (and so should {rex2}).
> +# With 67 prefix
> + .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With F2 prefix
> + .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With F3 prefix
> + .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With LOCK prefix
> + .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# REX2.M0 = 0 REX2.W = 1
> + .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Here {rex2} wouldn't be sufficient, so at least partly using .byte is
going to be (largely) unavoidable for the time being.
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
> @@ -0,0 +1,11 @@
> +#as:
> +#objdump: -dw
> +#name: x86_64 APX_F JMPABS insns
> +#source: x86-64-apx-jmpabs.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs \$0x2
Missing #pass again?
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
> @@ -0,0 +1,5 @@
> +# Check 64bit APX_F JMPABS instructions
> +
> + .text
> + _start:
> + .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00
As per above, please use .insn here as well it at all possible.
> @@ -9777,7 +9778,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
> ins.all_prefixes[ins.last_rex_prefix] = 0;
>
> /* Check if the REX2 prefix is used. */
> - if (ins.last_rex2_prefix >= 0 && (ins.rex2 & 7))
> + if (ins.last_rex2_prefix >= 0 && (ins.rex2 & (7 | REX2_SPECIAL)))
> ins.all_prefixes[ins.last_rex2_prefix] = 0;
Seeing that REX2_SPECIAL isn't introduced here, doesn't this belong in the
PUSHP/POPP patch then?
> @@ -13933,3 +13934,37 @@ PUSH2_POP2_Fixup (instr_info *ins, int bytemode, int sizeflag)
>
> return OP_VEX (ins, bytemode, sizeflag);
> }
> +
> +static bool
> +JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag)
> +{
> + if (ins->address_mode == mode_64bit
I think I had asked before already: Is this really needed when ...
> + && ins->last_rex2_prefix >= 0
... this can be non-negative only in 64-bit mode anyway?
> + && (ins->rex2 & 0x80) == 0x0)
What is 0x80? DYM the respective equivalent #define for the opcode
map bit (which ought to be 0x8 aiui)?
Further on what basis was the split determined between the conditions
here and ...
> + {
> + uint64_t op;
> +
> + if (bytemode == eAX_reg)
> + return true;
> +
> + if (!get64 (ins, &op))
> + return false;
> +
> + if ((ins->prefixes & (PREFIX_OPCODE | PREFIX_ADDR | PREFIX_LOCK)) != 0x0
> + || (ins->rex & REX_W) != 0x0)
... these further ones?
Overall it's a bit sad of course to have only the disassembler side of this,
but well ...
Jan
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v4 9/9] Support APX JMPABS for disassembler
2023-12-11 13:03 ` Jan Beulich
@ 2023-12-12 7:10 ` Hu, Lin1
2023-12-12 9:03 ` Jan Beulich
0 siblings, 1 reply; 6+ messages in thread
From: Hu, Lin1 @ 2023-12-12 7:10 UTC (permalink / raw)
To: Beulich, Jan, Cui, Lili; +Cc: binutils, Lu, Hongjiu
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Monday, December 11, 2023 9:04 PM
> To: Cui, Lili <lili.cui@intel.com>; Hu, Lin1 <lin1.hu@intel.com>
> Cc: binutils@sourceware.org; Lu, Hongjiu <hongjiu.lu@intel.com>
> Subject: Re: [PATCH v4 9/9] Support APX JMPABS for disassembler
>
> On 07.12.2023 10:01, Cui, Lili wrote:
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
> > @@ -0,0 +1,11 @@
> > +#as:
> > +#objdump: -dw -Mintel
> > +#name: x86_64 APX_F JMPABS insns (Intel disassembly)
> > +#source: x86-64-apx-jmpabs.s
> > +
> > +.*: +file format .*
> > +
> > +Disassembly of section \.text:
> > +
> > +0+ <_start>:
> > +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs 0x2
>
> Missing #pass ?
>
Have added #pass in all tests.
>
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
> > @@ -0,0 +1,40 @@
> > +#as: --64
> > +#objdump: -dw
> > +#name: illegal decoding of APX_F jmpabs insns
> > +#source: x86-64-apx-jmpabs-inval.s
> > +
> > +.*: +file format .*
> > +
> > +Disassembly of section \.text:
> > +
> > +0+ <.text>:
> > +\s*[a-f0-9]+: 66 d5 00 a1[ ]+\(bad\)
> > +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 67 d5 00 a1[ ]+\(bad\)
> > +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: f2 d5 00 a1[ ]+\(bad\)
> > +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: f3 d5 00 a1[ ]+\(bad\)
> > +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: f0 d5 00 a1[ ]+\(bad\)
> > +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: d5 08 a1[ ]+\(bad\)
> > +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> > +\s*...
>
> The more "canonical" way of expressing this is #pass.
>
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
> > @@ -0,0 +1,15 @@
> > +# Check bytecode of APX_F jmpabs instructions with illegal encode.
> > +
> > + .text
> > +# With 66 prefix
> > + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>
> At the example of this, can't this be
>
> .insn {rex2} data16 0xa1, $1{:u64}
>
Unfortunately, It's useless, it raised
Error: bad or irreducible absolute expression.
Error: junk at end of line, first unrecognized character is `d'
>
> I notice though that
>
> .insn {rex} 0xa1, $1{:u64}
>
> presently ignores {rex}, which looks like a bug I ought to fix.
>
Indeed, When I change the line like .insn data16 {rex2} 0xa1, $1{:u64}. {rex2} will be ignored too.
>
> .insn rex 0xa1, $1{:u64}
>
> does work though (and so should {rex2}).
>
rex2 raised the same error.
Error: bad or irreducible absolute expression.
Error: junk at end of line, first unrecognized character is `d'
>
> > @@ -9777,7 +9778,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int
> intel_syntax)
> > ins.all_prefixes[ins.last_rex_prefix] = 0;
> >
> > /* Check if the REX2 prefix is used. */
> > - if (ins.last_rex2_prefix >= 0 && (ins.rex2 & 7))
> > + if (ins.last_rex2_prefix >= 0 && (ins.rex2 & (7 | REX2_SPECIAL)))
> > ins.all_prefixes[ins.last_rex2_prefix] = 0;
>
> Seeing that REX2_SPECIAL isn't introduced here, doesn't this belong in the
> PUSHP/POPP patch then?
>
Indeed, I have tell lili.
>
> > @@ -13933,3 +13934,37 @@ PUSH2_POP2_Fixup (instr_info *ins, int
> > bytemode, int sizeflag)
> >
> > return OP_VEX (ins, bytemode, sizeflag); }
> > +
> > +static bool
> > +JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag) {
> > + if (ins->address_mode == mode_64bit
>
> I think I had asked before already: Is this really needed when ...
>
> > + && ins->last_rex2_prefix >= 0
>
> ... this can be non-negative only in 64-bit mode anyway?
>
I've tried it and it doesn't seem to be needed, it (ins->address_mode == mode_64bit) has been removed.
>
> > + && (ins->rex2 & 0x80) == 0x0)
>
> What is 0x80? DYM the respective equivalent #define for the opcode map bit
> (which ought to be 0x8 aiui)?
>
0x80 is corresponding to rex2.M0. 0x8 is corresponding to rex2.W.
>
> Further on what basis was the split determined between the conditions here
> and ...
>
>
> > + {
> > + uint64_t op;
> > +
> > + if (bytemode == eAX_reg)
> > + return true;
> > +
> > + if (!get64 (ins, &op))
> > + return false;
> > +
> > + if ((ins->prefixes & (PREFIX_OPCODE | PREFIX_ADDR | PREFIX_LOCK)) !=
> 0x0
> > + || (ins->rex & REX_W) != 0x0)
>
> ... these further ones?
>
It does look like they could be put together, I've adjusted the part of code.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index fa242c4dff5..5c32b7b7f0e 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -13938,25 +13938,24 @@ PUSH2_POP2_Fixup (instr_info *ins, int bytemode, int sizeflag)
static bool
JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag)
{
- if (ins->address_mode == mode_64bit
- && ins->last_rex2_prefix >= 0
- && (ins->rex2 & 0x80) == 0x0)
+ if (ins->last_rex2_prefix >= 0)
{
uint64_t op;
- if (bytemode == eAX_reg)
- return true;
-
- if (!get64 (ins, &op))
- return false;
-
if ((ins->prefixes & (PREFIX_OPCODE | PREFIX_ADDR | PREFIX_LOCK)) != 0x0
- || (ins->rex & REX_W) != 0x0)
+ || (ins->rex & REX_W) != 0x0
+ || (ins->rex2 & 0x80) != 0x0)
{
oappend (ins, "(bad)");
return true;
}
+ if (bytemode == eAX_reg)
+ return true;
+
+ if (!get64 (ins, &op))
+ return false;
+
ins->mnemonicendp = stpcpy (ins->obuf, "jmpabs");
ins->rex2 |= REX2_SPECIAL;
oappend_immediate (ins, op);
>
> Overall it's a bit sad of course to have only the disassembler side of this, but
> well ...
>
The assembler side may be supported until glibc can support jmpabs label.
BRs,
Lin
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 9/9] Support APX JMPABS for disassembler
2023-12-12 7:10 ` Hu, Lin1
@ 2023-12-12 9:03 ` Jan Beulich
2023-12-13 8:44 ` Hu, Lin1
0 siblings, 1 reply; 6+ messages in thread
From: Jan Beulich @ 2023-12-12 9:03 UTC (permalink / raw)
To: Hu, Lin1; +Cc: binutils, Lu, Hongjiu, Cui, Lili
On 12.12.2023 08:10, Hu, Lin1 wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Monday, December 11, 2023 9:04 PM
>>
>> On 07.12.2023 10:01, Cui, Lili wrote:
>>> --- /dev/null
>>> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
>>> @@ -0,0 +1,15 @@
>>> +# Check bytecode of APX_F jmpabs instructions with illegal encode.
>>> +
>>> + .text
>>> +# With 66 prefix
>>> + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>>
>> At the example of this, can't this be
>>
>> .insn {rex2} data16 0xa1, $1{:u64}
>>
>
> Unfortunately, It's useless, it raised
>
> Error: bad or irreducible absolute expression.
> Error: junk at end of line, first unrecognized character is `d'
Hmm, but parse_insn() ought to be capable of parsing "{rex2} data16 ..."
with the patch in place which introduces {rex2}. Considering that gas 2.41
processes
.insn {rex} data16 0xa1, $1{:u64}
quite fine, I can't see how you would end up with parsing failing at 'd'
(i.e. "data16").
>> I notice though that
>>
>> .insn {rex} 0xa1, $1{:u64}
>>
>> presently ignores {rex}, which looks like a bug I ought to fix.
>>
>
> Indeed, When I change the line like .insn data16 {rex2} 0xa1, $1{:u64}. {rex2} will be ignored too.
>
>>
>> .insn rex 0xa1, $1{:u64}
>>
>> does work though (and so should {rex2}).
>>
>
> rex2 raised the same error.
>
> Error: bad or irreducible absolute expression.
> Error: junk at end of line, first unrecognized character is `d'
That's for
.insn rex2 data16 0xa1, $1{:u64}
? If so, then yes, of course: There's no rex2 prefix so far, you're only
introducing {rex2}.
>>> + && (ins->rex2 & 0x80) == 0x0)
>>
>> What is 0x80? DYM the respective equivalent #define for the opcode map bit
>> (which ought to be 0x8 aiui)?
>
> 0x80 is corresponding to rex2.M0. 0x8 is corresponding to rex2.W.
Of course. But consider how the field is set:
ins->rex2 = rex2_payload >> 4;
Hence why it would be imperative that (a) a #define be introduced and (b)
such a #define be accompanied by a comment explaining why it's 0x8, not
0x80.
A question however is whether you need this check at all. Decoding has
already taken a different route far earlier when REX2.M is set, so aiui
execution wouldn't even make it here in that case. Hence why the
respective test actually works as expected despite the flaw here. (With
that, no new #define is going to be needed, as the code will just
disappear.)
Jan
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v4 9/9] Support APX JMPABS for disassembler
2023-12-12 9:03 ` Jan Beulich
@ 2023-12-13 8:44 ` Hu, Lin1
0 siblings, 0 replies; 6+ messages in thread
From: Hu, Lin1 @ 2023-12-13 8:44 UTC (permalink / raw)
To: Beulich, Jan; +Cc: binutils, Lu, Hongjiu, Cui, Lili
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Tuesday, December 12, 2023 5:04 PM
> To: Hu, Lin1 <lin1.hu@intel.com>
> Cc: binutils@sourceware.org; Lu, Hongjiu <hongjiu.lu@intel.com>; Cui, Lili
> <lili.cui@intel.com>
> Subject: Re: [PATCH v4 9/9] Support APX JMPABS for disassembler
>
> On 12.12.2023 08:10, Hu, Lin1 wrote:
> >> -----Original Message-----
> >> From: Jan Beulich <jbeulich@suse.com>
> >> Sent: Monday, December 11, 2023 9:04 PM
> >>
> >> On 07.12.2023 10:01, Cui, Lili wrote:
> >>> --- /dev/null
> >>> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
> >>> @@ -0,0 +1,15 @@
> >>> +# Check bytecode of APX_F jmpabs instructions with illegal encode.
> >>> +
> >>> + .text
> >>> +# With 66 prefix
> >>> + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> >>
> >> At the example of this, can't this be
> >>
> >> .insn {rex2} data16 0xa1, $1{:u64}
> >>
> >
> > Unfortunately, It's useless, it raised
> >
> > Error: bad or irreducible absolute expression.
> > Error: junk at end of line, first unrecognized character is `d'
>
> Hmm, but parse_insn() ought to be capable of parsing "{rex2} data16 ..."
> with the patch in place which introduces {rex2}. Considering that gas 2.41
> processes
>
> .insn {rex} data16 0xa1, $1{:u64}
>
> quite fine, I can't see how you would end up with parsing failing at 'd'
> (i.e. "data16").
>
I think I typed something wrong before, now the program won't report ERROR, but the encoder generates 00 00, no d5 00. It seems that s_insn don't support {rex2}. Considering how much this whole series has been discussed so far, I intend to use .byte for now until s_insn support rex2.
>
> >>> + && (ins->rex2 & 0x80) == 0x0)
> >>
> >> What is 0x80? DYM the respective equivalent #define for the opcode
> >> map bit (which ought to be 0x8 aiui)?
> >
> > 0x80 is corresponding to rex2.M0. 0x8 is corresponding to rex2.W.
>
> Of course. But consider how the field is set:
>
> ins->rex2 = rex2_payload >> 4;
>
> Hence why it would be imperative that (a) a #define be introduced and (b) such a
> #define be accompanied by a comment explaining why it's 0x8, not 0x80.
>
> A question however is whether you need this check at all. Decoding has already
> taken a different route far earlier when REX2.M is set, so aiui execution wouldn't
> even make it here in that case. Hence why the respective test actually works as
> expected despite the flaw here. (With that, no new #define is going to be
> needed, as the code will just
> disappear.)
>
OK, It's the first time I know. When REX2.M is set, objdump will use a different table, thanks. I have removed the line.
BRs,
Lin
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4 9/9] Support APX JMPABS for disassembler
2023-12-19 12:12 [PATCH v4 0/9] Support Intel APX EGPR Cui, Lili
@ 2023-12-19 12:12 ` Cui, Lili
0 siblings, 0 replies; 6+ messages in thread
From: Cui, Lili @ 2023-12-19 12:12 UTC (permalink / raw)
To: binutils; +Cc: hongjiu.lu, jbeulich, Hu, Lin1
From: "Hu, Lin1" <lin1.hu@intel.com>
gas/ChangeLog:
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs-inval.d: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs-inval.s: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs.d: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (JMPABS_Fixup): New Fixup function to disassemble jmpabs.
(print_insn): Add #UD exception for jmpabs.
(dis386): Modify a1 unit for support jmpabs.
* i386-mnem.h: Regenerated.
* i386-opc.tbl: New insns.
* i386-tbl.h: Regenerated.
---
.../gas/i386/x86-64-apx-jmpabs-intel.d | 12 ++++++
.../gas/i386/x86-64-apx-jmpabs-inval.d | 40 +++++++++++++++++++
.../gas/i386/x86-64-apx-jmpabs-inval.s | 15 +++++++
gas/testsuite/gas/i386/x86-64-apx-jmpabs.d | 12 ++++++
gas/testsuite/gas/i386/x86-64-apx-jmpabs.s | 5 +++
gas/testsuite/gas/i386/x86-64.exp | 3 ++
opcodes/i386-dis.c | 37 ++++++++++++++++-
7 files changed, 122 insertions(+), 2 deletions(-)
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
new file mode 100644
index 00000000000..2b87f95532f
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
@@ -0,0 +1,12 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 APX_F JMPABS insns (Intel disassembly)
+#source: x86-64-apx-jmpabs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs 0x2
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
new file mode 100644
index 00000000000..86f313f0873
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
@@ -0,0 +1,40 @@
+#as: --64
+#objdump: -dw
+#name: illegal decoding of APX_F jmpabs insns
+#source: x86-64-apx-jmpabs-inval.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <.text>:
+\s*[a-f0-9]+: 66 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 67 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: f2 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: f3 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: f0 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: d5 08 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
new file mode 100644
index 00000000000..de4440a5466
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
@@ -0,0 +1,15 @@
+# Check bytecode of APX_F jmpabs instructions with illegal encode.
+
+ .text
+# With 66 prefix
+ .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With 67 prefix
+ .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With F2 prefix
+ .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With F3 prefix
+ .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With LOCK prefix
+ .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# REX2.M0 = 0 REX2.W = 1
+ .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
new file mode 100644
index 00000000000..e95b54f5dab
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
@@ -0,0 +1,12 @@
+#as:
+#objdump: -dw
+#name: x86_64 APX_F JMPABS insns
+#source: x86-64-apx-jmpabs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs \$0x2
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
new file mode 100644
index 00000000000..69ffb763260
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
@@ -0,0 +1,5 @@
+# Check 64bit APX_F JMPABS instructions
+
+ .text
+ _start:
+ .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index 5d81f89bdef..dbef4efb83c 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -377,6 +377,9 @@ run_dump_test "x86-64-apx-evex-promoted"
run_dump_test "x86-64-apx-evex-promoted-intel"
run_dump_test "x86-64-apx-evex-egpr"
run_dump_test "x86-64-apx-ndd"
+run_dump_test "x86-64-apx-jmpabs"
+run_dump_test "x86-64-apx-jmpabs-intel"
+run_dump_test "x86-64-apx-jmpabs-inval"
run_dump_test "x86-64-avx512f-rcigrz-intel"
run_dump_test "x86-64-avx512f-rcigrz"
run_dump_test "x86-64-clwb"
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index b9fd010062a..abbe0724616 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -106,6 +106,7 @@ static bool MOVSXD_Fixup (instr_info *, int, int);
static bool DistinctDest_Fixup (instr_info *, int, int);
static bool PREFETCHI_Fixup (instr_info *, int, int);
static bool PUSH2_POP2_Fixup (instr_info *, int, int);
+static bool JMPABS_Fixup (instr_info *, int, int);
static void ATTRIBUTE_PRINTF_3 i386_dis_printf (const disassemble_info *,
enum disassembler_style,
@@ -2025,7 +2026,7 @@ static const struct dis386 dis386[] = {
{ "lahf", { XX }, 0 },
/* a0 */
{ "mov%LB", { AL, Ob }, PREFIX_REX2_ILLEGAL },
- { "mov%LS", { eAX, Ov }, PREFIX_REX2_ILLEGAL },
+ { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, PREFIX_REX2_ILLEGAL },
{ "mov%LB", { Ob, AL }, PREFIX_REX2_ILLEGAL },
{ "mov%LS", { Ov, eAX }, PREFIX_REX2_ILLEGAL },
{ "movs{b|}", { Ybr, Xb }, PREFIX_REX2_ILLEGAL },
@@ -9706,7 +9707,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
}
if ((dp->prefix_requirement & PREFIX_REX2_ILLEGAL)
- && ins.last_rex2_prefix >= 0)
+ && ins.last_rex2_prefix >= 0 && (ins.rex2 & REX2_SPECIAL) == 0)
{
i386_dis_printf (info, dis_style_text, "(bad)");
ret = ins.end_codep - priv.the_buffer;
@@ -13949,3 +13950,35 @@ PUSH2_POP2_Fixup (instr_info *ins, int bytemode, int sizeflag)
return OP_VEX (ins, bytemode, sizeflag);
}
+
+static bool
+JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag)
+{
+ if (ins->last_rex2_prefix >= 0)
+ {
+ uint64_t op;
+
+ if ((ins->prefixes & (PREFIX_OPCODE | PREFIX_ADDR | PREFIX_LOCK)) != 0x0
+ || (ins->rex & REX_W) != 0x0)
+ {
+ oappend (ins, "(bad)");
+ return true;
+ }
+
+ if (bytemode == eAX_reg)
+ return true;
+
+ if (!get64 (ins, &op))
+ return false;
+
+ ins->mnemonicendp = stpcpy (ins->obuf, "jmpabs");
+ ins->rex2 |= REX2_SPECIAL;
+ oappend_immediate (ins, op);
+
+ return true;
+ }
+
+ if (bytemode == eAX_reg)
+ return OP_IMREG (ins, bytemode, sizeflag);
+ return OP_OFF64 (ins, bytemode, sizeflag);
+}
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-12-19 12:13 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-12-07 9:01 [PATCH v4 9/9] Support APX JMPABS for disassembler Cui, Lili
2023-12-11 13:03 ` Jan Beulich
2023-12-12 7:10 ` Hu, Lin1
2023-12-12 9:03 ` Jan Beulich
2023-12-13 8:44 ` Hu, Lin1
2023-12-19 12:12 [PATCH v4 0/9] Support Intel APX EGPR Cui, Lili
2023-12-19 12:12 ` [PATCH v4 9/9] Support APX JMPABS for disassembler Cui, Lili
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