* [PATCH v2 0/7] s390: Optionally print instruction description in disassembly
@ 2023-12-15 14:36 Jens Remus
2023-12-15 14:36 ` [PATCH v2 1/7] s390: Fix build when using EXEEXT_FOR_BUILD Jens Remus
` (8 more replies)
0 siblings, 9 replies; 10+ messages in thread
From: Jens Remus @ 2023-12-15 14:36 UTC (permalink / raw)
To: binutils; +Cc: Jens Remus, Andreas Krebbel, Nick Clifton
With this patch series the s390 disassembler optionally prints the
instruction descriptions as comment in the disassembly. This is enabled
by specifying the new s390-specific disassembler option "insndesc".
Patches 2-5 are preparatory cleanup/enhancement patches that patch 6
builds upon.
Patch 1 is a cleanup in the s390-mkopc build, that I stumbled upon.
New: Patch 2 is a cleanup of the letter case of instruction
descriptions as preparation for patch 6.
New: Patch 3 provides the IBM z16 instruction descriptions as
preparation for patch 6.
New: Patch 4 enhances the error handling in s390-mkopc.
New: Patch 5 is a general cleanup to use strncpy() and snprintf()
instead of strcpy() and strcat() and to use length macros for strings
in s390-mkopc.
Updated: Patch 6 (formerly 2) allows to optionally print the instruction
descriptions as comments using the s390-specific disassembler option
"insndesc". It now uses strncpy() instead of strcpy() as well as a
length macro for the instruction description string.
New: Patch 7 suffixes the instruction descriptions of conditional branch
extended mnemonics with their condition (e.g. "on A high"). This
complements patch 6.
Example output:
$ objdump -d -M insndesc test
...
0000000000000620 <deregister_tm_clones>:
620: c0 10 00 00 0d 5c larl %r1,20d8 <__TMC_END__> # load address relative long
626: c0 20 00 00 0d 59 larl %r2,20d8 <__TMC_END__> # load address relative long
62c: ec 12 00 0a 80 64 cgrje %r1,%r2,640 <deregister_tm_clones+0x20> # compare and branch relative (64) on A equal B
632: c4 18 00 00 0c d7 lgrl %r1,1fe0 <_ITM_deregisterTMCloneTable@Base> # load relative long (64)
638: ec 18 00 04 00 7c cgije %r1,0,640 <deregister_tm_clones+0x20> # compare immediate and branch relative (64<8) on A equal B
63e: 07 f1 br %r1 # unconditional branch
640: 07 fe br %r14 # unconditional branch
Note that the readability can be enhanced by using a filter such as "expand":
$ objdump -d -M insndesc test | expand -t 8,16,24,32,40,80
...
0000000000000620 <deregister_tm_clones>:
620: c0 10 00 00 0d 5c larl %r1,20d8 <__TMC_END__> # load address relative long
626: c0 20 00 00 0d 59 larl %r2,20d8 <__TMC_END__> # load address relative long
62c: ec 12 00 0a 80 64 cgrje %r1,%r2,640 <deregister_tm_clones+0x20> # compare and branch relative (64) on A equal B
632: c4 18 00 00 0c d7 lgrl %r1,1fe0 <_ITM_deregisterTMCloneTable@Base> # load relative long (64)
638: ec 18 00 04 00 7c cgije %r1,0,640 <deregister_tm_clones+0x20> # compare immediate and branch relative (64<8) on A equal B
63e: 07 f1 br %r1 # unconditional branch
640: 07 fe br %r14 # unconditional branch
Regards,
Jens
Jens Remus (7):
s390: Fix build when using EXEEXT_FOR_BUILD
s390: Align letter case of instruction descriptions
s390: Provide IBM z16 (arch14) instruction descriptions
s390: Enhance error handling in s390-mkopc
s390: Use safe string functions and length macros in s390-mkopc
s390: Optionally print instruction description in disassembly
s390: Add suffix to conditional branch instruction descriptions
binutils/NEWS | 5 +
gas/testsuite/gas/s390/s390.exp | 1 +
gas/testsuite/gas/s390/zarch-insndesc.d | 19 ++
gas/testsuite/gas/s390/zarch-insndesc.s | 12 ++
include/opcode/s390.h | 5 +-
opcodes/Makefile.am | 7 +-
opcodes/Makefile.in | 7 +-
opcodes/s390-dis.c | 13 +-
opcodes/s390-mkopc.c | 219 +++++++++++++++---------
opcodes/s390-opc.c | 62 +++----
opcodes/s390-opc.txt | 98 ++++++-----
11 files changed, 289 insertions(+), 159 deletions(-)
create mode 100644 gas/testsuite/gas/s390/zarch-insndesc.d
create mode 100644 gas/testsuite/gas/s390/zarch-insndesc.s
--
2.40.1
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v2 1/7] s390: Fix build when using EXEEXT_FOR_BUILD 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus @ 2023-12-15 14:36 ` Jens Remus 2023-12-15 14:36 ` [PATCH v2 2/7] s390: Align letter case of instruction descriptions Jens Remus ` (7 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Jens Remus @ 2023-12-15 14:36 UTC (permalink / raw) To: binutils; +Cc: Jens Remus, Andreas Krebbel, Nick Clifton Suffix the s390-mkopc build utility executable file name with EXEEXT_FOR_BUILD. Otherwise it cannot be located when building with EXEEXT_FOR_BUILD. Use pattern used for other architecture build utilities and compile and link s390-mkopc in two steps. While at it also specify the dependencies of s390-mkopc.c. opcodes/ * Makefile.am: Add target to build s390-mkopc.o. Correct target to build s390-mkopc$(EXEEXT_FOR_BUILD). * Makefile.in: Regenerate. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> --- opcodes/Makefile.am | 7 +++++-- opcodes/Makefile.in | 7 +++++-- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index 5804dd1ab38..ea264989509 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -570,8 +570,11 @@ opc2c$(EXEEXT_FOR_BUILD): opc2c.o $(BUILD_LIBS_DEPS) opc2c.o: opc2c.c $(INCDIR)/libiberty.h $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $(srcdir)/opc2c.c -s390-mkopc$(EXEEXT_FOR_BUILD): s390-mkopc.c - $(AM_V_CCLD)$(COMPILE_FOR_BUILD) -o s390-mkopc $(srcdir)/s390-mkopc.c +s390-mkopc$(EXEEXT_FOR_BUILD): s390-mkopc.o + $(AM_V_CCLD)$(LINK_FOR_BUILD) s390-mkopc.o + +s390-mkopc.o: s390-mkopc.c $(INCDIR)/opcode/s390.h + $(COMPILE_FOR_BUILD) -c $(srcdir)/s390-mkopc.c s390-opc.tab: s390-mkopc$(EXEEXT_FOR_BUILD) s390-opc.txt $(AM_V_GEN)./s390-mkopc$(EXEEXT_FOR_BUILD) < $(srcdir)/s390-opc.txt > s390-opc.tab diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index e2c6e5a4374..7586b54fbd8 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -1548,8 +1548,11 @@ opc2c$(EXEEXT_FOR_BUILD): opc2c.o $(BUILD_LIBS_DEPS) opc2c.o: opc2c.c $(INCDIR)/libiberty.h $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $(srcdir)/opc2c.c -s390-mkopc$(EXEEXT_FOR_BUILD): s390-mkopc.c - $(AM_V_CCLD)$(COMPILE_FOR_BUILD) -o s390-mkopc $(srcdir)/s390-mkopc.c +s390-mkopc$(EXEEXT_FOR_BUILD): s390-mkopc.o + $(AM_V_CCLD)$(LINK_FOR_BUILD) s390-mkopc.o + +s390-mkopc.o: s390-mkopc.c $(INCDIR)/opcode/s390.h + $(COMPILE_FOR_BUILD) -c $(srcdir)/s390-mkopc.c s390-opc.tab: s390-mkopc$(EXEEXT_FOR_BUILD) s390-opc.txt $(AM_V_GEN)./s390-mkopc$(EXEEXT_FOR_BUILD) < $(srcdir)/s390-opc.txt > s390-opc.tab -- 2.40.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 2/7] s390: Align letter case of instruction descriptions 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus 2023-12-15 14:36 ` [PATCH v2 1/7] s390: Fix build when using EXEEXT_FOR_BUILD Jens Remus @ 2023-12-15 14:36 ` Jens Remus 2023-12-15 14:36 ` [PATCH v2 3/7] s390: Provide IBM z16 (arch14) " Jens Remus ` (6 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Jens Remus @ 2023-12-15 14:36 UTC (permalink / raw) To: binutils; +Cc: Jens Remus, Andreas Krebbel, Nick Clifton Change the bitwise operations names "and" and "or" to lower case. Change the register name abbreviations "FPR", "GR", and "VR" to upper case. opcodes/ * s390-opc.txt: Align letter case of instruction descriptions. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> --- opcodes/s390-opc.txt | 42 +++++++++++++++++++++--------------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt index 0fd04ee2770..ef4ef9dc517 100644 --- a/opcodes/s390-opc.txt +++ b/opcodes/s390-opc.txt @@ -144,14 +144,14 @@ d3 mvz SS_L0RDRD "move zones" g5 esa,zarch 67 mxd RX_FERRD "multiply (long to ext.)" g5 esa,zarch 27 mxdr RR_FEF "multiply (long to ext.)" g5 esa,zarch 26 mxr RR_FEFE "multiply (ext.)" g5 esa,zarch -54 n RX_RRRD "AND" g5 esa,zarch -d4 nc SS_L0RDRD "AND" g5 esa,zarch -94 ni SI_URD "AND" g5 esa,zarch -14 nr RR_RR "AND" g5 esa,zarch -56 o RX_RRRD "OR" g5 esa,zarch -d6 oc SS_L0RDRD "OR" g5 esa,zarch -96 oi SI_URD "OR" g5 esa,zarch -16 or RR_RR "OR" g5 esa,zarch +54 n RX_RRRD "and" g5 esa,zarch +d4 nc SS_L0RDRD "and" g5 esa,zarch +94 ni SI_URD "and" g5 esa,zarch +14 nr RR_RR "and" g5 esa,zarch +56 o RX_RRRD "or" g5 esa,zarch +d6 oc SS_L0RDRD "or" g5 esa,zarch +96 oi SI_URD "or" g5 esa,zarch +16 or RR_RR "or" g5 esa,zarch f2 pack SS_LLRDRD "pack" g5 esa,zarch b248 palb RRE_00 "purge ALB" g5 esa,zarch b218 pc S_RD "program call" g5 esa,zarch @@ -215,8 +215,8 @@ b6 stctl RS_CCRD "store control" g5 esa,zarch 40 sth RX_RRRD "store halfword" g5 esa,zarch b202 stidp S_RD "store CPU id" g5 esa,zarch 90 stm RS_RRRD "store multiple" g5 esa,zarch -ac stnsm SI_URD "store then AND system mask" g5 esa,zarch -ad stosm SI_URD "store then OR system mask" g5 esa,zarch +ac stnsm SI_URD "store then and system mask" g5 esa,zarch +ad stosm SI_URD "store then or system mask" g5 esa,zarch b209 stpt S_RD "store CPU timer" g5 esa,zarch b211 stpx S_RD "store prefix" g5 esa,zarch b234 stsch S_RD "store subchannel" g5 esa,zarch @@ -239,10 +239,10 @@ dd trt SS_L0RDRD "translate and test" g5 esa,zarch b235 tsch S_RD "test subchannel" g5 esa,zarch f3 unpk SS_LLRDRD "unpack" g5 esa,zarch 0102 upt E "update tree" g5 esa,zarch -57 x RX_RRRD "exclusive OR" g5 esa,zarch -d7 xc SS_L0RDRD "exclusive OR" g5 esa,zarch -97 xi SI_URD "exclusive OR" g5 esa,zarch -17 xr RR_RR "exclusive OR" g5 esa,zarch +57 x RX_RRRD "exclusive or" g5 esa,zarch +d7 xc SS_L0RDRD "exclusive or" g5 esa,zarch +97 xi SI_URD "exclusive or" g5 esa,zarch +17 xr RR_RR "exclusive or" g5 esa,zarch f8 zap SS_LLRDRD "zero and add" g5 esa,zarch a70a ahi RI_RI "add halfword immediate" g5 esa,zarch 84 brxh RSI_RRP "branch relative on index high" g5 esa,zarch condjump @@ -821,8 +821,8 @@ b370 lpdfr RRE_FF "load positive no cc" z9-ec zarch b371 lndfr RRE_FF "load negative no cc" z9-ec zarch b372 cpsdr RRF_F0FF2 "copy sign" z9-ec zarch b373 lcdfr RRE_FF "load complement no cc" z9-ec zarch -b3c1 ldgr RRE_FR "load fpr from gr" z9-ec zarch -b3cd lgdr RRE_RF "load gr from fpr" z9-ec zarch +b3c1 ldgr RRE_FR "load FPR from GR" z9-ec zarch +b3cd lgdr RRE_RF "load GR from FPR" z9-ec zarch b3d2 adtr RRR_F0FF "add long dfp" z9-ec zarch b3da axtr RRR_FE0FEFE "add extended dfp" z9-ec zarch b3e4 cdtr RRE_FF "compare long dfp" z9-ec zarch @@ -1203,11 +1203,11 @@ e70000000040 vleib VRI_V0IU "vector load byte element immediate" z13 zarch vx e70000000041 vleih VRI_V0IU "vector load halfword element immediate" z13 zarch vx e70000000043 vleif VRI_V0IU "vector load word element immediate" z13 zarch vx e70000000042 vleig VRI_V0IU "vector load double word element immediate" z13 zarch vx -e70000000021 vlgv VRS_RVRDU "vector load gr from vr element" z13 zarch vx -e70000000021 vlgvb VRS_RVRD "vector load gr from vr byte element" z13 zarch vx -e70000001021 vlgvh VRS_RVRD "vector load gr from vr halfword element" z13 zarch vx -e70000002021 vlgvf VRS_RVRD "vector load gr from vr word element" z13 zarch vx -e70000003021 vlgvg VRS_RVRD "vector load gr from vr double word element" z13 zarch vx +e70000000021 vlgv VRS_RVRDU "vector load GR from VR element" z13 zarch vx +e70000000021 vlgvb VRS_RVRD "vector load GR from VR byte element" z13 zarch vx +e70000001021 vlgvh VRS_RVRD "vector load GR from VR halfword element" z13 zarch vx +e70000002021 vlgvf VRS_RVRD "vector load GR from VR word element" z13 zarch vx +e70000003021 vlgvg VRS_RVRD "vector load GR from VR double word element" z13 zarch vx e70000000004 vllez VRX_VRRDU "vector load logical element and zero" z13 zarch vx e70000000004 vllezb VRX_VRRD "vector load logical byte element and zero" z13 zarch vx e70000001004 vllezh VRX_VRRD "vector load logical halfword element and zero" z13 zarch vx -- 2.40.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 3/7] s390: Provide IBM z16 (arch14) instruction descriptions 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus 2023-12-15 14:36 ` [PATCH v2 1/7] s390: Fix build when using EXEEXT_FOR_BUILD Jens Remus 2023-12-15 14:36 ` [PATCH v2 2/7] s390: Align letter case of instruction descriptions Jens Remus @ 2023-12-15 14:36 ` Jens Remus 2023-12-15 14:36 ` [PATCH v2 4/7] s390: Enhance error handling in s390-mkopc Jens Remus ` (5 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Jens Remus @ 2023-12-15 14:36 UTC (permalink / raw) To: binutils; +Cc: Jens Remus, Andreas Krebbel, Nick Clifton Provide descriptions for instructions introduced with commit ba2b480f103 ("IBM Z: Implement instruction set extensions"). This complements commit 69341966def ("IBM zSystems: Add support for z16 as CPU name."). Use instruction names from IBM z/Architecture Principles of Operation [1] as instruction description. [1]: IBM z/Architecture Principles of Operation, SA22-7832-13, IBM z16, https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf opcodes/ * s390-opc.txt: Add descriptions for IBM z16 (arch14) instructions. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> --- opcodes/s390-opc.txt | 66 +++++++++++++++++++++++++------------------- 1 file changed, 38 insertions(+), 28 deletions(-) diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt index ef4ef9dc517..a3117eeebc5 100644 --- a/opcodes/s390-opc.txt +++ b/opcodes/s390-opc.txt @@ -2034,31 +2034,41 @@ e60000000052 vcvbg VRR_RV0UU "vector convert to binary 64 bit" arch13 zarch optp b93a kdsa RRE_RR "compute digital signature authentication" arch13 zarch -# arch14 instructions - -e60000000074 vschp VRR_VVV0U0U " " arch14 zarch -e60000002074 vschsp VRR_VVV0U0 " " arch14 zarch -e60000003074 vschdp VRR_VVV0U0 " " arch14 zarch -e60000004074 vschxp VRR_VVV0U0 " " arch14 zarch -e6000000007c vscshp VRR_VVV " " arch14 zarch -e6000000007d vcsph VRR_VVV0U0 " " arch14 zarch -e60000000051 vclzdp VRR_VV0U2 " " arch14 zarch -e60000000070 vpkzr VRI_VVV0UU2 " " arch14 zarch -e60000000072 vsrpr VRI_VVV0UU2 " " arch14 zarch -e60000000054 vupkzh VRR_VV0U2 " " arch14 zarch -e6000000005c vupkzl VRR_VV0U2 " " arch14 zarch - -b93b nnpa RRE_00 " " arch14 zarch -e60000000056 vclfnh VRR_VV0UU2 " " arch14 zarch -e6000000005e vclfnl VRR_VV0UU2 " " arch14 zarch -e60000000075 vcrnf VRR_VVV0UU " " arch14 zarch -e6000000005d vcfn VRR_VV0UU2 " " arch14 zarch -e60000000055 vcnf VRR_VV0UU2 " " arch14 zarch - -b98B rdp RRF_RURR2 " " arch14 zarch optparm - -eb0000000071 lpswey SIY_RD " " arch14 zarch -b200 lbear S_RD " " arch14 zarch -b201 stbear S_RD " " arch14 zarch - -b28f qpaci S_RD " " arch14 zarch +# arch14 (z16) instructions + +# Vector-Packed-Decimal-Enhancement Facility 2 + +e60000000074 vschp VRR_VVV0U0U "decimal scale and convert to hfp" arch14 zarch +e60000002074 vschsp VRR_VVV0U0 "decimal scale and convert to short hfp" arch14 zarch +e60000003074 vschdp VRR_VVV0U0 "decimal scale and convert to long hfp" arch14 zarch +e60000004074 vschxp VRR_VVV0U0 "decimal scale and convert to extended hfp" arch14 zarch +e6000000007c vscshp VRR_VVV "decimal scale and convert and split to hfp" arch14 zarch +e6000000007d vcsph VRR_VVV0U0 "vector convert hfp to scaled decimal" arch14 zarch +e60000000051 vclzdp VRR_VV0U2 "vector count leading zero digits" arch14 zarch +e60000000070 vpkzr VRI_VVV0UU2 "vector pack zoned register" arch14 zarch +e60000000072 vsrpr VRI_VVV0UU2 "vector shift and round decimal register" arch14 zarch +e60000000054 vupkzh VRR_VV0U2 "vector unpack zoned high" arch14 zarch +e6000000005c vupkzl VRR_VV0U2 "vector unpack zoned low" arch14 zarch + +# Neural-Network-Processing-Assist Facility + +b93b nnpa RRE_00 "neural network processing assist" arch14 zarch +e60000000056 vclfnh VRR_VV0UU2 "vector fp convert and lengthen from nnp high" arch14 zarch +e6000000005e vclfnl VRR_VV0UU2 "vector fp convert and lengthen from nnp low" arch14 zarch +e60000000075 vcrnf VRR_VVV0UU "vector fp convert and round to nnp" arch14 zarch +e6000000005d vcfn VRR_VV0UU2 "vector fp convert from nnp" arch14 zarch +e60000000055 vcnf VRR_VV0UU2 "vector fp convert to nnp" arch14 zarch + +# Reset-DAT-Protection Facility + +b98B rdp RRF_RURR2 "reset dat protection" arch14 zarch optparm + +# BEAR-Enhancement Facility + +eb0000000071 lpswey SIY_RD "load PSW extended" arch14 zarch +b200 lbear S_RD "load bear" arch14 zarch +b201 stbear S_RD "store bear" arch14 zarch + +# Processor-Activity-Instrumentation Facility + +b28f qpaci S_RD "query processor activity counter information" arch14 zarch -- 2.40.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 4/7] s390: Enhance error handling in s390-mkopc 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus ` (2 preceding siblings ...) 2023-12-15 14:36 ` [PATCH v2 3/7] s390: Provide IBM z16 (arch14) " Jens Remus @ 2023-12-15 14:36 ` Jens Remus 2023-12-15 14:36 ` [PATCH v2 5/7] s390: Use safe string functions and length macros " Jens Remus ` (4 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Jens Remus @ 2023-12-15 14:36 UTC (permalink / raw) To: binutils; +Cc: Jens Remus, Andreas Krebbel, Nick Clifton When the s390-mkopc utility detects an error it prints an error message to strerr and either continues processing or exists with a non-zero return code. If it continues without detecting any further error the final return code was zero, potentially hiding the detected error. Introduce a global variable to hold the final return code and initialize it to EXIT_SUCCESS. Introduce a helper function print_error() that prints an error message to stderr and sets the final return code to EXIT_FAILURE. Use it to print all error messages. Return the final return code at the end of the processing. While at it enhance error messages to state more clearly which mnemonic an error was detected for. Also continue processing for cases where subsequent mnemonics can be processed. opcodes/ * s390-mkopc.c: Enhance error handling. Return EXIT_FAILURE in case of an error, otherwise EXIT_SUCCESS. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> --- opcodes/s390-mkopc.c | 49 +++++++++++++++++++++++++++++++------------- 1 file changed, 35 insertions(+), 14 deletions(-) diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c index 5f921ee0628..aad093f18ff 100644 --- a/opcodes/s390-mkopc.c +++ b/opcodes/s390-mkopc.c @@ -21,9 +21,27 @@ #include <stdio.h> #include <stdlib.h> +#include <stdarg.h> #include <string.h> #include "opcode/s390.h" +/* Return code. */ +int return_code = EXIT_SUCCESS; + +/* Helper to print an error message and set the return code. */ +static void __attribute__ ((format (printf, 1, 2))) +print_error (const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + fprintf(stderr, "Error: "); + vfprintf(stderr, fmt, ap); + va_end(ap); + + return_code = EXIT_FAILURE; +} + struct op_struct { char opcode[16]; @@ -223,8 +241,7 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, if (mask_start & 3) { - fprintf (stderr, "Conditional mask not at nibble boundary in: %s\n", - mnemonic); + print_error ("Mnemonic \"%s\": Conditional mask not at nibble boundary\n", mnemonic); return; } @@ -257,7 +274,7 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, return; malformed_mnemonic: - fprintf (stderr, "Malformed mnemonic: %s\n", mnemonic); + print_error ("Malformed mnemonic: %s\n", mnemonic); } static const char file_header[] = @@ -343,8 +360,8 @@ main (void) cpu_string, modes_string, flags_string); if (num_matched != 6 && num_matched != 7) { - fprintf (stderr, "Couldn't scan line %s\n", currentLine); - exit (1); + print_error ("Couldn't scan line %s\n", currentLine); + exit (EXIT_FAILURE); } if (strcmp (cpu_string, "g5") == 0 @@ -385,8 +402,9 @@ main (void) || strcmp (cpu_string, "arch14") == 0) min_cpu = S390_OPCODE_ARCH14; else { - fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string); - exit (1); + print_error ("Mnemonic \"%s\": Couldn't parse CPU string: %s\n", + mnemonic, cpu_string); + goto continue_loop; } str = modes_string; @@ -401,9 +419,9 @@ main (void) mode_bits |= 1 << S390_OPCODE_ZARCH; str += 5; } else { - fprintf (stderr, "Couldn't parse modes string %s\n", - modes_string); - exit (1); + print_error ("Mnemonic \"%s\": Couldn't parse modes string: %s\n", + mnemonic, modes_string); + goto continue_loop; } if (*str == ',') str++; @@ -444,17 +462,20 @@ main (void) flag_bits |= S390_INSTR_FLAGS_CLASS_JUMPSR; str += 6; } else { - fprintf (stderr, "Couldn't parse flags string %s\n", - flags_string); - exit (1); + print_error ("Mnemonic \"%s\": Couldn't parse flags string: %s\n", + mnemonic, flags_string); + goto continue_loop; } if (*str == ',') str++; } while (*str != 0); } insertExpandedMnemonic (opcode, mnemonic, format, min_cpu, mode_bits, flag_bits); + + continue_loop: + ; } dumpTable (); - return 0; + return return_code; } -- 2.40.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 5/7] s390: Use safe string functions and length macros in s390-mkopc 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus ` (3 preceding siblings ...) 2023-12-15 14:36 ` [PATCH v2 4/7] s390: Enhance error handling in s390-mkopc Jens Remus @ 2023-12-15 14:36 ` Jens Remus 2023-12-15 14:36 ` [PATCH v2 6/7] s390: Optionally print instruction description in disassembly Jens Remus ` (3 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Jens Remus @ 2023-12-15 14:36 UTC (permalink / raw) To: binutils; +Cc: Jens Remus, Andreas Krebbel, Nick Clifton Use strncpy() and snprintf() instead of strcpy() and strcat(). Define and use macros for string lengths, such as mnemonic, instruction format, and instruction description. This is a mechanical change, although some buffers have increased in length by one character. This has been confirmed by verifying that the generated opcode/s390-opc.tab is unchanged. opcodes/ * s390-mkopc.c: Use strncpy() and strncat(). Suggested-by: Nick Clifton <nickc@redhat.com> Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> --- opcodes/s390-mkopc.c | 77 ++++++++++++++++++++++++++++++-------------- 1 file changed, 52 insertions(+), 25 deletions(-) diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c index aad093f18ff..eae0397d497 100644 --- a/opcodes/s390-mkopc.c +++ b/opcodes/s390-mkopc.c @@ -25,6 +25,19 @@ #include <string.h> #include "opcode/s390.h" +#define STRINGIFY(x) _STRINGIFY(x) +#define _STRINGIFY(x) #x + +/* Length of strings without terminating '\0' character. */ +#define MAX_OPCODE_LEN 15 +#define MAX_MNEMONIC_LEN 15 +#define MAX_FORMAT_LEN 15 +#define MAX_DESCRIPTION_LEN 79 + +#define MAX_CPU_LEN 15 +#define MAX_MODES_LEN 15 +#define MAX_FLAGS_LEN 79 + /* Return code. */ int return_code = EXIT_SUCCESS; @@ -44,9 +57,9 @@ print_error (const char *fmt, ...) struct op_struct { - char opcode[16]; - char mnemonic[16]; - char format[16]; + char opcode[MAX_OPCODE_LEN + 1]; + char mnemonic[MAX_MNEMONIC_LEN + 1]; + char format[MAX_FORMAT_LEN + 1]; int mode_bits; int min_cpu; int flags; @@ -108,9 +121,12 @@ insertOpcode (char *opcode, char *mnemonic, char *format, break; for (k = no_ops; k > ix; k--) op_array[k] = op_array[k-1]; - strcpy(op_array[ix].opcode, opcode); - strcpy(op_array[ix].mnemonic, mnemonic); - strcpy(op_array[ix].format, format); + strncpy (op_array[ix].opcode, opcode, MAX_OPCODE_LEN); + op_array[ix].opcode[MAX_OPCODE_LEN] = '\0'; + strncpy (op_array[ix].mnemonic, mnemonic, MAX_MNEMONIC_LEN); + op_array[ix].mnemonic[MAX_MNEMONIC_LEN] = '\0'; + strncpy (op_array[ix].format, format, MAX_FORMAT_LEN); + op_array[ix].format[MAX_FORMAT_LEN] = '\0'; op_array[ix].sort_value = sort_value; op_array[ix].no_nibbles = no_nibbles; op_array[ix].min_cpu = min_cpu; @@ -180,9 +196,9 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, int min_cpu, int mode_bits, int flags) { char *tag; - char prefix[15]; - char suffix[15]; - char number[15]; + char prefix[MAX_MNEMONIC_LEN + 1]; + char suffix[MAX_MNEMONIC_LEN + 1]; + char number[MAX_MNEMONIC_LEN + 1]; int mask_start, i = 0, tag_found = 0, reading_number = 0; int number_p = 0, suffix_p = 0, prefix_p = 0; const struct s390_cond_ext_format *ext_table; @@ -263,12 +279,17 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, for (i = 0; i < ext_table_length; i++) { - char new_mnemonic[15]; + char new_mnemonic[MAX_MNEMONIC_LEN + 1]; - strcpy (new_mnemonic, prefix); opcode[mask_start] = ext_table[i].nibble; - strcat (new_mnemonic, ext_table[i].extension); - strcat (new_mnemonic, suffix); + + if (snprintf (new_mnemonic, sizeof (new_mnemonic), "%s%s%s", prefix, + ext_table[i].extension, suffix) >= sizeof (new_mnemonic)) + { + print_error ("Mnemonic: \"%s\": Concatenated mnemonic exceeds max. length\n", mnemonic); + return; + } + insertOpcode (opcode, new_mnemonic, format, min_cpu, mode_bits, flags); } return; @@ -338,13 +359,13 @@ main (void) make an entry into the opcode table. */ while (fgets (currentLine, sizeof (currentLine), stdin) != NULL) { - char opcode[16]; - char mnemonic[16]; - char format[16]; - char description[80]; - char cpu_string[16]; - char modes_string[16]; - char flags_string[80]; + char opcode[MAX_OPCODE_LEN + 1]; + char mnemonic[MAX_MNEMONIC_LEN + 1]; + char format[MAX_FORMAT_LEN + 1]; + char description[MAX_DESCRIPTION_LEN + 1]; + char cpu_string[MAX_CPU_LEN + 1]; + char modes_string[MAX_MODES_LEN + 1]; + char flags_string[MAX_FLAGS_LEN + 1]; int min_cpu; int mode_bits; int flag_bits; @@ -353,11 +374,17 @@ main (void) if (currentLine[0] == '#' || currentLine[0] == '\n') continue; - memset (opcode, 0, 8); - num_matched = - sscanf (currentLine, "%15s %15s %15s \"%79[^\"]\" %15s %15s %79[^\n]", - opcode, mnemonic, format, description, - cpu_string, modes_string, flags_string); + memset (opcode, '\0', sizeof(opcode)); + num_matched = sscanf (currentLine, + "%" STRINGIFY (MAX_OPCODE_LEN) "s " + "%" STRINGIFY (MAX_MNEMONIC_LEN) "s " + "%" STRINGIFY (MAX_FORMAT_LEN) "s " + "\"%" STRINGIFY (MAX_DESCRIPTION_LEN) "[^\"]\" " + "%" STRINGIFY (MAX_CPU_LEN) "s " + "%" STRINGIFY (MAX_MODES_LEN) "s " + "%" STRINGIFY (MAX_FLAGS_LEN) "[^\n]", + opcode, mnemonic, format, description, + cpu_string, modes_string, flags_string); if (num_matched != 6 && num_matched != 7) { print_error ("Couldn't scan line %s\n", currentLine); -- 2.40.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 6/7] s390: Optionally print instruction description in disassembly 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus ` (4 preceding siblings ...) 2023-12-15 14:36 ` [PATCH v2 5/7] s390: Use safe string functions and length macros " Jens Remus @ 2023-12-15 14:36 ` Jens Remus 2023-12-15 14:36 ` [PATCH v2 7/7] s390: Add suffix to conditional branch instruction descriptions Jens Remus ` (2 subsequent siblings) 8 siblings, 0 replies; 10+ messages in thread From: Jens Remus @ 2023-12-15 14:36 UTC (permalink / raw) To: binutils; +Cc: Jens Remus, Andreas Krebbel, Nick Clifton Print instruction description as comment in disassembly with s390 architecture specific option "insndesc": - For objdump it can be enabled with option "-M insndesc" - In gdb it can be enabled with "set disassembler-options insndesc" Since comments are not column aligned the output can enhanced for readability by postprocessing using a filter such as "expand": ... | expand -t 8,16,24,32,40,80 Or when using in combination with objdump option --visualize-jumps: ... | expand | sed -e 's/ *#/\t#/' | expand -t 1,80 Note that the instruction descriptions add about 128 KB to s390-opc.o: s390-opc.o without instruction descriptions: 216368 bytes s390-opc.o with instruction descriptions : 348432 bytes binutils/ * NEWS: Mention new s390-specific disassembler option "insndesc". include/ * opcode/s390.h (struct s390_opcode): Add field to hold instruction description. opcodes/ * s390-mkopc.c: Copy instruction description from s390-opc.txt into generated operation code table s390-opc.tab. * s390-opc.c (s390_opformats): Provide NULL as description in .insn pseudo-mnemonics opcode table. * s390-dis.c: Add s390-specific disassembler option "insndesc" and optionally print the instruction description as comment in the disassembly when it is specified. gas/ * testsuite/gas/s390/s390.exp: Add new test disassembly test case "zarch-insndesc". * testsuite/gas/s390/zarch-insndesc.s: New test case for s390- specific disassembler option "insndesc". * testsuite/gas/s390/zarch-insndesc.d: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> --- binutils/NEWS | 5 ++ gas/testsuite/gas/s390/s390.exp | 1 + gas/testsuite/gas/s390/zarch-insndesc.d | 17 +++++++ gas/testsuite/gas/s390/zarch-insndesc.s | 10 ++++ include/opcode/s390.h | 5 +- opcodes/s390-dis.c | 13 +++++- opcodes/s390-mkopc.c | 19 +++++--- opcodes/s390-opc.c | 62 ++++++++++++------------- 8 files changed, 92 insertions(+), 40 deletions(-) create mode 100644 gas/testsuite/gas/s390/zarch-insndesc.d create mode 100644 gas/testsuite/gas/s390/zarch-insndesc.s diff --git a/binutils/NEWS b/binutils/NEWS index 73df7053be4..35b84e62b95 100644 --- a/binutils/NEWS +++ b/binutils/NEWS @@ -19,6 +19,11 @@ * objdump --visualize-jumps is now supported on s390 architecture. +* The s390 disassembly now optionally includes the instruction description as + comment with the s390-specific disassembler option "insndesc": + - For objdump it can be enabled with "objdump -M insndesc ...". + - In gdb it can be enabled with "set disassembler-options insndesc". + Changes in 2.41: * The MIPS port now supports the Sony Interactive Entertainment Allegrex diff --git a/gas/testsuite/gas/s390/s390.exp b/gas/testsuite/gas/s390/s390.exp index 356fba95885..86e2dd492cd 100644 --- a/gas/testsuite/gas/s390/s390.exp +++ b/gas/testsuite/gas/s390/s390.exp @@ -37,6 +37,7 @@ if [expr [istarget "s390-*-*"] || [istarget "s390x-*-*"]] then { run_dump_test "zarch-operands" "{as -m64} {as -march=z9-109}" run_dump_test "zarch-machine" "{as -m64} {as -march=z900}" run_dump_test "zarch-optargs" "{as -m64} {as -march=arch12}" + run_dump_test "zarch-insndesc" "{as -m64}" run_list_test "machine-parsing-1" "" run_list_test "machine-parsing-2" "" run_list_test "machine-parsing-3" "" diff --git a/gas/testsuite/gas/s390/zarch-insndesc.d b/gas/testsuite/gas/s390/zarch-insndesc.d new file mode 100644 index 00000000000..9a121fb2c30 --- /dev/null +++ b/gas/testsuite/gas/s390/zarch-insndesc.d @@ -0,0 +1,17 @@ +#name: s390x insndesc +#objdump: -dr -M insndesc + +.*: +file format .* + +Disassembly of section .text: + +.* <foo>: +.*: b3 95 00 69 [ ]*cdfbr %f6,%r9 # convert from fixed 32 to long bfp + *([\da-f]+): 84 69 00 00 [ ]*brxh %r6,%r9,\1 <foo\+0x\1> # branch relative on index high +.*: b2 99 5f ff [ ]*srnm 4095\(%r5\) # set rounding mode +.*: b9 11 00 96 [ ]*lngfr %r9,%r6 # load negative 64<32 +.*: ec 67 92 1c 26 54 [ ]*rnsbgt %r6,%r7,18,28,38 # rotate then and selected bits and test results +.*: ec 67 0c 8d 0e 5d [ ]*risbhgz %r6,%r7,12,13,14 # rotate then insert selected bits high and zero remaining bits +.*: b3 96 37 59 [ ]*cxfbra %f5,3,%r9,7 # convert from 32 bit fixed to extended bfp with rounding mode +.*: ec 67 0c 94 0e 59 [ ]*risbgnz %r6,%r7,12,20,14 # rotate then insert selected bits and zero remaining bits nocc +.*: 07 07 [ ]*nopr %r7 # no operation diff --git a/gas/testsuite/gas/s390/zarch-insndesc.s b/gas/testsuite/gas/s390/zarch-insndesc.s new file mode 100644 index 00000000000..e964315f0af --- /dev/null +++ b/gas/testsuite/gas/s390/zarch-insndesc.s @@ -0,0 +1,10 @@ +.text +foo: + cdfbr %f6,%r9 + brxh %r6,%r9,. + srnm 4095(%r5) + lngfr %r9,%r6 + rnsbgt %r6,%r7,18,28,38 + risbhgz %r6,%r7,12,13,14 + cxfbra %f5,3,%r9,7 + risbgnz %r6,%r7,12,20,14 diff --git a/include/opcode/s390.h b/include/opcode/s390.h index d540e1dfd00..319bfe2d629 100644 --- a/include/opcode/s390.h +++ b/include/opcode/s390.h @@ -81,7 +81,7 @@ enum s390_opcode_cpu_val struct s390_opcode { - /* The opcode name. */ + /* The opcode name (mnemonic). */ const char * name; /* The opcode itself. Those bits which will be filled in with @@ -110,6 +110,9 @@ struct s390_opcode /* Instruction specific flags. */ unsigned int flags; + + /* Instruction description. */ + const char * description; }; /* The table itself is sorted by major opcode number, and is otherwise diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c index 8c8a98c4e24..fca965fbb5d 100644 --- a/opcodes/s390-dis.c +++ b/opcodes/s390-dis.c @@ -31,6 +31,7 @@ static int opc_index[256]; static int current_arch_mask = 0; static int option_use_insn_len_bits_p = 0; +static int option_print_insn_desc = 0; typedef struct { @@ -43,7 +44,8 @@ static const s390_options_t options[] = { "esa" , N_("Disassemble in ESA architecture mode") }, { "zarch", N_("Disassemble in z/Architecture mode") }, { "insnlength", N_("Print unknown instructions according to " - "length from first two bits") } + "length from first two bits") }, + { "insndesc", N_("Print instruction description as comment") }, }; /* Set up index table for first opcode byte. */ @@ -63,6 +65,7 @@ disassemble_init_s390 (struct disassemble_info *info) current_arch_mask = 1 << S390_OPCODE_ZARCH; option_use_insn_len_bits_p = 0; + option_print_insn_desc = 0; for (p = info->disassembler_options; p != NULL; ) { @@ -72,6 +75,8 @@ disassemble_init_s390 (struct disassemble_info *info) current_arch_mask = 1 << S390_OPCODE_ZARCH; else if (startswith (p, "insnlength")) option_use_insn_len_bits_p = 1; + else if (startswith (p, "insndesc")) + option_print_insn_desc = 1; else /* xgettext:c-format */ opcodes_error_handler (_("unknown S/390 disassembler option: %s"), p); @@ -311,6 +316,12 @@ s390_print_insn_with_opcode (bfd_vma memaddr, else separator = ','; } + + /* Optional: instruction name. */ + if (option_print_insn_desc && opcode->description + && opcode->description[0] != '\0') + info->fprintf_styled_func (info->stream, dis_style_comment_start, "\t# %s", + opcode->description); } /* Check whether opcode A's mask is more specific than that of B. */ diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c index eae0397d497..c6930a3e9b5 100644 --- a/opcodes/s390-mkopc.c +++ b/opcodes/s390-mkopc.c @@ -63,6 +63,7 @@ struct op_struct int mode_bits; int min_cpu; int flags; + char description[MAX_DESCRIPTION_LEN + 1]; unsigned long long sort_value; int no_nibbles; @@ -84,7 +85,7 @@ createTable (void) static void insertOpcode (char *opcode, char *mnemonic, char *format, - int min_cpu, int mode_bits, int flags) + int min_cpu, int mode_bits, int flags, char* description) { char *str; unsigned long long sort_value; @@ -132,6 +133,8 @@ insertOpcode (char *opcode, char *mnemonic, char *format, op_array[ix].min_cpu = min_cpu; op_array[ix].mode_bits = mode_bits; op_array[ix].flags = flags; + strncpy (op_array[ix].description, description, MAX_DESCRIPTION_LEN); + op_array[ix].description[MAX_DESCRIPTION_LEN] = '\0'; no_ops++; } @@ -193,7 +196,7 @@ const struct s390_cond_ext_format s390_crb_extensions[NUM_CRB_EXTENSIONS] = static void insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, - int min_cpu, int mode_bits, int flags) + int min_cpu, int mode_bits, int flags, char *description) { char *tag; char prefix[MAX_MNEMONIC_LEN + 1]; @@ -206,7 +209,7 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, if (!(tag = strpbrk (mnemonic, "*$"))) { - insertOpcode (opcode, mnemonic, format, min_cpu, mode_bits, flags); + insertOpcode (opcode, mnemonic, format, min_cpu, mode_bits, flags, description); return; } @@ -290,7 +293,7 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, return; } - insertOpcode (opcode, new_mnemonic, format, min_cpu, mode_bits, flags); + insertOpcode (opcode, new_mnemonic, format, min_cpu, mode_bits, flags, description); } return; @@ -311,7 +314,8 @@ static const char file_header[] = " instruction which matches.\n" " MODE_BITS - zarch or esa\n" " MIN_CPU - number of the min cpu level required\n" - " FLAGS - instruction flags. */\n\n" + " FLAGS - instruction flags.\n" + " DESCRIPTION - description of the instruction. */\n\n" "const struct s390_opcode s390_opcodes[] =\n {\n"; /* `dumpTable': write opcode table. */ @@ -337,7 +341,8 @@ dumpTable (void) op_array[ix].format, op_array[ix].format); printf ("%i, ", op_array[ix].mode_bits); printf ("%i, ", op_array[ix].min_cpu); - printf ("%i}", op_array[ix].flags); + printf ("%i, ", op_array[ix].flags); + printf ("\"%s\" }", op_array[ix].description); if (ix < no_ops-1) printf (",\n"); else @@ -497,7 +502,7 @@ main (void) str++; } while (*str != 0); } - insertExpandedMnemonic (opcode, mnemonic, format, min_cpu, mode_bits, flag_bits); + insertExpandedMnemonic (opcode, mnemonic, format, min_cpu, mode_bits, flag_bits, description); continue_loop: ; diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c index cbfdb3df0b7..e44621a7479 100644 --- a/opcodes/s390-opc.c +++ b/opcodes/s390-opc.c @@ -774,37 +774,37 @@ unused_s390_operands_static_asserts (void) const struct s390_opcode s390_opformats[] = { - { "e", OP8(0x00LL), MASK_E, INSTR_E, 3, 0 ,0 }, - { "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3, 0 ,0 }, - { "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3, 0 ,0 }, - { "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 0 ,0 }, - { "rilu", OP8(0x00LL), MASK_RIL_RU, INSTR_RIL_RU, 3, 0 ,0 }, - { "ris", OP8(0x00LL), MASK_RIS_RURDI, INSTR_RIS_RURDI, 3, 6 ,0 }, - { "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3, 0 ,0 }, - { "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0 ,0 }, - { "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3, 0 ,0 }, - { "rrs", OP8(0x00LL), MASK_RRS_RRRDU, INSTR_RRS_RRRDU, 3, 6 ,0 }, - { "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0 ,0 }, - { "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0 ,0 }, - { "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0 ,0 }, - { "rsy", OP8(0x00LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 3, 3 ,0 }, - { "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0 ,0 }, - { "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 0 ,0 }, - { "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR, 3, 0 ,0 }, - { "rxy", OP8(0x00LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3 ,0 }, - { "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3, 0 ,0 }, - { "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3, 0 ,0 }, - { "siy", OP8(0x00LL), MASK_SIY_URD, INSTR_SIY_URD, 3, 3 ,0 }, - { "sil", OP8(0x00LL), MASK_SIL_RDI, INSTR_SIL_RDI, 3, 6 ,0 }, - { "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD, 3, 0 ,0 }, - { "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0 ,0 }, - { "ssf", OP8(0x00LL), MASK_SSF_RRDRD, INSTR_SSF_RRDRD, 3, 0 ,0 }, - { "vrv", OP8(0x00LL), MASK_VRV_VVXRDU, INSTR_VRV_VVXRDU, 3, 9 ,0 }, - { "vri", OP8(0x00LL), MASK_VRI_VVUUU, INSTR_VRI_VVUUU, 3, 9 ,0 }, - { "vrx", OP8(0x00LL), MASK_VRX_VRRDU, INSTR_VRX_VRRDU, 3, 9 ,0 }, - { "vrs", OP8(0x00LL), MASK_VRS_RVRDU, INSTR_VRS_RVRDU, 3, 9 ,0 }, - { "vrr", OP8(0x00LL), MASK_VRR_VVV0UUU, INSTR_VRR_VVV0UUU, 3, 9 ,0 }, - { "vsi", OP8(0x00LL), MASK_VSI_URDV, INSTR_VSI_URDV, 3, 10 ,0 }, + { "e", OP8(0x00LL), MASK_E, INSTR_E, 3, 0, 0, NULL }, + { "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3, 0, 0, NULL }, + { "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3, 0, 0, NULL }, + { "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 0, 0, NULL }, + { "rilu", OP8(0x00LL), MASK_RIL_RU, INSTR_RIL_RU, 3, 0, 0, NULL }, + { "ris", OP8(0x00LL), MASK_RIS_RURDI, INSTR_RIS_RURDI, 3, 6, 0, NULL }, + { "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3, 0, 0, NULL }, + { "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0, 0, NULL }, + { "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3, 0, 0, NULL }, + { "rrs", OP8(0x00LL), MASK_RRS_RRRDU, INSTR_RRS_RRRDU, 3, 6, 0, NULL }, + { "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0, 0, NULL }, + { "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0, 0, NULL }, + { "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0, 0, NULL }, + { "rsy", OP8(0x00LL), MASK_RSY_RRRD, INSTR_RSY_RRRD, 3, 3, 0, NULL }, + { "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0, 0, NULL }, + { "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 0, 0, NULL }, + { "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR, 3, 0, 0, NULL }, + { "rxy", OP8(0x00LL), MASK_RXY_RRRD, INSTR_RXY_RRRD, 3, 3, 0, NULL }, + { "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3, 0, 0, NULL }, + { "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3, 0, 0, NULL }, + { "siy", OP8(0x00LL), MASK_SIY_URD, INSTR_SIY_URD, 3, 3, 0, NULL }, + { "sil", OP8(0x00LL), MASK_SIL_RDI, INSTR_SIL_RDI, 3, 6, 0, NULL }, + { "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD, 3, 0, 0, NULL }, + { "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0, 0, NULL }, + { "ssf", OP8(0x00LL), MASK_SSF_RRDRD, INSTR_SSF_RRDRD, 3, 0, 0, NULL }, + { "vrv", OP8(0x00LL), MASK_VRV_VVXRDU, INSTR_VRV_VVXRDU, 3, 9, 0, NULL }, + { "vri", OP8(0x00LL), MASK_VRI_VVUUU, INSTR_VRI_VVUUU, 3, 9, 0, NULL }, + { "vrx", OP8(0x00LL), MASK_VRX_VRRDU, INSTR_VRX_VRRDU, 3, 9, 0, NULL }, + { "vrs", OP8(0x00LL), MASK_VRS_RVRDU, INSTR_VRS_RVRDU, 3, 9, 0, NULL }, + { "vrr", OP8(0x00LL), MASK_VRR_VVV0UUU, INSTR_VRR_VVV0UUU, 3, 9, 0, NULL }, + { "vsi", OP8(0x00LL), MASK_VSI_URDV, INSTR_VSI_URDV, 3, 10, 0, NULL }, }; const int s390_num_opformats = -- 2.40.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 7/7] s390: Add suffix to conditional branch instruction descriptions 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus ` (5 preceding siblings ...) 2023-12-15 14:36 ` [PATCH v2 6/7] s390: Optionally print instruction description in disassembly Jens Remus @ 2023-12-15 14:36 ` Jens Remus 2023-12-18 12:14 ` [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Nick Clifton 2023-12-20 10:56 ` Andreas Krebbel 8 siblings, 0 replies; 10+ messages in thread From: Jens Remus @ 2023-12-15 14:36 UTC (permalink / raw) To: binutils; +Cc: Jens Remus, Andreas Krebbel, Nick Clifton Suffix the instruction description of conditional branch extended mnemonics with their condition (e.g. "on A high"). This complements the optional printing of instruction descriptions as comments in the disassembly. Due to the added text the maximum description length is increased from 80 to 128 characters (including the trailing '\0' character). opcodes/ * s390-mkopc.c: Add suffix to conditional branch extended mnemonic instruction descriptions. gas/ * testsuite/gas/s390/zarch-insndesc.s: Add test cases for printing of suffixed instruction description of conditional branch extended mnemonics. * testsuite/gas/s390/zarch-insndesc.d: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com> --- gas/testsuite/gas/s390/zarch-insndesc.d | 2 + gas/testsuite/gas/s390/zarch-insndesc.s | 2 + opcodes/s390-mkopc.c | 78 ++++++++++++++----------- 3 files changed, 48 insertions(+), 34 deletions(-) diff --git a/gas/testsuite/gas/s390/zarch-insndesc.d b/gas/testsuite/gas/s390/zarch-insndesc.d index 9a121fb2c30..2ac0c7a0ca7 100644 --- a/gas/testsuite/gas/s390/zarch-insndesc.d +++ b/gas/testsuite/gas/s390/zarch-insndesc.d @@ -14,4 +14,6 @@ Disassembly of section .text: .*: ec 67 0c 8d 0e 5d [ ]*risbhgz %r6,%r7,12,13,14 # rotate then insert selected bits high and zero remaining bits .*: b3 96 37 59 [ ]*cxfbra %f5,3,%r9,7 # convert from 32 bit fixed to extended bfp with rounding mode .*: ec 67 0c 94 0e 59 [ ]*risbgnz %r6,%r7,12,20,14 # rotate then insert selected bits and zero remaining bits nocc +.*: ec 6e 80 03 00 4e [ ]*lochhino %r6,-32765 # load halfword high immediate on condition on not overflow / if not ones + *([\da-f]+): ec 6a 00 00 d6 7c [ ]*cgijnl %r6,-42,\1 <foo\+0x\1> # compare immediate and branch relative \(64<8\) on A not low .*: 07 07 [ ]*nopr %r7 # no operation diff --git a/gas/testsuite/gas/s390/zarch-insndesc.s b/gas/testsuite/gas/s390/zarch-insndesc.s index e964315f0af..446832f813d 100644 --- a/gas/testsuite/gas/s390/zarch-insndesc.s +++ b/gas/testsuite/gas/s390/zarch-insndesc.s @@ -8,3 +8,5 @@ foo: risbhgz %r6,%r7,12,13,14 cxfbra %f5,3,%r9,7 risbgnz %r6,%r7,12,20,14 + lochhino %r6,-32765 + cgijnl %r6,-42,. diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c index c6930a3e9b5..025dbdb037f 100644 --- a/opcodes/s390-mkopc.c +++ b/opcodes/s390-mkopc.c @@ -32,7 +32,7 @@ #define MAX_OPCODE_LEN 15 #define MAX_MNEMONIC_LEN 15 #define MAX_FORMAT_LEN 15 -#define MAX_DESCRIPTION_LEN 79 +#define MAX_DESCRIPTION_LEN 127 #define MAX_CPU_LEN 15 #define MAX_MODES_LEN 15 @@ -142,50 +142,52 @@ struct s390_cond_ext_format { char nibble; char extension[4]; + char *description_suffix; + }; /* The mnemonic extensions for conditional jumps used to replace the '*' tag. */ #define NUM_COND_EXTENSIONS 20 const struct s390_cond_ext_format s390_cond_extensions[NUM_COND_EXTENSIONS] = -{ { '1', "o" }, /* jump on overflow / if ones */ - { '2', "h" }, /* jump on A high */ - { '2', "p" }, /* jump on plus */ - { '3', "nle" }, /* jump on not low or equal */ - { '4', "l" }, /* jump on A low */ - { '4', "m" }, /* jump on minus / if mixed */ - { '5', "nhe" }, /* jump on not high or equal */ - { '6', "lh" }, /* jump on low or high */ - { '7', "ne" }, /* jump on A not equal B */ - { '7', "nz" }, /* jump on not zero / if not zeros */ - { '8', "e" }, /* jump on A equal B */ - { '8', "z" }, /* jump on zero / if zeros */ - { '9', "nlh" }, /* jump on not low or high */ - { 'a', "he" }, /* jump on high or equal */ - { 'b', "nl" }, /* jump on A not low */ - { 'b', "nm" }, /* jump on not minus / if not mixed */ - { 'c', "le" }, /* jump on low or equal */ - { 'd', "nh" }, /* jump on A not high */ - { 'd', "np" }, /* jump on not plus */ - { 'e', "no" }, /* jump on not overflow / if not ones */ +{ { '1', "o", "on overflow / if ones"}, /* jump on overflow / if ones */ + { '2', "h", "on A high"}, /* jump on A high */ + { '2', "p", "on plus" }, /* jump on plus */ + { '3', "nle", "on not low or equal" }, /* jump on not low or equal */ + { '4', "l", "on A low" }, /* jump on A low */ + { '4', "m", "on minus / if mixed" }, /* jump on minus / if mixed */ + { '5', "nhe", "on not high or equal" }, /* jump on not high or equal */ + { '6', "lh", "on low or high" }, /* jump on low or high */ + { '7', "ne", "on A not equal B" }, /* jump on A not equal B */ + { '7', "nz", "on not zero / if not zeros" }, /* jump on not zero / if not zeros */ + { '8', "e", "on A equal B" }, /* jump on A equal B */ + { '8', "z", "on zero / if zeros" }, /* jump on zero / if zeros */ + { '9', "nlh", "on not low or high " }, /* jump on not low or high */ + { 'a', "he", "on high or equal" }, /* jump on high or equal */ + { 'b', "nl", "on A not low" }, /* jump on A not low */ + { 'b', "nm", "on not minus / if not mixed" }, /* jump on not minus / if not mixed */ + { 'c', "le", "on low or equal" }, /* jump on low or equal */ + { 'd', "nh", "on A not high" }, /* jump on A not high */ + { 'd', "np", "on not plus" }, /* jump on not plus */ + { 'e', "no", "on not overflow / if not ones" },/* jump on not overflow / if not ones */ }; /* The mnemonic extensions for conditional branches used to replace the '$' tag. */ #define NUM_CRB_EXTENSIONS 12 const struct s390_cond_ext_format s390_crb_extensions[NUM_CRB_EXTENSIONS] = -{ { '2', "h" }, /* jump on A high */ - { '2', "nle" }, /* jump on not low or equal */ - { '4', "l" }, /* jump on A low */ - { '4', "nhe" }, /* jump on not high or equal */ - { '6', "ne" }, /* jump on A not equal B */ - { '6', "lh" }, /* jump on low or high */ - { '8', "e" }, /* jump on A equal B */ - { '8', "nlh" }, /* jump on not low or high */ - { 'a', "nl" }, /* jump on A not low */ - { 'a', "he" }, /* jump on high or equal */ - { 'c', "nh" }, /* jump on A not high */ - { 'c', "le" }, /* jump on low or equal */ +{ { '2', "h", "on A high" }, /* jump on A high */ + { '2', "nle", "on not low or equal" }, /* jump on not low or equal */ + { '4', "l", "on A low" }, /* jump on A low */ + { '4', "nhe", "on not high or equal" }, /* jump on not high or equal */ + { '6', "ne", "on A not equal B" }, /* jump on A not equal B */ + { '6', "lh", "on low or high" }, /* jump on low or high */ + { '8', "e", "on A equal B" }, /* jump on A equal B */ + { '8', "nlh", "on not low or high" }, /* jump on not low or high */ + { 'a', "nl", "on A not low" }, /* jump on A not low */ + { 'a', "he", "on high or equal" }, /* jump on high or equal */ + { 'c', "nh", "on A not high" }, /* jump on A not high */ + { 'c', "le", "on low or equal" }, /* jump on low or equal */ }; /* As with insertOpcode instructions are added to the sorted opcode @@ -283,6 +285,7 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, for (i = 0; i < ext_table_length; i++) { char new_mnemonic[MAX_MNEMONIC_LEN + 1]; + char new_description[MAX_DESCRIPTION_LEN + 1]; opcode[mask_start] = ext_table[i].nibble; @@ -293,7 +296,14 @@ insertExpandedMnemonic (char *opcode, char *mnemonic, char *format, return; } - insertOpcode (opcode, new_mnemonic, format, min_cpu, mode_bits, flags, description); + if (snprintf (new_description, sizeof (new_description), "%s %s", description, + ext_table[i].description_suffix) >= sizeof (new_description)) + { + print_error ("Mnemonic \"%s\": Concatenated description exceeds max. length\n", mnemonic); + return; + } + + insertOpcode (opcode, new_mnemonic, format, min_cpu, mode_bits, flags, new_description); } return; -- 2.40.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/7] s390: Optionally print instruction description in disassembly 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus ` (6 preceding siblings ...) 2023-12-15 14:36 ` [PATCH v2 7/7] s390: Add suffix to conditional branch instruction descriptions Jens Remus @ 2023-12-18 12:14 ` Nick Clifton 2023-12-20 10:56 ` Andreas Krebbel 8 siblings, 0 replies; 10+ messages in thread From: Nick Clifton @ 2023-12-18 12:14 UTC (permalink / raw) To: Jens Remus, binutils; +Cc: Andreas Krebbel Hi Jens, > With this patch series the s390 disassembler optionally prints the > instruction descriptions as comment in the disassembly. This is enabled > by specifying the new s390-specific disassembler option "insndesc". Patch series approved - please apply. Cheers Nick ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/7] s390: Optionally print instruction description in disassembly 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus ` (7 preceding siblings ...) 2023-12-18 12:14 ` [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Nick Clifton @ 2023-12-20 10:56 ` Andreas Krebbel 8 siblings, 0 replies; 10+ messages in thread From: Andreas Krebbel @ 2023-12-20 10:56 UTC (permalink / raw) To: Jens Remus, binutils; +Cc: Nick Clifton > Jens Remus (7): > s390: Fix build when using EXEEXT_FOR_BUILD > s390: Align letter case of instruction descriptions > s390: Provide IBM z16 (arch14) instruction descriptions > s390: Enhance error handling in s390-mkopc > s390: Use safe string functions and length macros in s390-mkopc > s390: Optionally print instruction description in disassembly > s390: Add suffix to conditional branch instruction descriptions Committed to mainline. Thanks! Andreas ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-12-20 10:56 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2023-12-15 14:36 [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Jens Remus 2023-12-15 14:36 ` [PATCH v2 1/7] s390: Fix build when using EXEEXT_FOR_BUILD Jens Remus 2023-12-15 14:36 ` [PATCH v2 2/7] s390: Align letter case of instruction descriptions Jens Remus 2023-12-15 14:36 ` [PATCH v2 3/7] s390: Provide IBM z16 (arch14) " Jens Remus 2023-12-15 14:36 ` [PATCH v2 4/7] s390: Enhance error handling in s390-mkopc Jens Remus 2023-12-15 14:36 ` [PATCH v2 5/7] s390: Use safe string functions and length macros " Jens Remus 2023-12-15 14:36 ` [PATCH v2 6/7] s390: Optionally print instruction description in disassembly Jens Remus 2023-12-15 14:36 ` [PATCH v2 7/7] s390: Add suffix to conditional branch instruction descriptions Jens Remus 2023-12-18 12:14 ` [PATCH v2 0/7] s390: Optionally print instruction description in disassembly Nick Clifton 2023-12-20 10:56 ` Andreas Krebbel
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).