From: changjiachen <changjiachen@stu.xupt.edu.cn>
To: binutils@sourceware.org
Cc: xuchenghua@loongson.cn, chenglulu@loongson.cn,
liuzhensong@loongson.cn, xry111@xry111.site, i.swmail@xen0n.name,
maskray@google.com, cailulu@loongson.cn, luweining@loongson.cn,
wanglei@loongson.cn, hejinyang@loongson.cn, Lazy_Linux@126.com,
mengqinggang@loongson.cn,
changjiachen <changjiachen@stu.xupt.edu.cn>
Subject: [PATCH v5 0/5] LoongArch tls le model linker relaxation support.
Date: Thu, 28 Dec 2023 11:39:52 +0800 [thread overview]
Message-ID: <20231228033957.108449-1-changjiachen@stu.xupt.edu.cn> (raw)
This is the v5 version of patches to support loongarch linker tls le model relax.
Changes from v4:
* Modified the format of the code.
* Some comments are added to the relevant test cases.
* Changed the serial number of the new relocation.
R_LARCH_TLS_LE_HI20_R (RELOC_NUMBER: 110 ==> 121)
R_LARCH_TLS_LE_ADD_R (RELOC_NUMBER: 111 ==> 122)
R_LARCH_TLS_LE_LO12_R (RELOC_NUMBER: 112 ==> 123)
Changes from v3:
* For the fourth operand in the add.d $a0,$a0,$a0,%le_add_r(a) insn,
some exception information is added.
* Added add.d $a0,$a0,$a0,%le_add_r(a) instruction format to check
test cases in gas/testsuite/gas/loongarch.
example:
a.s
add.d $a0,$a0,$a0,8
$ gas/as-new a.s
a.s: Assembler messages:
a.s:1: error: no match insn: add.d $a0,$a0,$a0,8
Changes from v2:
* Some problems in the v2 patch are answered as follows.
Question:
use ".reloc.,R_LARCH_TLS_LE_ADD_R,sym" to generate relocation
or %le_add_r(sym) to generate relocation.
Reply:
First, after a test, the R_LARCH_TLS_LE_ADD_R can be generated using ".reloc.,R_LARCH_TLS_LE_ADD_R,sym",
or "%le_add_r(sym)". However,".reloc" generates R_LARCH_TLS_LE_ADD_R relocation directly, and it is not
easy to add "R_LARCH_RELAX" relocation. "%le_add_r(sym)" Adds the R_LARCH_TLS_LE_ADD_R and R_LARCH_RELAX
relocation commands, which is easier to implement.
Of course, there is another way to generate ".reloc.,R_LARCH_TLS_LE_ADD_R,sym" and
".reloc.,R_LARCH_RELAX,sym" directly in gcc. However, this implementation causes the
-mrelax/-mno-relax option to be set in both gcc and gas, which can be confusing.
One problem with this is that add.d $r12,$r12,$r2 and add.d $r12,$r12,$r2,
%le_add_r(sym) are too similar, so I have to add comments in loongarch_fix_opcodes[].
The goal is to make it as clear as possible to developers.
* modified code format in loongarch_relax_tls_le(),use loongarch_relax_delete_bytes()
instead of R_LARCH_DELETE to implement the delete instruction operation.
* modified R_LARCH_TLS_LE_ADD_R type_name:"tls_le_add_r"-->"le_add_r".
* modify comment information.
* some comments added to "add.d" in loongarch_opcode loongarch_fix_opcodes[].
* remove some unnecessary content from the ld/testsuite/ld-loongarch test case.
Changes from v1:
* Modified v1-0000-cover-letter.patch part of the explanatory content.
Before Modify:
example: __thread int a = 1;
old insn sequence:
lu12i.w $r12,%le_hi20_r(a)
ori $r12,$r12,%le_lo12_r(a)
add.d $r12,$r12,$r2,%le_add_r(a)
li.w $r13,$r0,1
stptr.w $r13,$r12,0
new insn sequence:
lu12i.w $r12,%le_hi20_r(a)
add.d $r12,$r12,$r2,%le_add_r(a)
li.w $r13,$r0,1
st.w $r13,$r12,%le_lo12_r(a)
After Modify:
example: __thread int a = 1;
old insn sequence(at the O0 optimization level):
lu12i.w $r12,%le_hi20(a)
ori $r12,$r12,%le_lo12(a)
add.d $r12,$r12,$r2
addi.w $r13,$r0,1
stptr.w $r13,$r12,0
new insn sequence(at the O0 optimization level):
lu12i.w $r12,%le_hi20_r(a)
add.d $r12,$r12,$r2,%le_add_r(a)
addi.w $r13,$r0,1
st.w $r13,$r12,%le_lo12_r(a)
changjiachen (5):
LoongArch: bfd: Add support for tls le relax.
LoongArch: include: Add support for tls le relax.
LoongArch: opcodes: Add support for tls le relax.
LoongArch: gas: Add support for tls le relax.
LoongArch: ld: Add support for tls le relax.
bfd/bfd-in2.h | 4 +
bfd/elfnn-loongarch.c | 75 +++++++++
bfd/elfxx-loongarch.c | 55 ++++++-
bfd/libbfd.h | 3 +
bfd/reloc.c | 7 +
gas/config/tc-loongarch.c | 31 ++++
gas/testsuite/gas/loongarch/loongarch.exp | 9 ++
gas/testsuite/gas/loongarch/reloc.d | 18 +++
gas/testsuite/gas/loongarch/reloc.s | 11 ++
.../gas/loongarch/tls_le_insn_format_check.s | 15 ++
include/elf/loongarch.h | 12 ++
ld/testsuite/ld-loongarch-elf/old-tls-le.s | 23 +++
.../relax-bound-check-tls-le.s | 53 ++++++
ld/testsuite/ld-loongarch-elf/relax-tls-le.s | 26 +++
ld/testsuite/ld-loongarch-elf/relax.exp | 151 +++++++++++++++++-
.../tls-relax-compatible-check-new.s | 35 ++++
.../tls-relax-compatible-check-old.s | 33 ++++
opcodes/loongarch-opc.c | 1 +
18 files changed, 556 insertions(+), 6 deletions(-)
create mode 100644 gas/testsuite/gas/loongarch/tls_le_insn_format_check.s
create mode 100644 ld/testsuite/ld-loongarch-elf/old-tls-le.s
create mode 100644 ld/testsuite/ld-loongarch-elf/relax-bound-check-tls-le.s
create mode 100644 ld/testsuite/ld-loongarch-elf/relax-tls-le.s
create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-new.s
create mode 100644 ld/testsuite/ld-loongarch-elf/tls-relax-compatible-check-old.s
--
2.40.0
next reply other threads:[~2023-12-28 3:40 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-28 3:39 changjiachen [this message]
2023-12-28 3:39 ` [PATCH v5 1/5] LoongArch: bfd: Add support for tls le relax changjiachen
2023-12-29 9:53 ` Hannes Domani
2023-12-29 10:18 ` 常佳琛
2023-12-29 12:39 ` Xi Ruoyao
2023-12-28 3:39 ` [PATCH v5 2/5] LoongArch: include: " changjiachen
2023-12-28 3:39 ` [PATCH v5 3/5] LoongArch: opcodes: " changjiachen
2023-12-28 3:39 ` [PATCH v5 4/5] LoongArch: gas: " changjiachen
2023-12-28 3:39 ` [PATCH v5 5/5] LoongArch: ld: " changjiachen
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