* [PATCH v1 0/7] Organize instructions and relocations test cases in gas
@ 2024-02-29 11:45 Lulu Cai
2024-02-29 11:45 ` [PATCH v1 1/7] LoongArch: Add gas testsuit for alias instructions Lulu Cai
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Lulu Cai @ 2024-02-29 11:45 UTC (permalink / raw)
To: binutils
Cc: xuchenghua, chenglulu, liuzhensong, mengqinggang, xry111,
i.swmail, maskray, luweining, wanglei, hejinyang, Lulu Cai
For the test cases of instructions, we distinguished them according to
the classification method in the instruction manual.
Instruction test case classification:
For the basic instruction set, there are LA32 and LA64 classes, which
contain int, float, and privilege, respectively.
For the extended instruction set, only LA64 versions are available,
including lsx, lasx, lvz, and lbt.
For other instructions not defined in the manual, LA32 and LA64 are
distinguished, Includes macros and alias instructions. The relocations
of LA32 are those used by instructions that exist in the instruction
manual of LA32.
Relocation the test case classification:
There are two types of LA32 and LA64.
Lulu Cai (7):
LoongArch: Add gas testsuit for alias instructions
LoongArch: Add gas testsuit for lbt/lvz instructions
LoongArch: Add gas testsuit for lsx/lasx instructions
LoongArch: Add gas testsuit for LA64 int/float instructions
LoongArch: Add gas testsuit for LA32 int/float instructions
LoongArch: Add gas testsuit for LA64 relocations
LoongArch: Add gas testsuit for LA32 relocations
gas/testsuite/gas/loongarch/insn_alias_32.d | 19 +
gas/testsuite/gas/loongarch/insn_alias_32.s | 10 +
gas/testsuite/gas/loongarch/insn_alias_64.d | 20 +
gas/testsuite/gas/loongarch/insn_alias_64.s | 11 +
gas/testsuite/gas/loongarch/insn_float32.d | 157 +++++
gas/testsuite/gas/loongarch/insn_float32.s | 149 ++++
gas/testsuite/gas/loongarch/insn_float64.d | 165 +++++
gas/testsuite/gas/loongarch/insn_float64.s | 157 +++++
gas/testsuite/gas/loongarch/insn_int32.d | 147 ++++
gas/testsuite/gas/loongarch/insn_int32.s | 156 ++++
gas/testsuite/gas/loongarch/insn_int64.d | 430 ++++++++++++
gas/testsuite/gas/loongarch/insn_int64.s | 440 ++++++++++++
gas/testsuite/gas/loongarch/insn_lasx.d | 737 +++++++++++++++++++
gas/testsuite/gas/loongarch/insn_lasx.s | 727 +++++++++++++++++++
gas/testsuite/gas/loongarch/insn_lbt.d | 186 +++++
gas/testsuite/gas/loongarch/insn_lbt.s | 176 +++++
gas/testsuite/gas/loongarch/insn_lsx.d | 742 ++++++++++++++++++++
gas/testsuite/gas/loongarch/insn_lsx.s | 732 +++++++++++++++++++
gas/testsuite/gas/loongarch/insn_lvz.d | 15 +
gas/testsuite/gas/loongarch/insn_lvz.s | 5 +
gas/testsuite/gas/loongarch/relocs_32.d | 75 ++
gas/testsuite/gas/loongarch/relocs_32.s | 61 ++
gas/testsuite/gas/loongarch/relocs_64.d | 144 ++++
gas/testsuite/gas/loongarch/relocs_64.s | 109 +++
24 files changed, 5570 insertions(+)
create mode 100644 gas/testsuite/gas/loongarch/insn_alias_32.d
create mode 100644 gas/testsuite/gas/loongarch/insn_alias_32.s
create mode 100644 gas/testsuite/gas/loongarch/insn_alias_64.d
create mode 100644 gas/testsuite/gas/loongarch/insn_alias_64.s
create mode 100644 gas/testsuite/gas/loongarch/insn_float32.d
create mode 100644 gas/testsuite/gas/loongarch/insn_float32.s
create mode 100644 gas/testsuite/gas/loongarch/insn_float64.d
create mode 100644 gas/testsuite/gas/loongarch/insn_float64.s
create mode 100644 gas/testsuite/gas/loongarch/insn_int32.d
create mode 100644 gas/testsuite/gas/loongarch/insn_int32.s
create mode 100644 gas/testsuite/gas/loongarch/insn_int64.d
create mode 100644 gas/testsuite/gas/loongarch/insn_int64.s
create mode 100644 gas/testsuite/gas/loongarch/insn_lasx.d
create mode 100644 gas/testsuite/gas/loongarch/insn_lasx.s
create mode 100644 gas/testsuite/gas/loongarch/insn_lbt.d
create mode 100644 gas/testsuite/gas/loongarch/insn_lbt.s
create mode 100644 gas/testsuite/gas/loongarch/insn_lsx.d
create mode 100644 gas/testsuite/gas/loongarch/insn_lsx.s
create mode 100644 gas/testsuite/gas/loongarch/insn_lvz.d
create mode 100644 gas/testsuite/gas/loongarch/insn_lvz.s
create mode 100644 gas/testsuite/gas/loongarch/relocs_32.d
create mode 100644 gas/testsuite/gas/loongarch/relocs_32.s
create mode 100644 gas/testsuite/gas/loongarch/relocs_64.d
create mode 100644 gas/testsuite/gas/loongarch/relocs_64.s
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v1 1/7] LoongArch: Add gas testsuit for alias instructions
2024-02-29 11:45 [PATCH v1 0/7] Organize instructions and relocations test cases in gas Lulu Cai
@ 2024-02-29 11:45 ` Lulu Cai
2024-02-29 11:45 ` [PATCH v1 2/7] LoongArch: Add gas testsuit for lbt/lvz instructions Lulu Cai
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Lulu Cai @ 2024-02-29 11:45 UTC (permalink / raw)
To: binutils
Cc: xuchenghua, chenglulu, liuzhensong, mengqinggang, xry111,
i.swmail, maskray, luweining, wanglei, hejinyang, Lulu Cai
Test the alias instructions.
---
gas/testsuite/gas/loongarch/insn_alias_32.d | 19 +++++++++++++++++++
gas/testsuite/gas/loongarch/insn_alias_32.s | 10 ++++++++++
gas/testsuite/gas/loongarch/insn_alias_64.d | 20 ++++++++++++++++++++
gas/testsuite/gas/loongarch/insn_alias_64.s | 11 +++++++++++
4 files changed, 60 insertions(+)
create mode 100644 gas/testsuite/gas/loongarch/insn_alias_32.d
create mode 100644 gas/testsuite/gas/loongarch/insn_alias_32.s
create mode 100644 gas/testsuite/gas/loongarch/insn_alias_64.d
create mode 100644 gas/testsuite/gas/loongarch/insn_alias_64.s
diff --git a/gas/testsuite/gas/loongarch/insn_alias_32.d b/gas/testsuite/gas/loongarch/insn_alias_32.d
new file mode 100644
index 00000000000..753eae7a8f9
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_alias_32.d
@@ -0,0 +1,19 @@
+#as:
+#objdump: -d -M no-aliases
+#skip: loongarch64-*-*
+
+.* file format .*
+
+
+Disassembly of section .text:
+
+0+ <L1>:
+ 0: 001500a4 or \$a0, \$a1, \$zero
+ 4: 02bffc04 addi.w \$a0, \$zero, -1
+ 8: 03400000 andi \$zero, \$zero, 0x0
+ c: 03800404 ori \$a0, \$zero, 0x1
+ 10: 4c000020 jirl \$zero, \$ra, 0
+ 14: 4c000020 jirl \$zero, \$ra, 0
+ 18: 60000080 blt \$a0, \$zero, 0 # 18 <L1\+0x18>
+ 1c: 64000080 bge \$a0, \$zero, 0 # 1c <L1\+0x1c>
+ 20: 64000004 bge \$zero, \$a0, 0 # 20 <L1\+0x20>
diff --git a/gas/testsuite/gas/loongarch/insn_alias_32.s b/gas/testsuite/gas/loongarch/insn_alias_32.s
new file mode 100644
index 00000000000..8027e32a5a6
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_alias_32.s
@@ -0,0 +1,10 @@
+L1:
+ move $a0,$a1
+ li.w $a0,-1
+ nop
+ li.w $a0,1
+ ret
+ jr $ra
+ bltz $a0,.L1
+ bgez $a0,.L1
+ blez $a0,.L1
diff --git a/gas/testsuite/gas/loongarch/insn_alias_64.d b/gas/testsuite/gas/loongarch/insn_alias_64.d
new file mode 100644
index 00000000000..8d3ed7bc472
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_alias_64.d
@@ -0,0 +1,20 @@
+#as-new:
+#objdump: -d -M no-aliases
+#skip: loongarch32-*-*
+
+.*: file format .*
+
+
+Disassembly of section .text:
+
+0+ <L1>:
+ 0: 001500a4 or \$a0, \$a1, \$zero
+ 4: 02bffc04 addi.w \$a0, \$zero, -1
+ 8: 02bffc04 addi.w \$a0, \$zero, -1
+ c: 03400000 andi \$zero, \$zero, 0x0
+ 10: 03800404 ori \$a0, \$zero, 0x1
+ 14: 4c000020 jirl \$zero, \$ra, 0
+ 18: 4c000020 jirl \$zero, \$ra, 0
+ 1c: 60000080 blt \$a0, \$zero, 0 # 1c <L1\+0x1c>
+ 20: 64000080 bge \$a0, \$zero, 0 # 20 <L1\+0x20>
+ 24: 64000004 bge \$zero, \$a0, 0 # 24 <L1\+0x24>
diff --git a/gas/testsuite/gas/loongarch/insn_alias_64.s b/gas/testsuite/gas/loongarch/insn_alias_64.s
new file mode 100644
index 00000000000..e7e42638889
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_alias_64.s
@@ -0,0 +1,11 @@
+L1:
+ move $a0,$a1
+ li.w $a0,-1
+ li.d $a0,-1
+ nop
+ li.w $a0,1
+ ret
+ jr $ra
+ bltz $a0,.L1
+ bgez $a0,.L1
+ blez $a0,.L1
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v1 2/7] LoongArch: Add gas testsuit for lbt/lvz instructions
2024-02-29 11:45 [PATCH v1 0/7] Organize instructions and relocations test cases in gas Lulu Cai
2024-02-29 11:45 ` [PATCH v1 1/7] LoongArch: Add gas testsuit for alias instructions Lulu Cai
@ 2024-02-29 11:45 ` Lulu Cai
2024-02-29 11:45 ` [PATCH v1 3/7] LoongArch: Add gas testsuit for lsx/lasx instructions Lulu Cai
2024-02-29 11:45 ` [PATCH v1 4/7] LoongArch: Add gas testsuit for LA64 int/float instructions Lulu Cai
3 siblings, 0 replies; 5+ messages in thread
From: Lulu Cai @ 2024-02-29 11:45 UTC (permalink / raw)
To: binutils
Cc: xuchenghua, chenglulu, liuzhensong, mengqinggang, xry111,
i.swmail, maskray, luweining, wanglei, hejinyang, Lulu Cai
Test the LBT/LVZ instructions. Only LA64 supports
these instructions.
---
gas/testsuite/gas/loongarch/insn_lbt.d | 186 +++++++++++++++++++++++++
gas/testsuite/gas/loongarch/insn_lbt.s | 176 +++++++++++++++++++++++
gas/testsuite/gas/loongarch/insn_lvz.d | 15 ++
gas/testsuite/gas/loongarch/insn_lvz.s | 5 +
4 files changed, 382 insertions(+)
create mode 100644 gas/testsuite/gas/loongarch/insn_lbt.d
create mode 100644 gas/testsuite/gas/loongarch/insn_lbt.s
create mode 100644 gas/testsuite/gas/loongarch/insn_lvz.d
create mode 100644 gas/testsuite/gas/loongarch/insn_lvz.s
diff --git a/gas/testsuite/gas/loongarch/insn_lbt.d b/gas/testsuite/gas/loongarch/insn_lbt.d
new file mode 100644
index 00000000000..7d80fb89070
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lbt.d
@@ -0,0 +1,186 @@
+#as:
+#objdump: -d
+#skip: loongarch32-*-*
+
+.*: file format .*
+
+
+Disassembly of section .text:
+
+0+ <.*>:
+ 0: 00000820 movgr2scr \$scr0, \$ra
+ 4: 00000c20 movscr2gr \$zero, \$scr1
+ 8: 48006600 jiscr0 100
+ c: 48006700 jiscr1 100
+ 10: 00290420 addu12i.w \$zero, \$ra, 1
+ 14: 00298420 addu12i.d \$zero, \$ra, 1
+ 18: 00300820 adc.b \$zero, \$ra, \$tp
+ 1c: 00308820 adc.h \$zero, \$ra, \$tp
+ 20: 00310820 adc.w \$zero, \$ra, \$tp
+ 24: 00318820 adc.d \$zero, \$ra, \$tp
+ 28: 00320820 sbc.b \$zero, \$ra, \$tp
+ 2c: 00328820 sbc.h \$zero, \$ra, \$tp
+ 30: 00330820 sbc.w \$zero, \$ra, \$tp
+ 34: 00338820 sbc.d \$zero, \$ra, \$tp
+ 38: 001a0820 rotr.b \$zero, \$ra, \$tp
+ 3c: 001a8820 rotr.h \$zero, \$ra, \$tp
+ 40: 004c2420 rotri.b \$zero, \$ra, 0x1
+ 44: 004c4420 rotri.h \$zero, \$ra, 0x1
+ 48: 00340820 rcr.b \$zero, \$ra, \$tp
+ 4c: 00348820 rcr.h \$zero, \$ra, \$tp
+ 50: 00350820 rcr.w \$zero, \$ra, \$tp
+ 54: 00358820 rcr.d \$zero, \$ra, \$tp
+ 58: 00502420 rcri.b \$zero, \$ra, 0x1
+ 5c: 00504420 rcri.h \$zero, \$ra, 0x1
+ 60: 00508420 rcri.w \$zero, \$ra, 0x1
+ 64: 00510420 rcri.d \$zero, \$ra, 0x1
+ 68: 0114e420 fcvt.ud.d \$fa0, \$fa1
+ 6c: 0114e020 fcvt.ld.d \$fa0, \$fa1
+ 70: 01150820 fcvt.d.ld \$fa0, \$fa1, \$fa2
+ 74: 2e800420 ldl.d \$zero, \$ra, 1
+ 78: 2e000420 ldl.w \$zero, \$ra, 1
+ 7c: 2e400420 ldr.w \$zero, \$ra, 1
+ 80: 2ec00420 ldr.d \$zero, \$ra, 1
+ 84: 2f000420 stl.w \$zero, \$ra, 1
+ 88: 2f800420 stl.d \$zero, \$ra, 1
+ 8c: 2f400420 str.w \$zero, \$ra, 1
+ 90: 2fc00420 str.d \$zero, \$ra, 1
+ 94: 003f040c x86adc.b \$zero, \$ra
+ 98: 003f040d x86adc.h \$zero, \$ra
+ 9c: 003f040e x86adc.w \$zero, \$ra
+ a0: 003f040f x86adc.d \$zero, \$ra
+ a4: 003f0404 x86add.b \$zero, \$ra
+ a8: 003f0405 x86add.h \$zero, \$ra
+ ac: 003f0406 x86add.w \$zero, \$ra
+ b0: 003f0407 x86add.d \$zero, \$ra
+ b4: 003f0400 x86add.wu \$zero, \$ra
+ b8: 003f0401 x86add.du \$zero, \$ra
+ bc: 00008000 x86inc.b \$zero
+ c0: 00008001 x86inc.h \$zero
+ c4: 00008002 x86inc.w \$zero
+ c8: 00008003 x86inc.d \$zero
+ cc: 003f0410 x86sbc.b \$zero, \$ra
+ d0: 003f0411 x86sbc.h \$zero, \$ra
+ d4: 003f0412 x86sbc.w \$zero, \$ra
+ d8: 003f0413 x86sbc.d \$zero, \$ra
+ dc: 003f0408 x86sub.b \$zero, \$ra
+ e0: 003f0409 x86sub.h \$zero, \$ra
+ e4: 003f040a x86sub.w \$zero, \$ra
+ e8: 003f040b x86sub.d \$zero, \$ra
+ ec: 003f0402 x86sub.wu \$zero, \$ra
+ f0: 003f0403 x86sub.du \$zero, \$ra
+ f4: 00008004 x86dec.b \$zero
+ f8: 00008005 x86dec.h \$zero
+ fc: 00008006 x86dec.w \$zero
+ 100: 00008007 x86dec.d \$zero
+ 104: 003f8410 x86and.b \$zero, \$ra
+ 108: 003f8411 x86and.h \$zero, \$ra
+ 10c: 003f8412 x86and.w \$zero, \$ra
+ 110: 003f8413 x86and.d \$zero, \$ra
+ 114: 003f8414 x86or.b \$zero, \$ra
+ 118: 003f8415 x86or.h \$zero, \$ra
+ 11c: 003f8416 x86or.w \$zero, \$ra
+ 120: 003f8417 x86or.d \$zero, \$ra
+ 124: 003f8418 x86xor.b \$zero, \$ra
+ 128: 003f8419 x86xor.h \$zero, \$ra
+ 12c: 003f841a x86xor.w \$zero, \$ra
+ 130: 003f841b x86xor.d \$zero, \$ra
+ 134: 003e8400 x86mul.b \$zero, \$ra
+ 138: 003e8401 x86mul.h \$zero, \$ra
+ 13c: 003e8402 x86mul.w \$zero, \$ra
+ 140: 003e8403 x86mul.d \$zero, \$ra
+ 144: 003e8404 x86mul.bu \$zero, \$ra
+ 148: 003e8405 x86mul.hu \$zero, \$ra
+ 14c: 003e8406 x86mul.wu \$zero, \$ra
+ 150: 003e8407 x86mul.du \$zero, \$ra
+ 154: 003f840c x86rcl.b \$zero, \$ra
+ 158: 003f840d x86rcl.h \$zero, \$ra
+ 15c: 003f840e x86rcl.w \$zero, \$ra
+ 160: 003f840f x86rcl.d \$zero, \$ra
+ 164: 00542418 x86rcli.b \$zero, 0x1
+ 168: 00544419 x86rcli.h \$zero, 0x1
+ 16c: 0054841a x86rcli.w \$zero, 0x1
+ 170: 0055041b x86rcli.d \$zero, 0x1
+ 174: 003f8408 x86rcr.b \$zero, \$ra
+ 178: 003f8409 x86rcr.h \$zero, \$ra
+ 17c: 003f840a x86rcr.w \$zero, \$ra
+ 180: 003f840b x86rcr.d \$zero, \$ra
+ 184: 00542410 x86rcri.b \$zero, 0x1
+ 188: 00544411 x86rcri.h \$zero, 0x1
+ 18c: 00548412 x86rcri.w \$zero, 0x1
+ 190: 00550413 x86rcri.d \$zero, 0x1
+ 194: 003f8404 x86rotl.b \$zero, \$ra
+ 198: 003f8405 x86rotl.h \$zero, \$ra
+ 19c: 003f8406 x86rotl.w \$zero, \$ra
+ 1a0: 003f8407 x86rotl.d \$zero, \$ra
+ 1a4: 00542414 x86rotli.b \$zero, 0x1
+ 1a8: 00544415 x86rotli.h \$zero, 0x1
+ 1ac: 00548416 x86rotli.w \$zero, 0x1
+ 1b0: 00550417 x86rotli.d \$zero, 0x1
+ 1b4: 003f8400 x86rotr.b \$zero, \$ra
+ 1b8: 003f8401 x86rotr.h \$zero, \$ra
+ 1bc: 003f8402 x86rotr.d \$zero, \$ra
+ 1c0: 003f8403 x86rotr.w \$zero, \$ra
+ 1c4: 0054240c x86rotri.b \$zero, 0x1
+ 1c8: 0054440d x86rotri.h \$zero, 0x1
+ 1cc: 0054840e x86rotri.w \$zero, 0x1
+ 1d0: 0055040f x86rotri.d \$zero, 0x1
+ 1d4: 003f0414 x86sll.b \$zero, \$ra
+ 1d8: 003f0415 x86sll.h \$zero, \$ra
+ 1dc: 003f0416 x86sll.w \$zero, \$ra
+ 1e0: 003f0417 x86sll.d \$zero, \$ra
+ 1e4: 00542400 x86slli.b \$zero, 0x1
+ 1e8: 00544401 x86slli.h \$zero, 0x1
+ 1ec: 00548402 x86slli.w \$zero, 0x1
+ 1f0: 00550403 x86slli.d \$zero, 0x1
+ 1f4: 003f0418 x86srl.b \$zero, \$ra
+ 1f8: 003f0419 x86srl.h \$zero, \$ra
+ 1fc: 003f041a x86srl.w \$zero, \$ra
+ 200: 003f041b x86srl.d \$zero, \$ra
+ 204: 00542404 x86srli.b \$zero, 0x1
+ 208: 00544405 x86srli.h \$zero, 0x1
+ 20c: 00548406 x86srli.w \$zero, 0x1
+ 210: 00550407 x86srli.d \$zero, 0x1
+ 214: 003f041c x86sra.b \$zero, \$ra
+ 218: 003f041d x86sra.h \$zero, \$ra
+ 21c: 003f041e x86sra.w \$zero, \$ra
+ 220: 003f041f x86sra.d \$zero, \$ra
+ 224: 00542408 x86srai.b \$zero, 0x1
+ 228: 00544409 x86srai.h \$zero, 0x1
+ 22c: 0054840a x86srai.w \$zero, 0x1
+ 230: 0055040b x86srai.d \$zero, 0x1
+ 234: 00368400 setx86j \$zero, 0x1
+ 238: 00007820 setx86loope \$zero, \$ra
+ 23c: 00007c20 setx86loopne \$zero, \$ra
+ 240: 005c0400 x86mfflag \$zero, 0x1
+ 244: 005c0420 x86mtflag \$zero, 0x1
+ 248: 00007400 x86mftop \$zero
+ 24c: 00007020 x86mttop 0x1
+ 250: 00008009 x86inctop
+ 254: 00008029 x86dectop
+ 258: 00008008 x86settm
+ 25c: 00008028 x86clrtm
+ 260: 00580420 x86settag \$zero, 0x1, 0x1
+ 264: 00370411 armadd.w \$zero, \$ra, 0x1
+ 268: 00378411 armsub.w \$zero, \$ra, 0x1
+ 26c: 00380411 armadc.w \$zero, \$ra, 0x1
+ 270: 00388411 armsbc.w \$zero, \$ra, 0x1
+ 274: 00390411 armand.w \$zero, \$ra, 0x1
+ 278: 00398411 armor.w \$zero, \$ra, 0x1
+ 27c: 003a0411 armxor.w \$zero, \$ra, 0x1
+ 280: 003fc41c armnot.w \$zero, 0x1
+ 284: 003a8411 armsll.w \$zero, \$ra, 0x1
+ 288: 003b0411 armsrl.w \$zero, \$ra, 0x1
+ 28c: 003b8411 armsra.w \$zero, \$ra, 0x1
+ 290: 003c0411 armrotr.w \$zero, \$ra, 0x1
+ 294: 003c8411 armslli.w \$zero, 0x1, 0x1
+ 298: 003d0411 armsrli.w \$zero, 0x1, 0x1
+ 29c: 003d8411 armsrai.w \$zero, 0x1, 0x1
+ 2a0: 003e0411 armrotri.w \$zero, 0x1, 0x1
+ 2a4: 003fc41f armrrx.w \$zero, 0x1
+ 2a8: 00364420 armmove \$zero, \$ra, 0x1
+ 2ac: 003fc41d armmov.w \$zero, 0x1
+ 2b0: 003fc41e armmov.d \$zero, 0x1
+ 2b4: 005c0440 armmfflag \$zero, 0x1
+ 2b8: 005c0460 armmtflag \$zero, 0x1
+ 2bc: 0036c400 setarmj \$zero, 0x1
diff --git a/gas/testsuite/gas/loongarch/insn_lbt.s b/gas/testsuite/gas/loongarch/insn_lbt.s
new file mode 100644
index 00000000000..e49453c0dfc
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lbt.s
@@ -0,0 +1,176 @@
+movgr2scr $scr0, $r1
+movscr2gr $r0, $scr1
+jiscr0 100
+jiscr1 100
+addu12i.w $r0, $r1, 1
+addu12i.d $r0, $r1, 1
+adc.b $r0, $r1, $r2
+adc.h $r0, $r1, $r2
+adc.w $r0, $r1, $r2
+adc.d $r0, $r1, $r2
+sbc.b $r0, $r1, $r2
+sbc.h $r0, $r1, $r2
+sbc.w $r0, $r1, $r2
+sbc.d $r0, $r1, $r2
+rotr.b $r0, $r1, $r2
+rotr.h $r0, $r1, $r2
+rotri.b $r0, $r1, 1
+rotri.h $r0, $r1, 1
+rcr.b $r0, $r1, $r2
+rcr.h $r0, $r1, $r2
+rcr.w $r0, $r1, $r2
+rcr.d $r0, $r1, $r2
+rcri.b $r0, $r1, 1
+rcri.h $r0, $r1, 1
+rcri.w $r0, $r1, 1
+rcri.d $r0, $r1, 1
+fcvt.ud.d $f0, $f1
+fcvt.ld.d $f0, $f1
+fcvt.d.ld $f0, $f1, $f2
+ldl.d $r0, $r1, 1
+ldl.w $r0, $r1, 1
+ldr.w $r0, $r1, 1
+ldr.d $r0, $r1, 1
+stl.w $r0, $r1, 1
+stl.d $r0, $r1, 1
+str.w $r0, $r1, 1
+str.d $r0, $r1, 1
+x86adc.b $r0, $r1
+x86adc.h $r0, $r1
+x86adc.w $r0, $r1
+x86adc.d $r0, $r1
+x86add.b $r0, $r1
+x86add.h $r0, $r1
+x86add.w $r0, $r1
+x86add.d $r0, $r1
+x86add.wu $r0, $r1
+x86add.du $r0, $r1
+x86inc.b $r0
+x86inc.h $r0
+x86inc.w $r0
+x86inc.d $r0
+x86sbc.b $r0, $r1
+x86sbc.h $r0, $r1
+x86sbc.w $r0, $r1
+x86sbc.d $r0, $r1
+x86sub.b $r0, $r1
+x86sub.h $r0, $r1
+x86sub.w $r0, $r1
+x86sub.d $r0, $r1
+x86sub.wu $r0, $r1
+x86sub.du $r0, $r1
+x86dec.b $r0
+x86dec.h $r0
+x86dec.w $r0
+x86dec.d $r0
+x86and.b $r0, $r1
+x86and.h $r0, $r1
+x86and.w $r0, $r1
+x86and.d $r0, $r1
+x86or.b $r0, $r1
+x86or.h $r0, $r1
+x86or.w $r0, $r1
+x86or.d $r0, $r1
+x86xor.b $r0, $r1
+x86xor.h $r0, $r1
+x86xor.w $r0, $r1
+x86xor.d $r0, $r1
+x86mul.b $r0, $r1
+x86mul.h $r0, $r1
+x86mul.w $r0, $r1
+x86mul.d $r0, $r1
+x86mul.bu $r0, $r1
+x86mul.hu $r0, $r1
+x86mul.wu $r0, $r1
+x86mul.du $r0, $r1
+x86rcl.b $r0, $r1
+x86rcl.h $r0, $r1
+x86rcl.w $r0, $r1
+x86rcl.d $r0, $r1
+x86rcli.b $r0, 1
+x86rcli.h $r0, 1
+x86rcli.w $r0, 1
+x86rcli.d $r0, 1
+x86rcr.b $r0, $r1
+x86rcr.h $r0, $r1
+x86rcr.w $r0, $r1
+x86rcr.d $r0, $r1
+x86rcri.b $r0, 1
+x86rcri.h $r0, 1
+x86rcri.w $r0, 1
+x86rcri.d $r0, 1
+x86rotl.b $r0, $r1
+x86rotl.h $r0, $r1
+x86rotl.w $r0, $r1
+x86rotl.d $r0, $r1
+x86rotli.b $r0, 1
+x86rotli.h $r0, 1
+x86rotli.w $r0, 1
+x86rotli.d $r0, 1
+x86rotr.b $r0, $r1
+x86rotr.h $r0, $r1
+x86rotr.d $r0, $r1
+x86rotr.w $r0, $r1
+x86rotri.b $r0, 1
+x86rotri.h $r0, 1
+x86rotri.w $r0, 1
+x86rotri.d $r0, 1
+x86sll.b $r0, $r1
+x86sll.h $r0, $r1
+x86sll.w $r0, $r1
+x86sll.d $r0, $r1
+x86slli.b $r0, 1
+x86slli.h $r0, 1
+x86slli.w $r0, 1
+x86slli.d $r0, 1
+x86srl.b $r0, $r1
+x86srl.h $r0, $r1
+x86srl.w $r0, $r1
+x86srl.d $r0, $r1
+x86srli.b $r0, 1
+x86srli.h $r0, 1
+x86srli.w $r0, 1
+x86srli.d $r0, 1
+x86sra.b $r0, $r1
+x86sra.h $r0, $r1
+x86sra.w $r0, $r1
+x86sra.d $r0, $r1
+x86srai.b $r0, 1
+x86srai.h $r0, 1
+x86srai.w $r0, 1
+x86srai.d $r0, 1
+setx86j $r0, 1
+setx86loope $r0, $r1
+setx86loopne $r0, $r1
+x86mfflag $r0, 1
+x86mtflag $r0, 1
+x86mftop $r0
+x86mttop 1
+x86inctop
+x86dectop
+x86settm
+x86clrtm
+x86settag $r0, 1, 1
+armadd.w $r0, $r1, 1
+armsub.w $r0, $r1, 1
+armadc.w $r0, $r1, 1
+armsbc.w $r0, $r1, 1
+armand.w $r0, $r1, 1
+armor.w $r0, $r1, 1
+armxor.w $r0, $r1, 1
+armnot.w $r0, 1
+armsll.w $r0, $r1, 1
+armsrl.w $r0, $r1, 1
+armsra.w $r0, $r1, 1
+armrotr.w $r0, $r1, 1
+armslli.w $r0, 1, 1
+armsrli.w $r0, 1, 1
+armsrai.w $r0, 1, 1
+armrotri.w $r0, 1, 1
+armrrx.w $r0, 1
+armmove $r0, $r1, 1
+armmov.w $r0, 1
+armmov.d $r0, 1
+armmfflag $r0, 1
+armmtflag $r0, 1
+setarmj $r0, 1
diff --git a/gas/testsuite/gas/loongarch/insn_lvz.d b/gas/testsuite/gas/loongarch/insn_lvz.d
new file mode 100644
index 00000000000..547091ed3b3
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lvz.d
@@ -0,0 +1,15 @@
+#as:
+#objdump: -d
+#skip: loongarch32-*-*
+
+.*: file format .*
+
+
+Disassembly of section .text:
+
+0+ <.*>:
+ 0: 05000400 gcsrrd \$zero, 0x1
+ 4: 05000420 gcsrwr \$zero, 0x1
+ 8: 05000483 gcsrxchg \$sp, \$a0, 0x1
+ c: 06482401 gtlbflush
+ 10: 002b8001 hvcl 0x1
diff --git a/gas/testsuite/gas/loongarch/insn_lvz.s b/gas/testsuite/gas/loongarch/insn_lvz.s
new file mode 100644
index 00000000000..1b1a594064d
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lvz.s
@@ -0,0 +1,5 @@
+gcsrrd $r0, 1
+gcsrwr $r0, 1
+gcsrxchg $r3, $r4, 1
+gtlbflush
+hvcl 1
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v1 3/7] LoongArch: Add gas testsuit for lsx/lasx instructions
2024-02-29 11:45 [PATCH v1 0/7] Organize instructions and relocations test cases in gas Lulu Cai
2024-02-29 11:45 ` [PATCH v1 1/7] LoongArch: Add gas testsuit for alias instructions Lulu Cai
2024-02-29 11:45 ` [PATCH v1 2/7] LoongArch: Add gas testsuit for lbt/lvz instructions Lulu Cai
@ 2024-02-29 11:45 ` Lulu Cai
2024-02-29 11:45 ` [PATCH v1 4/7] LoongArch: Add gas testsuit for LA64 int/float instructions Lulu Cai
3 siblings, 0 replies; 5+ messages in thread
From: Lulu Cai @ 2024-02-29 11:45 UTC (permalink / raw)
To: binutils
Cc: xuchenghua, chenglulu, liuzhensong, mengqinggang, xry111,
i.swmail, maskray, luweining, wanglei, hejinyang, Lulu Cai
Test the LSX/LASX instructions. Only LA64 supports
these instructions.
---
gas/testsuite/gas/loongarch/insn_lasx.d | 737 +++++++++++++++++++++++
gas/testsuite/gas/loongarch/insn_lasx.s | 727 +++++++++++++++++++++++
gas/testsuite/gas/loongarch/insn_lsx.d | 742 ++++++++++++++++++++++++
gas/testsuite/gas/loongarch/insn_lsx.s | 732 +++++++++++++++++++++++
4 files changed, 2938 insertions(+)
create mode 100644 gas/testsuite/gas/loongarch/insn_lasx.d
create mode 100644 gas/testsuite/gas/loongarch/insn_lasx.s
create mode 100644 gas/testsuite/gas/loongarch/insn_lsx.d
create mode 100644 gas/testsuite/gas/loongarch/insn_lsx.s
diff --git a/gas/testsuite/gas/loongarch/insn_lasx.d b/gas/testsuite/gas/loongarch/insn_lasx.d
new file mode 100644
index 00000000000..74742b5f7d9
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lasx.d
@@ -0,0 +1,737 @@
+#as:
+#objdump: -d
+#skip: loongarch32-*-*
+
+.*: file format .*
+
+
+Disassembly of section .text:
+
+0+ <.*>:
+ 0: 0a118820 xvfmadd.s \$xr0, \$xr1, \$xr2, \$xr3
+ 4: 0a518820 xvfmsub.s \$xr0, \$xr1, \$xr2, \$xr3
+ 8: 0a918820 xvfnmadd.s \$xr0, \$xr1, \$xr2, \$xr3
+ c: 0ad18820 xvfnmsub.s \$xr0, \$xr1, \$xr2, \$xr3
+ 10: 0c900820 xvfcmp.caf.s \$xr0, \$xr1, \$xr2
+ 14: 0c908820 xvfcmp.saf.s \$xr0, \$xr1, \$xr2
+ 18: 0c910820 xvfcmp.clt.s \$xr0, \$xr1, \$xr2
+ 1c: 0c918820 xvfcmp.slt.s \$xr0, \$xr1, \$xr2
+ 20: 0c920820 xvfcmp.ceq.s \$xr0, \$xr1, \$xr2
+ 24: 0c928820 xvfcmp.seq.s \$xr0, \$xr1, \$xr2
+ 28: 0c930820 xvfcmp.cle.s \$xr0, \$xr1, \$xr2
+ 2c: 0c938820 xvfcmp.sle.s \$xr0, \$xr1, \$xr2
+ 30: 0c940820 xvfcmp.cun.s \$xr0, \$xr1, \$xr2
+ 34: 0c948820 xvfcmp.sun.s \$xr0, \$xr1, \$xr2
+ 38: 0c950820 xvfcmp.cult.s \$xr0, \$xr1, \$xr2
+ 3c: 0c958820 xvfcmp.sult.s \$xr0, \$xr1, \$xr2
+ 40: 0c960820 xvfcmp.cueq.s \$xr0, \$xr1, \$xr2
+ 44: 0c968820 xvfcmp.sueq.s \$xr0, \$xr1, \$xr2
+ 48: 0c970820 xvfcmp.cule.s \$xr0, \$xr1, \$xr2
+ 4c: 0c978820 xvfcmp.sule.s \$xr0, \$xr1, \$xr2
+ 50: 0c980820 xvfcmp.cne.s \$xr0, \$xr1, \$xr2
+ 54: 0c988820 xvfcmp.sne.s \$xr0, \$xr1, \$xr2
+ 58: 0c9a0820 xvfcmp.cor.s \$xr0, \$xr1, \$xr2
+ 5c: 0c9a8820 xvfcmp.sor.s \$xr0, \$xr1, \$xr2
+ 60: 0c9c0820 xvfcmp.cune.s \$xr0, \$xr1, \$xr2
+ 64: 0c9c8820 xvfcmp.sune.s \$xr0, \$xr1, \$xr2
+ 68: 0d218820 xvbitsel.v \$xr0, \$xr1, \$xr2, \$xr3
+ 6c: 0d618820 xvshuf.b \$xr0, \$xr1, \$xr2, \$xr3
+ 70: 0a218820 xvfmadd.d \$xr0, \$xr1, \$xr2, \$xr3
+ 74: 0a618820 xvfmsub.d \$xr0, \$xr1, \$xr2, \$xr3
+ 78: 0aa18820 xvfnmadd.d \$xr0, \$xr1, \$xr2, \$xr3
+ 7c: 0ae18820 xvfnmsub.d \$xr0, \$xr1, \$xr2, \$xr3
+ 80: 0ca00820 xvfcmp.caf.d \$xr0, \$xr1, \$xr2
+ 84: 0ca08820 xvfcmp.saf.d \$xr0, \$xr1, \$xr2
+ 88: 0ca10820 xvfcmp.clt.d \$xr0, \$xr1, \$xr2
+ 8c: 0ca18820 xvfcmp.slt.d \$xr0, \$xr1, \$xr2
+ 90: 0ca20820 xvfcmp.ceq.d \$xr0, \$xr1, \$xr2
+ 94: 0ca28820 xvfcmp.seq.d \$xr0, \$xr1, \$xr2
+ 98: 0ca30820 xvfcmp.cle.d \$xr0, \$xr1, \$xr2
+ 9c: 0ca38820 xvfcmp.sle.d \$xr0, \$xr1, \$xr2
+ a0: 0ca40820 xvfcmp.cun.d \$xr0, \$xr1, \$xr2
+ a4: 0ca48820 xvfcmp.sun.d \$xr0, \$xr1, \$xr2
+ a8: 0ca50820 xvfcmp.cult.d \$xr0, \$xr1, \$xr2
+ ac: 0ca58820 xvfcmp.sult.d \$xr0, \$xr1, \$xr2
+ b0: 0ca60820 xvfcmp.cueq.d \$xr0, \$xr1, \$xr2
+ b4: 0ca68820 xvfcmp.sueq.d \$xr0, \$xr1, \$xr2
+ b8: 0ca70820 xvfcmp.cule.d \$xr0, \$xr1, \$xr2
+ bc: 0ca78820 xvfcmp.sule.d \$xr0, \$xr1, \$xr2
+ c0: 0ca80820 xvfcmp.cne.d \$xr0, \$xr1, \$xr2
+ c4: 0ca88820 xvfcmp.sne.d \$xr0, \$xr1, \$xr2
+ c8: 0caa0820 xvfcmp.cor.d \$xr0, \$xr1, \$xr2
+ cc: 0caa8820 xvfcmp.sor.d \$xr0, \$xr1, \$xr2
+ d0: 0cac0820 xvfcmp.cune.d \$xr0, \$xr1, \$xr2
+ d4: 0cac8820 xvfcmp.sune.d \$xr0, \$xr1, \$xr2
+ d8: 2c800420 xvld \$xr0, \$ra, 1
+ dc: 2cc00420 xvst \$xr0, \$ra, 1
+ e0: 38480820 xvldx \$xr0, \$ra, \$tp
+ e4: 384c0820 xvstx \$xr0, \$ra, \$tp
+ e8: 3211f420 xvldrepl.d \$xr0, \$ra, 1000
+ ec: 32206420 xvldrepl.w \$xr0, \$ra, 100
+ f0: 32401420 xvldrepl.h \$xr0, \$ra, 10
+ f4: 32800420 xvldrepl.b \$xr0, \$ra, 1
+ f8: 3315f420 xvstelm.d \$xr0, \$ra, 1000, 0x1
+ fc: 33246420 xvstelm.w \$xr0, \$ra, 100, 0x1
+ 100: 33441420 xvstelm.h \$xr0, \$ra, 10, 0x1
+ 104: 33840420 xvstelm.b \$xr0, \$ra, 1, 0x1
+ 108: 74000820 xvseq.b \$xr0, \$xr1, \$xr2
+ 10c: 74008820 xvseq.h \$xr0, \$xr1, \$xr2
+ 110: 74010820 xvseq.w \$xr0, \$xr1, \$xr2
+ 114: 74018820 xvseq.d \$xr0, \$xr1, \$xr2
+ 118: 74020820 xvsle.b \$xr0, \$xr1, \$xr2
+ 11c: 74028820 xvsle.h \$xr0, \$xr1, \$xr2
+ 120: 74030820 xvsle.w \$xr0, \$xr1, \$xr2
+ 124: 74038820 xvsle.d \$xr0, \$xr1, \$xr2
+ 128: 74040820 xvsle.bu \$xr0, \$xr1, \$xr2
+ 12c: 74048820 xvsle.hu \$xr0, \$xr1, \$xr2
+ 130: 74050820 xvsle.wu \$xr0, \$xr1, \$xr2
+ 134: 74058820 xvsle.du \$xr0, \$xr1, \$xr2
+ 138: 74060820 xvslt.b \$xr0, \$xr1, \$xr2
+ 13c: 74068820 xvslt.h \$xr0, \$xr1, \$xr2
+ 140: 74070820 xvslt.w \$xr0, \$xr1, \$xr2
+ 144: 74078820 xvslt.d \$xr0, \$xr1, \$xr2
+ 148: 74080820 xvslt.bu \$xr0, \$xr1, \$xr2
+ 14c: 74088820 xvslt.hu \$xr0, \$xr1, \$xr2
+ 150: 74090820 xvslt.wu \$xr0, \$xr1, \$xr2
+ 154: 74098820 xvslt.du \$xr0, \$xr1, \$xr2
+ 158: 740a0820 xvadd.b \$xr0, \$xr1, \$xr2
+ 15c: 740a8820 xvadd.h \$xr0, \$xr1, \$xr2
+ 160: 740b0820 xvadd.w \$xr0, \$xr1, \$xr2
+ 164: 740b8820 xvadd.d \$xr0, \$xr1, \$xr2
+ 168: 740c0820 xvsub.b \$xr0, \$xr1, \$xr2
+ 16c: 740c8820 xvsub.h \$xr0, \$xr1, \$xr2
+ 170: 740d0820 xvsub.w \$xr0, \$xr1, \$xr2
+ 174: 740d8820 xvsub.d \$xr0, \$xr1, \$xr2
+ 178: 74460820 xvsadd.b \$xr0, \$xr1, \$xr2
+ 17c: 74468820 xvsadd.h \$xr0, \$xr1, \$xr2
+ 180: 74470820 xvsadd.w \$xr0, \$xr1, \$xr2
+ 184: 74478820 xvsadd.d \$xr0, \$xr1, \$xr2
+ 188: 74480820 xvssub.b \$xr0, \$xr1, \$xr2
+ 18c: 74488820 xvssub.h \$xr0, \$xr1, \$xr2
+ 190: 74490820 xvssub.w \$xr0, \$xr1, \$xr2
+ 194: 74498820 xvssub.d \$xr0, \$xr1, \$xr2
+ 198: 744a0820 xvsadd.bu \$xr0, \$xr1, \$xr2
+ 19c: 744a8820 xvsadd.hu \$xr0, \$xr1, \$xr2
+ 1a0: 744b0820 xvsadd.wu \$xr0, \$xr1, \$xr2
+ 1a4: 744b8820 xvsadd.du \$xr0, \$xr1, \$xr2
+ 1a8: 744c0820 xvssub.bu \$xr0, \$xr1, \$xr2
+ 1ac: 744c8820 xvssub.hu \$xr0, \$xr1, \$xr2
+ 1b0: 744d0820 xvssub.wu \$xr0, \$xr1, \$xr2
+ 1b4: 744d8820 xvssub.du \$xr0, \$xr1, \$xr2
+ 1b8: 74540820 xvhaddw.h.b \$xr0, \$xr1, \$xr2
+ 1bc: 74548820 xvhaddw.w.h \$xr0, \$xr1, \$xr2
+ 1c0: 74550820 xvhaddw.d.w \$xr0, \$xr1, \$xr2
+ 1c4: 74558820 xvhaddw.q.d \$xr0, \$xr1, \$xr2
+ 1c8: 74560820 xvhsubw.h.b \$xr0, \$xr1, \$xr2
+ 1cc: 74568820 xvhsubw.w.h \$xr0, \$xr1, \$xr2
+ 1d0: 74570820 xvhsubw.d.w \$xr0, \$xr1, \$xr2
+ 1d4: 74578820 xvhsubw.q.d \$xr0, \$xr1, \$xr2
+ 1d8: 74580820 xvhaddw.hu.bu \$xr0, \$xr1, \$xr2
+ 1dc: 74588820 xvhaddw.wu.hu \$xr0, \$xr1, \$xr2
+ 1e0: 74590820 xvhaddw.du.wu \$xr0, \$xr1, \$xr2
+ 1e4: 74598820 xvhaddw.qu.du \$xr0, \$xr1, \$xr2
+ 1e8: 745a0820 xvhsubw.hu.bu \$xr0, \$xr1, \$xr2
+ 1ec: 745a8820 xvhsubw.wu.hu \$xr0, \$xr1, \$xr2
+ 1f0: 745b0820 xvhsubw.du.wu \$xr0, \$xr1, \$xr2
+ 1f4: 745b8820 xvhsubw.qu.du \$xr0, \$xr1, \$xr2
+ 1f8: 741e0820 xvaddwev.h.b \$xr0, \$xr1, \$xr2
+ 1fc: 741e8820 xvaddwev.w.h \$xr0, \$xr1, \$xr2
+ 200: 741f0820 xvaddwev.d.w \$xr0, \$xr1, \$xr2
+ 204: 741f8820 xvaddwev.q.d \$xr0, \$xr1, \$xr2
+ 208: 742e0820 xvaddwev.h.bu \$xr0, \$xr1, \$xr2
+ 20c: 742e8820 xvaddwev.w.hu \$xr0, \$xr1, \$xr2
+ 210: 742f0820 xvaddwev.d.wu \$xr0, \$xr1, \$xr2
+ 214: 742f8820 xvaddwev.q.du \$xr0, \$xr1, \$xr2
+ 218: 743e0820 xvaddwev.h.bu.b \$xr0, \$xr1, \$xr2
+ 21c: 743e8820 xvaddwev.w.hu.h \$xr0, \$xr1, \$xr2
+ 220: 743f0820 xvaddwev.d.wu.w \$xr0, \$xr1, \$xr2
+ 224: 743f8820 xvaddwev.q.du.d \$xr0, \$xr1, \$xr2
+ 228: 74220820 xvaddwod.h.b \$xr0, \$xr1, \$xr2
+ 22c: 74228820 xvaddwod.w.h \$xr0, \$xr1, \$xr2
+ 230: 74230820 xvaddwod.d.w \$xr0, \$xr1, \$xr2
+ 234: 74238820 xvaddwod.q.d \$xr0, \$xr1, \$xr2
+ 238: 74320820 xvaddwod.h.bu \$xr0, \$xr1, \$xr2
+ 23c: 74328820 xvaddwod.w.hu \$xr0, \$xr1, \$xr2
+ 240: 74330820 xvaddwod.d.wu \$xr0, \$xr1, \$xr2
+ 244: 74338820 xvaddwod.q.du \$xr0, \$xr1, \$xr2
+ 248: 74400820 xvaddwod.h.bu.b \$xr0, \$xr1, \$xr2
+ 24c: 74408820 xvaddwod.w.hu.h \$xr0, \$xr1, \$xr2
+ 250: 74410820 xvaddwod.d.wu.w \$xr0, \$xr1, \$xr2
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+ 67c: 753b0820 xvfdiv.d \$xr0, \$xr1, \$xr2
+ 680: 753c8820 xvfmax.s \$xr0, \$xr1, \$xr2
+ 684: 753d0820 xvfmax.d \$xr0, \$xr1, \$xr2
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+ 694: 75410820 xvfmaxa.d \$xr0, \$xr1, \$xr2
+ 698: 75428820 xvfmina.s \$xr0, \$xr1, \$xr2
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+ 6f4: 76848420 xvslei.hu \$xr0, \$xr1, 0x1
+ 6f8: 76850420 xvslei.wu \$xr0, \$xr1, 0x1
+ 6fc: 76858420 xvslei.du \$xr0, \$xr1, 0x1
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+ 718: 76890420 xvslti.wu \$xr0, \$xr1, 0x1
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+ 724: 768a8420 xvaddi.hu \$xr0, \$xr1, 0x1
+ 728: 768b0420 xvaddi.wu \$xr0, \$xr1, 0x1
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+ 730: 768c0420 xvsubi.bu \$xr0, \$xr1, 0x1
+ 734: 768c8420 xvsubi.hu \$xr0, \$xr1, 0x1
+ 738: 768d0420 xvsubi.wu \$xr0, \$xr1, 0x1
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+ 780: 76970420 xvmini.wu \$xr0, \$xr1, 0x1
+ 784: 76978420 xvmini.du \$xr0, \$xr1, 0x1
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diff --git a/gas/testsuite/gas/loongarch/insn_lasx.s b/gas/testsuite/gas/loongarch/insn_lasx.s
new file mode 100644
index 00000000000..75bed9cdbc1
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lasx.s
@@ -0,0 +1,727 @@
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+xvssrlni.wu.d $xr0, $xr1, 1
+xvssrlni.du.q $xr0, $xr1, 1
+xvssrlrni.b.h $xr0, $xr1, 1
+xvssrlrni.h.w $xr0, $xr1, 1
+xvssrlrni.w.d $xr0, $xr1, 1
+xvssrlrni.d.q $xr0, $xr1, 1
+xvssrlrni.bu.h $xr0, $xr1, 1
+xvssrlrni.hu.w $xr0, $xr1, 1
+xvssrlrni.wu.d $xr0, $xr1, 1
+xvssrlrni.du.q $xr0, $xr1, 1
+xvsrani.b.h $xr0, $xr1, 1
+xvsrani.h.w $xr0, $xr1, 1
+xvsrani.w.d $xr0, $xr1, 1
+xvsrani.d.q $xr0, $xr1, 1
+xvsrarni.b.h $xr0, $xr1, 1
+xvsrarni.h.w $xr0, $xr1, 1
+xvsrarni.w.d $xr0, $xr1, 1
+xvsrarni.d.q $xr0, $xr1, 1
+xvssrani.b.h $xr0, $xr1, 1
+xvssrani.h.w $xr0, $xr1, 1
+xvssrani.w.d $xr0, $xr1, 1
+xvssrani.d.q $xr0, $xr1, 1
+xvssrani.bu.h $xr0, $xr1, 1
+xvssrani.hu.w $xr0, $xr1, 1
+xvssrani.wu.d $xr0, $xr1, 1
+xvssrani.du.q $xr0, $xr1, 1
+xvssrarni.b.h $xr0, $xr1, 1
+xvssrarni.h.w $xr0, $xr1, 1
+xvssrarni.w.d $xr0, $xr1, 1
+xvssrarni.d.q $xr0, $xr1, 1
+xvssrarni.bu.h $xr0, $xr1, 1
+xvssrarni.hu.w $xr0, $xr1, 1
+xvssrarni.wu.d $xr0, $xr1, 1
+xvssrarni.du.q $xr0, $xr1, 1
+xvextrins.d $xr0, $xr1, 1
+xvextrins.w $xr0, $xr1, 1
+xvextrins.h $xr0, $xr1, 1
+xvextrins.b $xr0, $xr1, 1
+xvshuf4i.b $xr0, $xr1, 1
+xvshuf4i.h $xr0, $xr1, 1
+xvshuf4i.w $xr0, $xr1, 1
+xvshuf4i.d $xr0, $xr1, 1
+xvbitseli.b $xr0, $xr1, 1
+xvandi.b $xr0, $xr1, 1
+xvori.b $xr0, $xr1, 1
+xvxori.b $xr0, $xr1, 1
+xvnori.b $xr0, $xr1, 1
+xvrepli.b $xr0, 1
+xvrepli.d $xr0, 1
+xvrepli.h $xr0, 1
+xvrepli.w $xr0, 1
+xvldi $xr0, 1
+xvpermi.w $xr0, $xr1, 1
+xvpermi.d $xr0, $xr1, 1
+xvpermi.q $xr0, $xr1, 1
+xvfrecipe.s $xr0, $xr1
+xvfrecipe.d $xr0, $xr1
+xvfrsqrte.s $xr0, $xr1
+xvfrsqrte.d $xr0, $xr1
diff --git a/gas/testsuite/gas/loongarch/insn_lsx.d b/gas/testsuite/gas/loongarch/insn_lsx.d
new file mode 100644
index 00000000000..8bf5bb5471e
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lsx.d
@@ -0,0 +1,742 @@
+#as:
+#objdump: -d
+#skip: loongarch32-*-*
+
+.*: file format .*
+
+
+Disassembly of section .text:
+
+0+ <.*>:
+ 0: 09118820 vfmadd.s \$vr0, \$vr1, \$vr2, \$vr3
+ 4: 09518820 vfmsub.s \$vr0, \$vr1, \$vr2, \$vr3
+ 8: 09918820 vfnmadd.s \$vr0, \$vr1, \$vr2, \$vr3
+ c: 09d18820 vfnmsub.s \$vr0, \$vr1, \$vr2, \$vr3
+ 10: 0c500820 vfcmp.caf.s \$vr0, \$vr1, \$vr2
+ 14: 0c508820 vfcmp.saf.s \$vr0, \$vr1, \$vr2
+ 18: 0c510820 vfcmp.clt.s \$vr0, \$vr1, \$vr2
+ 1c: 0c518820 vfcmp.slt.s \$vr0, \$vr1, \$vr2
+ 20: 0c520820 vfcmp.ceq.s \$vr0, \$vr1, \$vr2
+ 24: 0c528820 vfcmp.seq.s \$vr0, \$vr1, \$vr2
+ 28: 0c530820 vfcmp.cle.s \$vr0, \$vr1, \$vr2
+ 2c: 0c538820 vfcmp.sle.s \$vr0, \$vr1, \$vr2
+ 30: 0c540820 vfcmp.cun.s \$vr0, \$vr1, \$vr2
+ 34: 0c548820 vfcmp.sun.s \$vr0, \$vr1, \$vr2
+ 38: 0c550820 vfcmp.cult.s \$vr0, \$vr1, \$vr2
+ 3c: 0c558820 vfcmp.sult.s \$vr0, \$vr1, \$vr2
+ 40: 0c560820 vfcmp.cueq.s \$vr0, \$vr1, \$vr2
+ 44: 0c568820 vfcmp.sueq.s \$vr0, \$vr1, \$vr2
+ 48: 0c570820 vfcmp.cule.s \$vr0, \$vr1, \$vr2
+ 4c: 0c578820 vfcmp.sule.s \$vr0, \$vr1, \$vr2
+ 50: 0c580820 vfcmp.cne.s \$vr0, \$vr1, \$vr2
+ 54: 0c588820 vfcmp.sne.s \$vr0, \$vr1, \$vr2
+ 58: 0c5a0820 vfcmp.cor.s \$vr0, \$vr1, \$vr2
+ 5c: 0c5a8820 vfcmp.sor.s \$vr0, \$vr1, \$vr2
+ 60: 0c5c0820 vfcmp.cune.s \$vr0, \$vr1, \$vr2
+ 64: 0c5c8820 vfcmp.sune.s \$vr0, \$vr1, \$vr2
+ 68: 0d118820 vbitsel.v \$vr0, \$vr1, \$vr2, \$vr3
+ 6c: 0d518820 vshuf.b \$vr0, \$vr1, \$vr2, \$vr3
+ 70: 09218820 vfmadd.d \$vr0, \$vr1, \$vr2, \$vr3
+ 74: 09618820 vfmsub.d \$vr0, \$vr1, \$vr2, \$vr3
+ 78: 09a18820 vfnmadd.d \$vr0, \$vr1, \$vr2, \$vr3
+ 7c: 09e18820 vfnmsub.d \$vr0, \$vr1, \$vr2, \$vr3
+ 80: 0c600820 vfcmp.caf.d \$vr0, \$vr1, \$vr2
+ 84: 0c608820 vfcmp.saf.d \$vr0, \$vr1, \$vr2
+ 88: 0c610820 vfcmp.clt.d \$vr0, \$vr1, \$vr2
+ 8c: 0c618820 vfcmp.slt.d \$vr0, \$vr1, \$vr2
+ 90: 0c620820 vfcmp.ceq.d \$vr0, \$vr1, \$vr2
+ 94: 0c628820 vfcmp.seq.d \$vr0, \$vr1, \$vr2
+ 98: 0c630820 vfcmp.cle.d \$vr0, \$vr1, \$vr2
+ 9c: 0c638820 vfcmp.sle.d \$vr0, \$vr1, \$vr2
+ a0: 0c640820 vfcmp.cun.d \$vr0, \$vr1, \$vr2
+ a4: 0c648820 vfcmp.sun.d \$vr0, \$vr1, \$vr2
+ a8: 0c650820 vfcmp.cult.d \$vr0, \$vr1, \$vr2
+ ac: 0c658820 vfcmp.sult.d \$vr0, \$vr1, \$vr2
+ b0: 0c660820 vfcmp.cueq.d \$vr0, \$vr1, \$vr2
+ b4: 0c668820 vfcmp.sueq.d \$vr0, \$vr1, \$vr2
+ b8: 0c670820 vfcmp.cule.d \$vr0, \$vr1, \$vr2
+ bc: 0c678820 vfcmp.sule.d \$vr0, \$vr1, \$vr2
+ c0: 0c680820 vfcmp.cne.d \$vr0, \$vr1, \$vr2
+ c4: 0c688820 vfcmp.sne.d \$vr0, \$vr1, \$vr2
+ c8: 0c6a0820 vfcmp.cor.d \$vr0, \$vr1, \$vr2
+ cc: 0c6a8820 vfcmp.sor.d \$vr0, \$vr1, \$vr2
+ d0: 0c6c0820 vfcmp.cune.d \$vr0, \$vr1, \$vr2
+ d4: 0c6c8820 vfcmp.sune.d \$vr0, \$vr1, \$vr2
+ d8: 2c000420 vld \$vr0, \$ra, 1
+ dc: 2c400420 vst \$vr0, \$ra, 1
+ e0: 38400820 vldx \$vr0, \$ra, \$tp
+ e4: 38440820 vstx \$vr0, \$ra, \$tp
+ e8: 3011f420 vldrepl.d \$vr0, \$ra, 1000
+ ec: 30206420 vldrepl.w \$vr0, \$ra, 100
+ f0: 30401420 vldrepl.h \$vr0, \$ra, 10
+ f4: 30800420 vldrepl.b \$vr0, \$ra, 1
+ f8: 3115f420 vstelm.d \$vr0, \$ra, 1000, 0x1
+ fc: 31246420 vstelm.w \$vr0, \$ra, 100, 0x1
+ 100: 31441420 vstelm.h \$vr0, \$ra, 10, 0x1
+ 104: 31840420 vstelm.b \$vr0, \$ra, 1, 0x1
+ 108: 70000820 vseq.b \$vr0, \$vr1, \$vr2
+ 10c: 70008820 vseq.h \$vr0, \$vr1, \$vr2
+ 110: 70010820 vseq.w \$vr0, \$vr1, \$vr2
+ 114: 70018820 vseq.d \$vr0, \$vr1, \$vr2
+ 118: 70020820 vsle.b \$vr0, \$vr1, \$vr2
+ 11c: 70028820 vsle.h \$vr0, \$vr1, \$vr2
+ 120: 70030820 vsle.w \$vr0, \$vr1, \$vr2
+ 124: 70038820 vsle.d \$vr0, \$vr1, \$vr2
+ 128: 70040820 vsle.bu \$vr0, \$vr1, \$vr2
+ 12c: 70048820 vsle.hu \$vr0, \$vr1, \$vr2
+ 130: 70050820 vsle.wu \$vr0, \$vr1, \$vr2
+ 134: 70058820 vsle.du \$vr0, \$vr1, \$vr2
+ 138: 70060820 vslt.b \$vr0, \$vr1, \$vr2
+ 13c: 70068820 vslt.h \$vr0, \$vr1, \$vr2
+ 140: 70070820 vslt.w \$vr0, \$vr1, \$vr2
+ 144: 70078820 vslt.d \$vr0, \$vr1, \$vr2
+ 148: 70080820 vslt.bu \$vr0, \$vr1, \$vr2
+ 14c: 70088820 vslt.hu \$vr0, \$vr1, \$vr2
+ 150: 70090820 vslt.wu \$vr0, \$vr1, \$vr2
+ 154: 70098820 vslt.du \$vr0, \$vr1, \$vr2
+ 158: 700a0820 vadd.b \$vr0, \$vr1, \$vr2
+ 15c: 700a8820 vadd.h \$vr0, \$vr1, \$vr2
+ 160: 700b0820 vadd.w \$vr0, \$vr1, \$vr2
+ 164: 700b8820 vadd.d \$vr0, \$vr1, \$vr2
+ 168: 700c0820 vsub.b \$vr0, \$vr1, \$vr2
+ 16c: 700c8820 vsub.h \$vr0, \$vr1, \$vr2
+ 170: 700d0820 vsub.w \$vr0, \$vr1, \$vr2
+ 174: 700d8820 vsub.d \$vr0, \$vr1, \$vr2
+ 178: 70460820 vsadd.b \$vr0, \$vr1, \$vr2
+ 17c: 70468820 vsadd.h \$vr0, \$vr1, \$vr2
+ 180: 70470820 vsadd.w \$vr0, \$vr1, \$vr2
+ 184: 70478820 vsadd.d \$vr0, \$vr1, \$vr2
+ 188: 70480820 vssub.b \$vr0, \$vr1, \$vr2
+ 18c: 70488820 vssub.h \$vr0, \$vr1, \$vr2
+ 190: 70490820 vssub.w \$vr0, \$vr1, \$vr2
+ 194: 70498820 vssub.d \$vr0, \$vr1, \$vr2
+ 198: 704a0820 vsadd.bu \$vr0, \$vr1, \$vr2
+ 19c: 704a8820 vsadd.hu \$vr0, \$vr1, \$vr2
+ 1a0: 704b0820 vsadd.wu \$vr0, \$vr1, \$vr2
+ 1a4: 704b8820 vsadd.du \$vr0, \$vr1, \$vr2
+ 1a8: 704c0820 vssub.bu \$vr0, \$vr1, \$vr2
+ 1ac: 704c8820 vssub.hu \$vr0, \$vr1, \$vr2
+ 1b0: 704d0820 vssub.wu \$vr0, \$vr1, \$vr2
+ 1b4: 704d8820 vssub.du \$vr0, \$vr1, \$vr2
+ 1b8: 70540820 vhaddw.h.b \$vr0, \$vr1, \$vr2
+ 1bc: 70548820 vhaddw.w.h \$vr0, \$vr1, \$vr2
+ 1c0: 70550820 vhaddw.d.w \$vr0, \$vr1, \$vr2
+ 1c4: 70558820 vhaddw.q.d \$vr0, \$vr1, \$vr2
+ 1c8: 70560820 vhsubw.h.b \$vr0, \$vr1, \$vr2
+ 1cc: 70568820 vhsubw.w.h \$vr0, \$vr1, \$vr2
+ 1d0: 70570820 vhsubw.d.w \$vr0, \$vr1, \$vr2
+ 1d4: 70578820 vhsubw.q.d \$vr0, \$vr1, \$vr2
+ 1d8: 70580820 vhaddw.hu.bu \$vr0, \$vr1, \$vr2
+ 1dc: 70588820 vhaddw.wu.hu \$vr0, \$vr1, \$vr2
+ 1e0: 70590820 vhaddw.du.wu \$vr0, \$vr1, \$vr2
+ 1e4: 70598820 vhaddw.qu.du \$vr0, \$vr1, \$vr2
+ 1e8: 705a0820 vhsubw.hu.bu \$vr0, \$vr1, \$vr2
+ 1ec: 705a8820 vhsubw.wu.hu \$vr0, \$vr1, \$vr2
+ 1f0: 705b0820 vhsubw.du.wu \$vr0, \$vr1, \$vr2
+ 1f4: 705b8820 vhsubw.qu.du \$vr0, \$vr1, \$vr2
+ 1f8: 705c0820 vadda.b \$vr0, \$vr1, \$vr2
+ 1fc: 705c8820 vadda.h \$vr0, \$vr1, \$vr2
+ 200: 705d0820 vadda.w \$vr0, \$vr1, \$vr2
+ 204: 705d8820 vadda.d \$vr0, \$vr1, \$vr2
+ 208: 70600820 vabsd.b \$vr0, \$vr1, \$vr2
+ 20c: 70608820 vabsd.h \$vr0, \$vr1, \$vr2
+ 210: 70610820 vabsd.w \$vr0, \$vr1, \$vr2
+ 214: 70618820 vabsd.d \$vr0, \$vr1, \$vr2
+ 218: 70620820 vabsd.bu \$vr0, \$vr1, \$vr2
+ 21c: 70628820 vabsd.hu \$vr0, \$vr1, \$vr2
+ 220: 70630820 vabsd.wu \$vr0, \$vr1, \$vr2
+ 224: 70638820 vabsd.du \$vr0, \$vr1, \$vr2
+ 228: 70640820 vavg.b \$vr0, \$vr1, \$vr2
+ 22c: 70648820 vavg.h \$vr0, \$vr1, \$vr2
+ 230: 70650820 vavg.w \$vr0, \$vr1, \$vr2
+ 234: 70658820 vavg.d \$vr0, \$vr1, \$vr2
+ 238: 70660820 vavg.bu \$vr0, \$vr1, \$vr2
+ 23c: 70668820 vavg.hu \$vr0, \$vr1, \$vr2
+ 240: 70670820 vavg.wu \$vr0, \$vr1, \$vr2
+ 244: 70678820 vavg.du \$vr0, \$vr1, \$vr2
+ 248: 70680820 vavgr.b \$vr0, \$vr1, \$vr2
+ 24c: 70688820 vavgr.h \$vr0, \$vr1, \$vr2
+ 250: 70690820 vavgr.w \$vr0, \$vr1, \$vr2
+ 254: 70698820 vavgr.d \$vr0, \$vr1, \$vr2
+ 258: 706a0820 vavgr.bu \$vr0, \$vr1, \$vr2
+ 25c: 706a8820 vavgr.hu \$vr0, \$vr1, \$vr2
+ 260: 706b0820 vavgr.wu \$vr0, \$vr1, \$vr2
+ 264: 706b8820 vavgr.du \$vr0, \$vr1, \$vr2
+ 268: 70700820 vmax.b \$vr0, \$vr1, \$vr2
+ 26c: 70708820 vmax.h \$vr0, \$vr1, \$vr2
+ 270: 70710820 vmax.w \$vr0, \$vr1, \$vr2
+ 274: 70718820 vmax.d \$vr0, \$vr1, \$vr2
+ 278: 70720820 vmin.b \$vr0, \$vr1, \$vr2
+ 27c: 70728820 vmin.h \$vr0, \$vr1, \$vr2
+ 280: 70730820 vmin.w \$vr0, \$vr1, \$vr2
+ 284: 70738820 vmin.d \$vr0, \$vr1, \$vr2
+ 288: 70740820 vmax.bu \$vr0, \$vr1, \$vr2
+ 28c: 70748820 vmax.hu \$vr0, \$vr1, \$vr2
+ 290: 70750820 vmax.wu \$vr0, \$vr1, \$vr2
+ 294: 70758820 vmax.du \$vr0, \$vr1, \$vr2
+ 298: 70760820 vmin.bu \$vr0, \$vr1, \$vr2
+ 29c: 70768820 vmin.hu \$vr0, \$vr1, \$vr2
+ 2a0: 70770820 vmin.wu \$vr0, \$vr1, \$vr2
+ 2a4: 70778820 vmin.du \$vr0, \$vr1, \$vr2
+ 2a8: 70840820 vmul.b \$vr0, \$vr1, \$vr2
+ 2ac: 70848820 vmul.h \$vr0, \$vr1, \$vr2
+ 2b0: 70850820 vmul.w \$vr0, \$vr1, \$vr2
+ 2b4: 70858820 vmul.d \$vr0, \$vr1, \$vr2
+ 2b8: 70860820 vmuh.b \$vr0, \$vr1, \$vr2
+ 2bc: 70868820 vmuh.h \$vr0, \$vr1, \$vr2
+ 2c0: 70870820 vmuh.w \$vr0, \$vr1, \$vr2
+ 2c4: 70878820 vmuh.d \$vr0, \$vr1, \$vr2
+ 2c8: 70880820 vmuh.bu \$vr0, \$vr1, \$vr2
+ 2cc: 70888820 vmuh.hu \$vr0, \$vr1, \$vr2
+ 2d0: 70890820 vmuh.wu \$vr0, \$vr1, \$vr2
+ 2d4: 70898820 vmuh.du \$vr0, \$vr1, \$vr2
+ 2d8: 70a80820 vmadd.b \$vr0, \$vr1, \$vr2
+ 2dc: 70a88820 vmadd.h \$vr0, \$vr1, \$vr2
+ 2e0: 70a90820 vmadd.w \$vr0, \$vr1, \$vr2
+ 2e4: 70a98820 vmadd.d \$vr0, \$vr1, \$vr2
+ 2e8: 70aa0820 vmsub.b \$vr0, \$vr1, \$vr2
+ 2ec: 70aa8820 vmsub.h \$vr0, \$vr1, \$vr2
+ 2f0: 70ab0820 vmsub.w \$vr0, \$vr1, \$vr2
+ 2f4: 70ab8820 vmsub.d \$vr0, \$vr1, \$vr2
+ 2f8: 70e00820 vdiv.b \$vr0, \$vr1, \$vr2
+ 2fc: 70e08820 vdiv.h \$vr0, \$vr1, \$vr2
+ 300: 70e10820 vdiv.w \$vr0, \$vr1, \$vr2
+ 304: 70e18820 vdiv.d \$vr0, \$vr1, \$vr2
+ 308: 70e20820 vmod.b \$vr0, \$vr1, \$vr2
+ 30c: 70e28820 vmod.h \$vr0, \$vr1, \$vr2
+ 310: 70e30820 vmod.w \$vr0, \$vr1, \$vr2
+ 314: 70e38820 vmod.d \$vr0, \$vr1, \$vr2
+ 318: 70e40820 vdiv.bu \$vr0, \$vr1, \$vr2
+ 31c: 70e48820 vdiv.hu \$vr0, \$vr1, \$vr2
+ 320: 70e50820 vdiv.wu \$vr0, \$vr1, \$vr2
+ 324: 70e58820 vdiv.du \$vr0, \$vr1, \$vr2
+ 328: 70e60820 vmod.bu \$vr0, \$vr1, \$vr2
+ 32c: 70e68820 vmod.hu \$vr0, \$vr1, \$vr2
+ 330: 70e70820 vmod.wu \$vr0, \$vr1, \$vr2
+ 334: 70e78820 vmod.du \$vr0, \$vr1, \$vr2
+ 338: 70e80820 vsll.b \$vr0, \$vr1, \$vr2
+ 33c: 70e88820 vsll.h \$vr0, \$vr1, \$vr2
+ 340: 70e90820 vsll.w \$vr0, \$vr1, \$vr2
+ 344: 70e98820 vsll.d \$vr0, \$vr1, \$vr2
+ 348: 70ea0820 vsrl.b \$vr0, \$vr1, \$vr2
+ 34c: 70ea8820 vsrl.h \$vr0, \$vr1, \$vr2
+ 350: 70eb0820 vsrl.w \$vr0, \$vr1, \$vr2
+ 354: 70eb8820 vsrl.d \$vr0, \$vr1, \$vr2
+ 358: 70ec0820 vsra.b \$vr0, \$vr1, \$vr2
+ 35c: 70ec8820 vsra.h \$vr0, \$vr1, \$vr2
+ 360: 70ed0820 vsra.w \$vr0, \$vr1, \$vr2
+ 364: 70ed8820 vsra.d \$vr0, \$vr1, \$vr2
+ 368: 70ee0820 vrotr.b \$vr0, \$vr1, \$vr2
+ 36c: 70ee8820 vrotr.h \$vr0, \$vr1, \$vr2
+ 370: 70ef0820 vrotr.w \$vr0, \$vr1, \$vr2
+ 374: 70ef8820 vrotr.d \$vr0, \$vr1, \$vr2
+ 378: 70f00820 vsrlr.b \$vr0, \$vr1, \$vr2
+ 37c: 70f08820 vsrlr.h \$vr0, \$vr1, \$vr2
+ 380: 70f10820 vsrlr.w \$vr0, \$vr1, \$vr2
+ 384: 70f18820 vsrlr.d \$vr0, \$vr1, \$vr2
+ 388: 70f20820 vsrar.b \$vr0, \$vr1, \$vr2
+ 38c: 70f28820 vsrar.h \$vr0, \$vr1, \$vr2
+ 390: 70f30820 vsrar.w \$vr0, \$vr1, \$vr2
+ 394: 70f38820 vsrar.d \$vr0, \$vr1, \$vr2
+ 398: 70f48820 vsrln.b.h \$vr0, \$vr1, \$vr2
+ 39c: 70f50820 vsrln.h.w \$vr0, \$vr1, \$vr2
+ 3a0: 70f58820 vsrln.w.d \$vr0, \$vr1, \$vr2
+ 3a4: 70f68820 vsran.b.h \$vr0, \$vr1, \$vr2
+ 3a8: 70f70820 vsran.h.w \$vr0, \$vr1, \$vr2
+ 3ac: 70f78820 vsran.w.d \$vr0, \$vr1, \$vr2
+ 3b0: 70f88820 vsrlrn.b.h \$vr0, \$vr1, \$vr2
+ 3b4: 70f90820 vsrlrn.h.w \$vr0, \$vr1, \$vr2
+ 3b8: 70f98820 vsrlrn.w.d \$vr0, \$vr1, \$vr2
+ 3bc: 70fa8820 vsrarn.b.h \$vr0, \$vr1, \$vr2
+ 3c0: 70fb0820 vsrarn.h.w \$vr0, \$vr1, \$vr2
+ 3c4: 70fb8820 vsrarn.w.d \$vr0, \$vr1, \$vr2
+ 3c8: 70fc8820 vssrln.b.h \$vr0, \$vr1, \$vr2
+ 3cc: 70fd0820 vssrln.h.w \$vr0, \$vr1, \$vr2
+ 3d0: 70fd8820 vssrln.w.d \$vr0, \$vr1, \$vr2
+ 3d4: 70fe8820 vssran.b.h \$vr0, \$vr1, \$vr2
+ 3d8: 70ff0820 vssran.h.w \$vr0, \$vr1, \$vr2
+ 3dc: 70ff8820 vssran.w.d \$vr0, \$vr1, \$vr2
+ 3e0: 71008820 vssrlrn.b.h \$vr0, \$vr1, \$vr2
+ 3e4: 71010820 vssrlrn.h.w \$vr0, \$vr1, \$vr2
+ 3e8: 71018820 vssrlrn.w.d \$vr0, \$vr1, \$vr2
+ 3ec: 71028820 vssrarn.b.h \$vr0, \$vr1, \$vr2
+ 3f0: 71030820 vssrarn.h.w \$vr0, \$vr1, \$vr2
+ 3f4: 71038820 vssrarn.w.d \$vr0, \$vr1, \$vr2
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+ 8dc: 73490420 vssrlni.w.d \$vr0, \$vr1, 0x1
+ 8e0: 734a0420 vssrlni.d.q \$vr0, \$vr1, 0x1
+ 8e4: 73444420 vsrlrni.b.h \$vr0, \$vr1, 0x1
+ 8e8: 73448420 vsrlrni.h.w \$vr0, \$vr1, 0x1
+ 8ec: 73450420 vsrlrni.w.d \$vr0, \$vr1, 0x1
+ 8f0: 73460420 vsrlrni.d.q \$vr0, \$vr1, 0x1
+ 8f4: 734c4420 vssrlni.bu.h \$vr0, \$vr1, 0x1
+ 8f8: 734c8420 vssrlni.hu.w \$vr0, \$vr1, 0x1
+ 8fc: 734d0420 vssrlni.wu.d \$vr0, \$vr1, 0x1
+ 900: 734e0420 vssrlni.du.q \$vr0, \$vr1, 0x1
+ 904: 73504420 vssrlrni.b.h \$vr0, \$vr1, 0x1
+ 908: 73508420 vssrlrni.h.w \$vr0, \$vr1, 0x1
+ 90c: 73510420 vssrlrni.w.d \$vr0, \$vr1, 0x1
+ 910: 73520420 vssrlrni.d.q \$vr0, \$vr1, 0x1
+ 914: 73544420 vssrlrni.bu.h \$vr0, \$vr1, 0x1
+ 918: 73548420 vssrlrni.hu.w \$vr0, \$vr1, 0x1
+ 91c: 73550420 vssrlrni.wu.d \$vr0, \$vr1, 0x1
+ 920: 73560420 vssrlrni.du.q \$vr0, \$vr1, 0x1
+ 924: 73584420 vsrani.b.h \$vr0, \$vr1, 0x1
+ 928: 73588420 vsrani.h.w \$vr0, \$vr1, 0x1
+ 92c: 73590420 vsrani.w.d \$vr0, \$vr1, 0x1
+ 930: 735a0420 vsrani.d.q \$vr0, \$vr1, 0x1
+ 934: 735c4420 vsrarni.b.h \$vr0, \$vr1, 0x1
+ 938: 735c8420 vsrarni.h.w \$vr0, \$vr1, 0x1
+ 93c: 735d0420 vsrarni.w.d \$vr0, \$vr1, 0x1
+ 940: 735e0420 vsrarni.d.q \$vr0, \$vr1, 0x1
+ 944: 73604420 vssrani.b.h \$vr0, \$vr1, 0x1
+ 948: 73608420 vssrani.h.w \$vr0, \$vr1, 0x1
+ 94c: 73610420 vssrani.w.d \$vr0, \$vr1, 0x1
+ 950: 73620420 vssrani.d.q \$vr0, \$vr1, 0x1
+ 954: 73644420 vssrani.bu.h \$vr0, \$vr1, 0x1
+ 958: 73648420 vssrani.hu.w \$vr0, \$vr1, 0x1
+ 95c: 73650420 vssrani.wu.d \$vr0, \$vr1, 0x1
+ 960: 73660420 vssrani.du.q \$vr0, \$vr1, 0x1
+ 964: 73684420 vssrarni.b.h \$vr0, \$vr1, 0x1
+ 968: 73688420 vssrarni.h.w \$vr0, \$vr1, 0x1
+ 96c: 73690420 vssrarni.w.d \$vr0, \$vr1, 0x1
+ 970: 736a0420 vssrarni.d.q \$vr0, \$vr1, 0x1
+ 974: 736c4420 vssrarni.bu.h \$vr0, \$vr1, 0x1
+ 978: 736c8420 vssrarni.hu.w \$vr0, \$vr1, 0x1
+ 97c: 736d0420 vssrarni.wu.d \$vr0, \$vr1, 0x1
+ 980: 736e0420 vssrarni.du.q \$vr0, \$vr1, 0x1
+ 984: 73800420 vextrins.d \$vr0, \$vr1, 0x1
+ 988: 73840420 vextrins.w \$vr0, \$vr1, 0x1
+ 98c: 73880420 vextrins.h \$vr0, \$vr1, 0x1
+ 990: 738c0420 vextrins.b \$vr0, \$vr1, 0x1
+ 994: 73900420 vshuf4i.b \$vr0, \$vr1, 0x1
+ 998: 73940420 vshuf4i.h \$vr0, \$vr1, 0x1
+ 99c: 73980420 vshuf4i.w \$vr0, \$vr1, 0x1
+ 9a0: 739c0420 vshuf4i.d \$vr0, \$vr1, 0x1
+ 9a4: 73c40420 vbitseli.b \$vr0, \$vr1, 0x1
+ 9a8: 73d00420 vandi.b \$vr0, \$vr1, 0x1
+ 9ac: 73d40420 vori.b \$vr0, \$vr1, 0x1
+ 9b0: 73d80420 vxori.b \$vr0, \$vr1, 0x1
+ 9b4: 73dc0420 vnori.b \$vr0, \$vr1, 0x1
+ 9b8: 73e00020 vldi \$vr0, 1
+ 9bc: 701e0820 vaddwev.h.b \$vr0, \$vr1, \$vr2
+ 9c0: 701e8820 vaddwev.w.h \$vr0, \$vr1, \$vr2
+ 9c4: 701f0820 vaddwev.d.w \$vr0, \$vr1, \$vr2
+ 9c8: 701f8820 vaddwev.q.d \$vr0, \$vr1, \$vr2
+ 9cc: 702e0820 vaddwev.h.bu \$vr0, \$vr1, \$vr2
+ 9d0: 702e8820 vaddwev.w.hu \$vr0, \$vr1, \$vr2
+ 9d4: 702f0820 vaddwev.d.wu \$vr0, \$vr1, \$vr2
+ 9d8: 702f8820 vaddwev.q.du \$vr0, \$vr1, \$vr2
+ 9dc: 703e0820 vaddwev.h.bu.b \$vr0, \$vr1, \$vr2
+ 9e0: 703e8820 vaddwev.w.hu.h \$vr0, \$vr1, \$vr2
+ 9e4: 703f0820 vaddwev.d.wu.w \$vr0, \$vr1, \$vr2
+ 9e8: 703f8820 vaddwev.q.du.d \$vr0, \$vr1, \$vr2
+ 9ec: 70220820 vaddwod.h.b \$vr0, \$vr1, \$vr2
+ 9f0: 70228820 vaddwod.w.h \$vr0, \$vr1, \$vr2
+ 9f4: 70230820 vaddwod.d.w \$vr0, \$vr1, \$vr2
+ 9f8: 70238820 vaddwod.q.d \$vr0, \$vr1, \$vr2
+ 9fc: 70320820 vaddwod.h.bu \$vr0, \$vr1, \$vr2
+ a00: 70328820 vaddwod.w.hu \$vr0, \$vr1, \$vr2
+ a04: 70330820 vaddwod.d.wu \$vr0, \$vr1, \$vr2
+ a08: 70338820 vaddwod.q.du \$vr0, \$vr1, \$vr2
+ a0c: 70400820 vaddwod.h.bu.b \$vr0, \$vr1, \$vr2
+ a10: 70408820 vaddwod.w.hu.h \$vr0, \$vr1, \$vr2
+ a14: 70410820 vaddwod.d.wu.w \$vr0, \$vr1, \$vr2
+ a18: 70418820 vaddwod.q.du.d \$vr0, \$vr1, \$vr2
+ a1c: 70ac0820 vmaddwev.h.b \$vr0, \$vr1, \$vr2
+ a20: 70ac8820 vmaddwev.w.h \$vr0, \$vr1, \$vr2
+ a24: 70ad0820 vmaddwev.d.w \$vr0, \$vr1, \$vr2
+ a28: 70ad8820 vmaddwev.q.d \$vr0, \$vr1, \$vr2
+ a2c: 70b40820 vmaddwev.h.bu \$vr0, \$vr1, \$vr2
+ a30: 70b48820 vmaddwev.w.hu \$vr0, \$vr1, \$vr2
+ a34: 70b50820 vmaddwev.d.wu \$vr0, \$vr1, \$vr2
+ a38: 70b58820 vmaddwev.q.du \$vr0, \$vr1, \$vr2
+ a3c: 70bc0820 vmaddwev.h.bu.b \$vr0, \$vr1, \$vr2
+ a40: 70bc8820 vmaddwev.w.hu.h \$vr0, \$vr1, \$vr2
+ a44: 70bd0820 vmaddwev.d.wu.w \$vr0, \$vr1, \$vr2
+ a48: 70bd8820 vmaddwev.q.du.d \$vr0, \$vr1, \$vr2
+ a4c: 70ae0820 vmaddwod.h.b \$vr0, \$vr1, \$vr2
+ a50: 70ae8820 vmaddwod.w.h \$vr0, \$vr1, \$vr2
+ a54: 70af0820 vmaddwod.d.w \$vr0, \$vr1, \$vr2
+ a58: 70af8820 vmaddwod.q.d \$vr0, \$vr1, \$vr2
+ a5c: 70b60820 vmaddwod.h.bu \$vr0, \$vr1, \$vr2
+ a60: 70b68820 vmaddwod.w.hu \$vr0, \$vr1, \$vr2
+ a64: 70b70820 vmaddwod.d.wu \$vr0, \$vr1, \$vr2
+ a68: 70b78820 vmaddwod.q.du \$vr0, \$vr1, \$vr2
+ a6c: 70be0820 vmaddwod.h.bu.b \$vr0, \$vr1, \$vr2
+ a70: 70be8820 vmaddwod.w.hu.h \$vr0, \$vr1, \$vr2
+ a74: 70bf0820 vmaddwod.d.wu.w \$vr0, \$vr1, \$vr2
+ a78: 70bf8820 vmaddwod.q.du.d \$vr0, \$vr1, \$vr2
+ a7c: 70900820 vmulwev.h.b \$vr0, \$vr1, \$vr2
+ a80: 70908820 vmulwev.w.h \$vr0, \$vr1, \$vr2
+ a84: 70910820 vmulwev.d.w \$vr0, \$vr1, \$vr2
+ a88: 70918820 vmulwev.q.d \$vr0, \$vr1, \$vr2
+ a8c: 70980820 vmulwev.h.bu \$vr0, \$vr1, \$vr2
+ a90: 70988820 vmulwev.w.hu \$vr0, \$vr1, \$vr2
+ a94: 70990820 vmulwev.d.wu \$vr0, \$vr1, \$vr2
+ a98: 70998820 vmulwev.q.du \$vr0, \$vr1, \$vr2
+ a9c: 70a00820 vmulwev.h.bu.b \$vr0, \$vr1, \$vr2
+ aa0: 70a08820 vmulwev.w.hu.h \$vr0, \$vr1, \$vr2
+ aa4: 70a10820 vmulwev.d.wu.w \$vr0, \$vr1, \$vr2
+ aa8: 70a18820 vmulwev.q.du.d \$vr0, \$vr1, \$vr2
+ aac: 70920820 vmulwod.h.b \$vr0, \$vr1, \$vr2
+ ab0: 70928820 vmulwod.w.h \$vr0, \$vr1, \$vr2
+ ab4: 70930820 vmulwod.d.w \$vr0, \$vr1, \$vr2
+ ab8: 70938820 vmulwod.q.d \$vr0, \$vr1, \$vr2
+ abc: 709a0820 vmulwod.h.bu \$vr0, \$vr1, \$vr2
+ ac0: 709a8820 vmulwod.w.hu \$vr0, \$vr1, \$vr2
+ ac4: 709b0820 vmulwod.d.wu \$vr0, \$vr1, \$vr2
+ ac8: 709b8820 vmulwod.q.du \$vr0, \$vr1, \$vr2
+ acc: 70a20820 vmulwod.h.bu.b \$vr0, \$vr1, \$vr2
+ ad0: 70a28820 vmulwod.w.hu.h \$vr0, \$vr1, \$vr2
+ ad4: 70a30820 vmulwod.d.wu.w \$vr0, \$vr1, \$vr2
+ ad8: 70a38820 vmulwod.q.du.d \$vr0, \$vr1, \$vr2
+ adc: 70200820 vsubwev.h.b \$vr0, \$vr1, \$vr2
+ ae0: 70208820 vsubwev.w.h \$vr0, \$vr1, \$vr2
+ ae4: 70210820 vsubwev.d.w \$vr0, \$vr1, \$vr2
+ ae8: 70218820 vsubwev.q.d \$vr0, \$vr1, \$vr2
+ aec: 70300820 vsubwev.h.bu \$vr0, \$vr1, \$vr2
+ af0: 70308820 vsubwev.w.hu \$vr0, \$vr1, \$vr2
+ af4: 70310820 vsubwev.d.wu \$vr0, \$vr1, \$vr2
+ af8: 70318820 vsubwev.q.du \$vr0, \$vr1, \$vr2
+ afc: 70240820 vsubwod.h.b \$vr0, \$vr1, \$vr2
+ b00: 70248820 vsubwod.w.h \$vr0, \$vr1, \$vr2
+ b04: 70250820 vsubwod.d.w \$vr0, \$vr1, \$vr2
+ b08: 70258820 vsubwod.q.d \$vr0, \$vr1, \$vr2
+ b0c: 70340820 vsubwod.h.bu \$vr0, \$vr1, \$vr2
+ b10: 70348820 vsubwod.w.hu \$vr0, \$vr1, \$vr2
+ b14: 70350820 vsubwod.d.wu \$vr0, \$vr1, \$vr2
+ b18: 70358820 vsubwod.q.du \$vr0, \$vr1, \$vr2
+ b1c: 73e18020 vldi \$vr0, 3073
+ b20: 73e08020 vldi \$vr0, 1025
+ b24: 73e10020 vldi \$vr0, 2049
+ b28: 73e00020 vldi \$vr0, 1
+ b2c: 73e40420 vpermi.w \$vr0, \$vr1, 0x1
+ b30: 769f1020 vext2xv.h.b \$xr0, \$xr1
+ b34: 769f1420 vext2xv.w.b \$xr0, \$xr1
+ b38: 769f1820 vext2xv.d.b \$xr0, \$xr1
+ b3c: 769f1c20 vext2xv.w.h \$xr0, \$xr1
+ b40: 769f2020 vext2xv.d.h \$xr0, \$xr1
+ b44: 769f2420 vext2xv.d.w \$xr0, \$xr1
+ b48: 769f2820 vext2xv.hu.bu \$xr0, \$xr1
+ b4c: 769f2c20 vext2xv.wu.bu \$xr0, \$xr1
+ b50: 769f3020 vext2xv.du.bu \$xr0, \$xr1
+ b54: 769f3420 vext2xv.wu.hu \$xr0, \$xr1
+ b58: 769f3820 vext2xv.du.hu \$xr0, \$xr1
+ b5c: 769f3c20 vext2xv.du.wu \$xr0, \$xr1
+ b60: 729d1420 vfrecipe.s \$vr0, \$vr1
+ b64: 729d1820 vfrecipe.d \$vr0, \$vr1
+ b68: 729d2420 vfrsqrte.s \$vr0, \$vr1
+ b6c: 729d2820 vfrsqrte.d \$vr0, \$vr1
diff --git a/gas/testsuite/gas/loongarch/insn_lsx.s b/gas/testsuite/gas/loongarch/insn_lsx.s
new file mode 100644
index 00000000000..885d8cecf11
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_lsx.s
@@ -0,0 +1,732 @@
+vfmadd.s $vr0, $vr1, $vr2, $vr3
+vfmsub.s $vr0, $vr1, $vr2, $vr3
+vfnmadd.s $vr0, $vr1, $vr2, $vr3
+vfnmsub.s $vr0, $vr1, $vr2, $vr3
+vfcmp.caf.s $vr0, $vr1, $vr2
+vfcmp.saf.s $vr0, $vr1, $vr2
+vfcmp.clt.s $vr0, $vr1, $vr2
+vfcmp.slt.s $vr0, $vr1, $vr2
+vfcmp.ceq.s $vr0, $vr1, $vr2
+vfcmp.seq.s $vr0, $vr1, $vr2
+vfcmp.cle.s $vr0, $vr1, $vr2
+vfcmp.sle.s $vr0, $vr1, $vr2
+vfcmp.cun.s $vr0, $vr1, $vr2
+vfcmp.sun.s $vr0, $vr1, $vr2
+vfcmp.cult.s $vr0, $vr1, $vr2
+vfcmp.sult.s $vr0, $vr1, $vr2
+vfcmp.cueq.s $vr0, $vr1, $vr2
+vfcmp.sueq.s $vr0, $vr1, $vr2
+vfcmp.cule.s $vr0, $vr1, $vr2
+vfcmp.sule.s $vr0, $vr1, $vr2
+vfcmp.cne.s $vr0, $vr1, $vr2
+vfcmp.sne.s $vr0, $vr1, $vr2
+vfcmp.cor.s $vr0, $vr1, $vr2
+vfcmp.sor.s $vr0, $vr1, $vr2
+vfcmp.cune.s $vr0, $vr1, $vr2
+vfcmp.sune.s $vr0, $vr1, $vr2
+vbitsel.v $vr0, $vr1, $vr2, $vr3
+vshuf.b $vr0, $vr1, $vr2, $vr3
+vfmadd.d $vr0, $vr1, $vr2, $vr3
+vfmsub.d $vr0, $vr1, $vr2, $vr3
+vfnmadd.d $vr0, $vr1, $vr2, $vr3
+vfnmsub.d $vr0, $vr1, $vr2, $vr3
+vfcmp.caf.d $vr0, $vr1, $vr2
+vfcmp.saf.d $vr0, $vr1, $vr2
+vfcmp.clt.d $vr0, $vr1, $vr2
+vfcmp.slt.d $vr0, $vr1, $vr2
+vfcmp.ceq.d $vr0, $vr1, $vr2
+vfcmp.seq.d $vr0, $vr1, $vr2
+vfcmp.cle.d $vr0, $vr1, $vr2
+vfcmp.sle.d $vr0, $vr1, $vr2
+vfcmp.cun.d $vr0, $vr1, $vr2
+vfcmp.sun.d $vr0, $vr1, $vr2
+vfcmp.cult.d $vr0, $vr1, $vr2
+vfcmp.sult.d $vr0, $vr1, $vr2
+vfcmp.cueq.d $vr0, $vr1, $vr2
+vfcmp.sueq.d $vr0, $vr1, $vr2
+vfcmp.cule.d $vr0, $vr1, $vr2
+vfcmp.sule.d $vr0, $vr1, $vr2
+vfcmp.cne.d $vr0, $vr1, $vr2
+vfcmp.sne.d $vr0, $vr1, $vr2
+vfcmp.cor.d $vr0, $vr1, $vr2
+vfcmp.sor.d $vr0, $vr1, $vr2
+vfcmp.cune.d $vr0, $vr1, $vr2
+vfcmp.sune.d $vr0, $vr1, $vr2
+vld $vr0, $r1, 1
+vst $vr0, $r1, 1
+vldx $vr0, $r1, $r2
+vstx $vr0, $r1, $r2
+vldrepl.d $vr0, $r1, 1000
+vldrepl.w $vr0, $r1, 100
+vldrepl.h $vr0, $r1, 10
+vldrepl.b $vr0, $r1, 1
+vstelm.d $vr0, $r1, 1000, 1
+vstelm.w $vr0, $r1, 100, 1
+vstelm.h $vr0, $r1, 10, 1
+vstelm.b $vr0, $r1, 1, 1
+vseq.b $vr0, $vr1, $vr2
+vseq.h $vr0, $vr1, $vr2
+vseq.w $vr0, $vr1, $vr2
+vseq.d $vr0, $vr1, $vr2
+vsle.b $vr0, $vr1, $vr2
+vsle.h $vr0, $vr1, $vr2
+vsle.w $vr0, $vr1, $vr2
+vsle.d $vr0, $vr1, $vr2
+vsle.bu $vr0, $vr1, $vr2
+vsle.hu $vr0, $vr1, $vr2
+vsle.wu $vr0, $vr1, $vr2
+vsle.du $vr0, $vr1, $vr2
+vslt.b $vr0, $vr1, $vr2
+vslt.h $vr0, $vr1, $vr2
+vslt.w $vr0, $vr1, $vr2
+vslt.d $vr0, $vr1, $vr2
+vslt.bu $vr0, $vr1, $vr2
+vslt.hu $vr0, $vr1, $vr2
+vslt.wu $vr0, $vr1, $vr2
+vslt.du $vr0, $vr1, $vr2
+vadd.b $vr0, $vr1, $vr2
+vadd.h $vr0, $vr1, $vr2
+vadd.w $vr0, $vr1, $vr2
+vadd.d $vr0, $vr1, $vr2
+vsub.b $vr0, $vr1, $vr2
+vsub.h $vr0, $vr1, $vr2
+vsub.w $vr0, $vr1, $vr2
+vsub.d $vr0, $vr1, $vr2
+vsadd.b $vr0, $vr1, $vr2
+vsadd.h $vr0, $vr1, $vr2
+vsadd.w $vr0, $vr1, $vr2
+vsadd.d $vr0, $vr1, $vr2
+vssub.b $vr0, $vr1, $vr2
+vssub.h $vr0, $vr1, $vr2
+vssub.w $vr0, $vr1, $vr2
+vssub.d $vr0, $vr1, $vr2
+vsadd.bu $vr0, $vr1, $vr2
+vsadd.hu $vr0, $vr1, $vr2
+vsadd.wu $vr0, $vr1, $vr2
+vsadd.du $vr0, $vr1, $vr2
+vssub.bu $vr0, $vr1, $vr2
+vssub.hu $vr0, $vr1, $vr2
+vssub.wu $vr0, $vr1, $vr2
+vssub.du $vr0, $vr1, $vr2
+vhaddw.h.b $vr0, $vr1, $vr2
+vhaddw.w.h $vr0, $vr1, $vr2
+vhaddw.d.w $vr0, $vr1, $vr2
+vhaddw.q.d $vr0, $vr1, $vr2
+vhsubw.h.b $vr0, $vr1, $vr2
+vhsubw.w.h $vr0, $vr1, $vr2
+vhsubw.d.w $vr0, $vr1, $vr2
+vhsubw.q.d $vr0, $vr1, $vr2
+vhaddw.hu.bu $vr0, $vr1, $vr2
+vhaddw.wu.hu $vr0, $vr1, $vr2
+vhaddw.du.wu $vr0, $vr1, $vr2
+vhaddw.qu.du $vr0, $vr1, $vr2
+vhsubw.hu.bu $vr0, $vr1, $vr2
+vhsubw.wu.hu $vr0, $vr1, $vr2
+vhsubw.du.wu $vr0, $vr1, $vr2
+vhsubw.qu.du $vr0, $vr1, $vr2
+vadda.b $vr0, $vr1, $vr2
+vadda.h $vr0, $vr1, $vr2
+vadda.w $vr0, $vr1, $vr2
+vadda.d $vr0, $vr1, $vr2
+vabsd.b $vr0, $vr1, $vr2
+vabsd.h $vr0, $vr1, $vr2
+vabsd.w $vr0, $vr1, $vr2
+vabsd.d $vr0, $vr1, $vr2
+vabsd.bu $vr0, $vr1, $vr2
+vabsd.hu $vr0, $vr1, $vr2
+vabsd.wu $vr0, $vr1, $vr2
+vabsd.du $vr0, $vr1, $vr2
+vavg.b $vr0, $vr1, $vr2
+vavg.h $vr0, $vr1, $vr2
+vavg.w $vr0, $vr1, $vr2
+vavg.d $vr0, $vr1, $vr2
+vavg.bu $vr0, $vr1, $vr2
+vavg.hu $vr0, $vr1, $vr2
+vavg.wu $vr0, $vr1, $vr2
+vavg.du $vr0, $vr1, $vr2
+vavgr.b $vr0, $vr1, $vr2
+vavgr.h $vr0, $vr1, $vr2
+vavgr.w $vr0, $vr1, $vr2
+vavgr.d $vr0, $vr1, $vr2
+vavgr.bu $vr0, $vr1, $vr2
+vavgr.hu $vr0, $vr1, $vr2
+vavgr.wu $vr0, $vr1, $vr2
+vavgr.du $vr0, $vr1, $vr2
+vmax.b $vr0, $vr1, $vr2
+vmax.h $vr0, $vr1, $vr2
+vmax.w $vr0, $vr1, $vr2
+vmax.d $vr0, $vr1, $vr2
+vmin.b $vr0, $vr1, $vr2
+vmin.h $vr0, $vr1, $vr2
+vmin.w $vr0, $vr1, $vr2
+vmin.d $vr0, $vr1, $vr2
+vmax.bu $vr0, $vr1, $vr2
+vmax.hu $vr0, $vr1, $vr2
+vmax.wu $vr0, $vr1, $vr2
+vmax.du $vr0, $vr1, $vr2
+vmin.bu $vr0, $vr1, $vr2
+vmin.hu $vr0, $vr1, $vr2
+vmin.wu $vr0, $vr1, $vr2
+vmin.du $vr0, $vr1, $vr2
+vmul.b $vr0, $vr1, $vr2
+vmul.h $vr0, $vr1, $vr2
+vmul.w $vr0, $vr1, $vr2
+vmul.d $vr0, $vr1, $vr2
+vmuh.b $vr0, $vr1, $vr2
+vmuh.h $vr0, $vr1, $vr2
+vmuh.w $vr0, $vr1, $vr2
+vmuh.d $vr0, $vr1, $vr2
+vmuh.bu $vr0, $vr1, $vr2
+vmuh.hu $vr0, $vr1, $vr2
+vmuh.wu $vr0, $vr1, $vr2
+vmuh.du $vr0, $vr1, $vr2
+vmadd.b $vr0, $vr1, $vr2
+vmadd.h $vr0, $vr1, $vr2
+vmadd.w $vr0, $vr1, $vr2
+vmadd.d $vr0, $vr1, $vr2
+vmsub.b $vr0, $vr1, $vr2
+vmsub.h $vr0, $vr1, $vr2
+vmsub.w $vr0, $vr1, $vr2
+vmsub.d $vr0, $vr1, $vr2
+vdiv.b $vr0, $vr1, $vr2
+vdiv.h $vr0, $vr1, $vr2
+vdiv.w $vr0, $vr1, $vr2
+vdiv.d $vr0, $vr1, $vr2
+vmod.b $vr0, $vr1, $vr2
+vmod.h $vr0, $vr1, $vr2
+vmod.w $vr0, $vr1, $vr2
+vmod.d $vr0, $vr1, $vr2
+vdiv.bu $vr0, $vr1, $vr2
+vdiv.hu $vr0, $vr1, $vr2
+vdiv.wu $vr0, $vr1, $vr2
+vdiv.du $vr0, $vr1, $vr2
+vmod.bu $vr0, $vr1, $vr2
+vmod.hu $vr0, $vr1, $vr2
+vmod.wu $vr0, $vr1, $vr2
+vmod.du $vr0, $vr1, $vr2
+vsll.b $vr0, $vr1, $vr2
+vsll.h $vr0, $vr1, $vr2
+vsll.w $vr0, $vr1, $vr2
+vsll.d $vr0, $vr1, $vr2
+vsrl.b $vr0, $vr1, $vr2
+vsrl.h $vr0, $vr1, $vr2
+vsrl.w $vr0, $vr1, $vr2
+vsrl.d $vr0, $vr1, $vr2
+vsra.b $vr0, $vr1, $vr2
+vsra.h $vr0, $vr1, $vr2
+vsra.w $vr0, $vr1, $vr2
+vsra.d $vr0, $vr1, $vr2
+vrotr.b $vr0, $vr1, $vr2
+vrotr.h $vr0, $vr1, $vr2
+vrotr.w $vr0, $vr1, $vr2
+vrotr.d $vr0, $vr1, $vr2
+vsrlr.b $vr0, $vr1, $vr2
+vsrlr.h $vr0, $vr1, $vr2
+vsrlr.w $vr0, $vr1, $vr2
+vsrlr.d $vr0, $vr1, $vr2
+vsrar.b $vr0, $vr1, $vr2
+vsrar.h $vr0, $vr1, $vr2
+vsrar.w $vr0, $vr1, $vr2
+vsrar.d $vr0, $vr1, $vr2
+vsrln.b.h $vr0, $vr1, $vr2
+vsrln.h.w $vr0, $vr1, $vr2
+vsrln.w.d $vr0, $vr1, $vr2
+vsran.b.h $vr0, $vr1, $vr2
+vsran.h.w $vr0, $vr1, $vr2
+vsran.w.d $vr0, $vr1, $vr2
+vsrlrn.b.h $vr0, $vr1, $vr2
+vsrlrn.h.w $vr0, $vr1, $vr2
+vsrlrn.w.d $vr0, $vr1, $vr2
+vsrarn.b.h $vr0, $vr1, $vr2
+vsrarn.h.w $vr0, $vr1, $vr2
+vsrarn.w.d $vr0, $vr1, $vr2
+vssrln.b.h $vr0, $vr1, $vr2
+vssrln.h.w $vr0, $vr1, $vr2
+vssrln.w.d $vr0, $vr1, $vr2
+vssran.b.h $vr0, $vr1, $vr2
+vssran.h.w $vr0, $vr1, $vr2
+vssran.w.d $vr0, $vr1, $vr2
+vssrlrn.b.h $vr0, $vr1, $vr2
+vssrlrn.h.w $vr0, $vr1, $vr2
+vssrlrn.w.d $vr0, $vr1, $vr2
+vssrarn.b.h $vr0, $vr1, $vr2
+vssrarn.h.w $vr0, $vr1, $vr2
+vssrarn.w.d $vr0, $vr1, $vr2
+vssrln.bu.h $vr0, $vr1, $vr2
+vssrln.hu.w $vr0, $vr1, $vr2
+vssrln.wu.d $vr0, $vr1, $vr2
+vssran.bu.h $vr0, $vr1, $vr2
+vssran.hu.w $vr0, $vr1, $vr2
+vssran.wu.d $vr0, $vr1, $vr2
+vssrlrn.bu.h $vr0, $vr1, $vr2
+vssrlrn.hu.w $vr0, $vr1, $vr2
+vssrlrn.wu.d $vr0, $vr1, $vr2
+vssrarn.bu.h $vr0, $vr1, $vr2
+vssrarn.hu.w $vr0, $vr1, $vr2
+vssrarn.wu.d $vr0, $vr1, $vr2
+vbitclr.b $vr0, $vr1, $vr2
+vbitclr.h $vr0, $vr1, $vr2
+vbitclr.w $vr0, $vr1, $vr2
+vbitclr.d $vr0, $vr1, $vr2
+vbitset.b $vr0, $vr1, $vr2
+vbitset.h $vr0, $vr1, $vr2
+vbitset.w $vr0, $vr1, $vr2
+vbitset.d $vr0, $vr1, $vr2
+vbitrev.b $vr0, $vr1, $vr2
+vbitrev.h $vr0, $vr1, $vr2
+vbitrev.w $vr0, $vr1, $vr2
+vbitrev.d $vr0, $vr1, $vr2
+vpackev.b $vr0, $vr1, $vr2
+vpackev.h $vr0, $vr1, $vr2
+vpackev.w $vr0, $vr1, $vr2
+vpackev.d $vr0, $vr1, $vr2
+vpackod.b $vr0, $vr1, $vr2
+vpackod.h $vr0, $vr1, $vr2
+vpackod.w $vr0, $vr1, $vr2
+vpackod.d $vr0, $vr1, $vr2
+vilvl.b $vr0, $vr1, $vr2
+vilvl.h $vr0, $vr1, $vr2
+vilvl.w $vr0, $vr1, $vr2
+vilvl.d $vr0, $vr1, $vr2
+vilvh.b $vr0, $vr1, $vr2
+vilvh.h $vr0, $vr1, $vr2
+vilvh.w $vr0, $vr1, $vr2
+vilvh.d $vr0, $vr1, $vr2
+vpickev.b $vr0, $vr1, $vr2
+vpickev.h $vr0, $vr1, $vr2
+vpickev.w $vr0, $vr1, $vr2
+vpickev.d $vr0, $vr1, $vr2
+vpickod.b $vr0, $vr1, $vr2
+vpickod.h $vr0, $vr1, $vr2
+vpickod.w $vr0, $vr1, $vr2
+vpickod.d $vr0, $vr1, $vr2
+vreplve.b $vr0, $vr1, $r2
+vreplve.h $vr0, $vr1, $r2
+vreplve.w $vr0, $vr1, $r2
+vreplve.d $vr0, $vr1, $r2
+vand.v $vr0, $vr1, $vr2
+vor.v $vr0, $vr1, $vr2
+vxor.v $vr0, $vr1, $vr2
+vnor.v $vr0, $vr1, $vr2
+vandn.v $vr0, $vr1, $vr2
+vorn.v $vr0, $vr1, $vr2
+vfrstp.b $vr0, $vr1, $vr2
+vfrstp.h $vr0, $vr1, $vr2
+vadd.q $vr0, $vr1, $vr2
+vsub.q $vr0, $vr1, $vr2
+vsigncov.b $vr0, $vr1, $vr2
+vsigncov.h $vr0, $vr1, $vr2
+vsigncov.w $vr0, $vr1, $vr2
+vsigncov.d $vr0, $vr1, $vr2
+vfadd.s $vr0, $vr1, $vr2
+vfadd.d $vr0, $vr1, $vr2
+vfsub.s $vr0, $vr1, $vr2
+vfsub.d $vr0, $vr1, $vr2
+vfmul.s $vr0, $vr1, $vr2
+vfmul.d $vr0, $vr1, $vr2
+vfdiv.s $vr0, $vr1, $vr2
+vfdiv.d $vr0, $vr1, $vr2
+vfmax.s $vr0, $vr1, $vr2
+vfmax.d $vr0, $vr1, $vr2
+vfmin.s $vr0, $vr1, $vr2
+vfmin.d $vr0, $vr1, $vr2
+vfmaxa.s $vr0, $vr1, $vr2
+vfmaxa.d $vr0, $vr1, $vr2
+vfmina.s $vr0, $vr1, $vr2
+vfmina.d $vr0, $vr1, $vr2
+vfcvt.h.s $vr0, $vr1, $vr2
+vfcvt.s.d $vr0, $vr1, $vr2
+vffint.s.l $vr0, $vr1, $vr2
+vftint.w.d $vr0, $vr1, $vr2
+vftintrm.w.d $vr0, $vr1, $vr2
+vftintrp.w.d $vr0, $vr1, $vr2
+vftintrz.w.d $vr0, $vr1, $vr2
+vftintrne.w.d $vr0, $vr1, $vr2
+vshuf.h $vr0, $vr1, $vr2
+vshuf.w $vr0, $vr1, $vr2
+vshuf.d $vr0, $vr1, $vr2
+vseqi.b $vr0, $vr1, 1
+vseqi.h $vr0, $vr1, 1
+vseqi.w $vr0, $vr1, 1
+vseqi.d $vr0, $vr1, 1
+vslei.b $vr0, $vr1, 1
+vslei.h $vr0, $vr1, 1
+vslei.w $vr0, $vr1, 1
+vslei.d $vr0, $vr1, 1
+vslei.bu $vr0, $vr1, 1
+vslei.hu $vr0, $vr1, 1
+vslei.wu $vr0, $vr1, 1
+vslei.du $vr0, $vr1, 1
+vslti.b $vr0, $vr1, 1
+vslti.h $vr0, $vr1, 1
+vslti.w $vr0, $vr1, 1
+vslti.d $vr0, $vr1, 1
+vslti.bu $vr0, $vr1, 1
+vslti.hu $vr0, $vr1, 1
+vslti.wu $vr0, $vr1, 1
+vslti.du $vr0, $vr1, 1
+vaddi.bu $vr0, $vr1, 1
+vaddi.hu $vr0, $vr1, 1
+vaddi.wu $vr0, $vr1, 1
+vaddi.du $vr0, $vr1, 1
+vsubi.bu $vr0, $vr1, 1
+vsubi.hu $vr0, $vr1, 1
+vsubi.wu $vr0, $vr1, 1
+vsubi.du $vr0, $vr1, 1
+vbsll.v $vr0, $vr1, 1
+vbsrl.v $vr0, $vr1, 1
+vmaxi.b $vr0, $vr1, 1
+vmaxi.h $vr0, $vr1, 1
+vmaxi.w $vr0, $vr1, 1
+vmaxi.d $vr0, $vr1, 1
+vmini.b $vr0, $vr1, 1
+vmini.h $vr0, $vr1, 1
+vmini.w $vr0, $vr1, 1
+vmini.d $vr0, $vr1, 1
+vmaxi.bu $vr0, $vr1, 1
+vmaxi.hu $vr0, $vr1, 1
+vmaxi.wu $vr0, $vr1, 1
+vmaxi.du $vr0, $vr1, 1
+vmini.bu $vr0, $vr1, 1
+vmini.hu $vr0, $vr1, 1
+vmini.wu $vr0, $vr1, 1
+vmini.du $vr0, $vr1, 1
+vfrstpi.b $vr0, $vr1, 1
+vfrstpi.h $vr0, $vr1, 1
+vclo.b $vr0, $vr1
+vclo.h $vr0, $vr1
+vclo.w $vr0, $vr1
+vclo.d $vr0, $vr1
+vclz.b $vr0, $vr1
+vclz.h $vr0, $vr1
+vclz.w $vr0, $vr1
+vclz.d $vr0, $vr1
+vpcnt.b $vr0, $vr1
+vpcnt.h $vr0, $vr1
+vpcnt.w $vr0, $vr1
+vpcnt.d $vr0, $vr1
+vneg.b $vr0, $vr1
+vneg.h $vr0, $vr1
+vneg.w $vr0, $vr1
+vneg.d $vr0, $vr1
+vmskltz.b $vr0, $vr1
+vmskltz.h $vr0, $vr1
+vmskltz.w $vr0, $vr1
+vmskltz.d $vr0, $vr1
+vmskgez.b $vr0, $vr1
+vmsknz.b $vr0, $vr1
+vseteqz.v $fcc0, $vr1
+vsetnez.v $fcc0, $vr1
+vsetanyeqz.b $fcc0, $vr1
+vsetanyeqz.h $fcc0, $vr1
+vsetanyeqz.w $fcc0, $vr1
+vsetanyeqz.d $fcc0, $vr1
+vsetallnez.b $fcc0, $vr1
+vsetallnez.h $fcc0, $vr1
+vsetallnez.w $fcc0, $vr1
+vsetallnez.d $fcc0, $vr1
+vflogb.s $vr0, $vr1
+vflogb.d $vr0, $vr1
+vfclass.s $vr0, $vr1
+vfclass.d $vr0, $vr1
+vfsqrt.s $vr0, $vr1
+vfsqrt.d $vr0, $vr1
+vfrecip.s $vr0, $vr1
+vfrecip.d $vr0, $vr1
+vfrsqrt.s $vr0, $vr1
+vfrsqrt.d $vr0, $vr1
+vfrint.s $vr0, $vr1
+vfrint.d $vr0, $vr1
+vfrintrm.s $vr0, $vr1
+vfrintrm.d $vr0, $vr1
+vfrintrp.s $vr0, $vr1
+vfrintrp.d $vr0, $vr1
+vfrintrz.s $vr0, $vr1
+vfrintrz.d $vr0, $vr1
+vfrintrne.s $vr0, $vr1
+vfrintrne.d $vr0, $vr1
+vfcvtl.s.h $vr0, $vr1
+vfcvth.s.h $vr0, $vr1
+vfcvtl.d.s $vr0, $vr1
+vfcvth.d.s $vr0, $vr1
+vffint.s.w $vr0, $vr1
+vffint.s.wu $vr0, $vr1
+vffint.d.l $vr0, $vr1
+vffint.d.lu $vr0, $vr1
+vffintl.d.w $vr0, $vr1
+vffinth.d.w $vr0, $vr1
+vftint.w.s $vr0, $vr1
+vftint.l.d $vr0, $vr1
+vftintrm.w.s $vr0, $vr1
+vftintrm.l.d $vr0, $vr1
+vftintrp.w.s $vr0, $vr1
+vftintrp.l.d $vr0, $vr1
+vftintrz.w.s $vr0, $vr1
+vftintrz.l.d $vr0, $vr1
+vftintrne.w.s $vr0, $vr1
+vftintrne.l.d $vr0, $vr1
+vftint.wu.s $vr0, $vr1
+vftint.lu.d $vr0, $vr1
+vftintrz.wu.s $vr0, $vr1
+vftintrz.lu.d $vr0, $vr1
+vftintl.l.s $vr0, $vr1
+vftinth.l.s $vr0, $vr1
+vftintrml.l.s $vr0, $vr1
+vftintrmh.l.s $vr0, $vr1
+vftintrpl.l.s $vr0, $vr1
+vftintrph.l.s $vr0, $vr1
+vftintrzl.l.s $vr0, $vr1
+vftintrzh.l.s $vr0, $vr1
+vftintrnel.l.s $vr0, $vr1
+vftintrneh.l.s $vr0, $vr1
+vexth.h.b $vr0, $vr1
+vexth.w.h $vr0, $vr1
+vexth.d.w $vr0, $vr1
+vexth.q.d $vr0, $vr1
+vexth.hu.bu $vr0, $vr1
+vexth.wu.hu $vr0, $vr1
+vexth.du.wu $vr0, $vr1
+vexth.qu.du $vr0, $vr1
+vreplgr2vr.b $vr0, $r1
+vreplgr2vr.h $vr0, $r1
+vreplgr2vr.w $vr0, $r1
+vreplgr2vr.d $vr0, $r1
+vrotri.b $vr0, $vr1, 1
+vrotri.h $vr0, $vr1, 1
+vrotri.w $vr0, $vr1, 1
+vrotri.d $vr0, $vr1, 1
+vsrlri.b $vr0, $vr1, 1
+vsrlri.h $vr0, $vr1, 1
+vsrlri.w $vr0, $vr1, 1
+vsrlri.d $vr0, $vr1, 1
+vsrari.b $vr0, $vr1, 1
+vsrari.h $vr0, $vr1, 1
+vsrari.w $vr0, $vr1, 1
+vsrari.d $vr0, $vr1, 1
+vinsgr2vr.b $vr0, $r1, 1
+vinsgr2vr.h $vr0, $r1, 1
+vinsgr2vr.w $vr0, $r1, 1
+vinsgr2vr.d $vr0, $r1, 1
+vpickve2gr.b $r0, $vr1, 1
+vpickve2gr.h $r0, $vr1, 1
+vpickve2gr.w $r0, $vr1, 1
+vpickve2gr.d $r0, $vr1, 1
+vpickve2gr.bu $r0, $vr1, 1
+vpickve2gr.hu $r0, $vr1, 1
+vpickve2gr.wu $r0, $vr1, 1
+vpickve2gr.du $r0, $vr1, 1
+vreplvei.b $vr0, $vr1, 1
+vreplvei.h $vr0, $vr1, 1
+vreplvei.w $vr0, $vr1, 1
+vreplvei.d $vr0, $vr1, 1
+vsllwil.h.b $vr0, $vr1, 1
+vsllwil.w.h $vr0, $vr1, 1
+vsllwil.d.w $vr0, $vr1, 1
+vextl.q.d $vr0, $vr1
+vsllwil.hu.bu $vr0, $vr1, 1
+vsllwil.wu.hu $vr0, $vr1, 1
+vsllwil.du.wu $vr0, $vr1, 1
+vextl.qu.du $vr0, $vr1
+vbitclri.b $vr0, $vr1, 1
+vbitclri.h $vr0, $vr1, 1
+vbitclri.w $vr0, $vr1, 1
+vbitclri.d $vr0, $vr1, 1
+vbitseti.b $vr0, $vr1, 1
+vbitseti.h $vr0, $vr1, 1
+vbitseti.w $vr0, $vr1, 1
+vbitseti.d $vr0, $vr1, 1
+vbitrevi.b $vr0, $vr1, 1
+vbitrevi.h $vr0, $vr1, 1
+vbitrevi.w $vr0, $vr1, 1
+vbitrevi.d $vr0, $vr1, 1
+vsat.b $vr0, $vr1, 1
+vsat.h $vr0, $vr1, 1
+vsat.w $vr0, $vr1, 1
+vsat.d $vr0, $vr1, 1
+vsat.bu $vr0, $vr1, 1
+vsat.hu $vr0, $vr1, 1
+vsat.wu $vr0, $vr1, 1
+vsat.du $vr0, $vr1, 1
+vslli.b $vr0, $vr1, 1
+vslli.h $vr0, $vr1, 1
+vslli.w $vr0, $vr1, 1
+vslli.d $vr0, $vr1, 1
+vsrli.b $vr0, $vr1, 1
+vsrli.h $vr0, $vr1, 1
+vsrli.w $vr0, $vr1, 1
+vsrli.d $vr0, $vr1, 1
+vsrai.b $vr0, $vr1, 1
+vsrai.h $vr0, $vr1, 1
+vsrai.w $vr0, $vr1, 1
+vsrai.d $vr0, $vr1, 1
+vsrlni.b.h $vr0, $vr1, 1
+vsrlni.h.w $vr0, $vr1, 1
+vsrlni.w.d $vr0, $vr1, 1
+vsrlni.d.q $vr0, $vr1, 1
+vssrlni.b.h $vr0, $vr1, 1
+vssrlni.h.w $vr0, $vr1, 1
+vssrlni.w.d $vr0, $vr1, 1
+vssrlni.d.q $vr0, $vr1, 1
+vsrlrni.b.h $vr0, $vr1, 1
+vsrlrni.h.w $vr0, $vr1, 1
+vsrlrni.w.d $vr0, $vr1, 1
+vsrlrni.d.q $vr0, $vr1, 1
+vssrlni.bu.h $vr0, $vr1, 1
+vssrlni.hu.w $vr0, $vr1, 1
+vssrlni.wu.d $vr0, $vr1, 1
+vssrlni.du.q $vr0, $vr1, 1
+vssrlrni.b.h $vr0, $vr1, 1
+vssrlrni.h.w $vr0, $vr1, 1
+vssrlrni.w.d $vr0, $vr1, 1
+vssrlrni.d.q $vr0, $vr1, 1
+vssrlrni.bu.h $vr0, $vr1, 1
+vssrlrni.hu.w $vr0, $vr1, 1
+vssrlrni.wu.d $vr0, $vr1, 1
+vssrlrni.du.q $vr0, $vr1, 1
+vsrani.b.h $vr0, $vr1, 1
+vsrani.h.w $vr0, $vr1, 1
+vsrani.w.d $vr0, $vr1, 1
+vsrani.d.q $vr0, $vr1, 1
+vsrarni.b.h $vr0, $vr1, 1
+vsrarni.h.w $vr0, $vr1, 1
+vsrarni.w.d $vr0, $vr1, 1
+vsrarni.d.q $vr0, $vr1, 1
+vssrani.b.h $vr0, $vr1, 1
+vssrani.h.w $vr0, $vr1, 1
+vssrani.w.d $vr0, $vr1, 1
+vssrani.d.q $vr0, $vr1, 1
+vssrani.bu.h $vr0, $vr1, 1
+vssrani.hu.w $vr0, $vr1, 1
+vssrani.wu.d $vr0, $vr1, 1
+vssrani.du.q $vr0, $vr1, 1
+vssrarni.b.h $vr0, $vr1, 1
+vssrarni.h.w $vr0, $vr1, 1
+vssrarni.w.d $vr0, $vr1, 1
+vssrarni.d.q $vr0, $vr1, 1
+vssrarni.bu.h $vr0, $vr1, 1
+vssrarni.hu.w $vr0, $vr1, 1
+vssrarni.wu.d $vr0, $vr1, 1
+vssrarni.du.q $vr0, $vr1, 1
+vextrins.d $vr0, $vr1, 1
+vextrins.w $vr0, $vr1, 1
+vextrins.h $vr0, $vr1, 1
+vextrins.b $vr0, $vr1, 1
+vshuf4i.b $vr0, $vr1, 1
+vshuf4i.h $vr0, $vr1, 1
+vshuf4i.w $vr0, $vr1, 1
+vshuf4i.d $vr0, $vr1, 1
+vbitseli.b $vr0, $vr1, 1
+vandi.b $vr0, $vr1, 1
+vori.b $vr0, $vr1, 1
+vxori.b $vr0, $vr1, 1
+vnori.b $vr0, $vr1, 1
+vrepli.b $vr0, 1
+vaddwev.h.b $vr0, $vr1, $vr2
+vaddwev.w.h $vr0, $vr1, $vr2
+vaddwev.d.w $vr0, $vr1, $vr2
+vaddwev.q.d $vr0, $vr1, $vr2
+vaddwev.h.bu $vr0, $vr1, $vr2
+vaddwev.w.hu $vr0, $vr1, $vr2
+vaddwev.d.wu $vr0, $vr1, $vr2
+vaddwev.q.du $vr0, $vr1, $vr2
+vaddwev.h.bu.b $vr0, $vr1, $vr2
+vaddwev.w.hu.h $vr0, $vr1, $vr2
+vaddwev.d.wu.w $vr0, $vr1, $vr2
+vaddwev.q.du.d $vr0, $vr1, $vr2
+vaddwod.h.b $vr0, $vr1, $vr2
+vaddwod.w.h $vr0, $vr1, $vr2
+vaddwod.d.w $vr0, $vr1, $vr2
+vaddwod.q.d $vr0, $vr1, $vr2
+vaddwod.h.bu $vr0, $vr1, $vr2
+vaddwod.w.hu $vr0, $vr1, $vr2
+vaddwod.d.wu $vr0, $vr1, $vr2
+vaddwod.q.du $vr0, $vr1, $vr2
+vaddwod.h.bu.b $vr0, $vr1, $vr2
+vaddwod.w.hu.h $vr0, $vr1, $vr2
+vaddwod.d.wu.w $vr0, $vr1, $vr2
+vaddwod.q.du.d $vr0, $vr1, $vr2
+vmaddwev.h.b $vr0, $vr1, $vr2
+vmaddwev.w.h $vr0, $vr1, $vr2
+vmaddwev.d.w $vr0, $vr1, $vr2
+vmaddwev.q.d $vr0, $vr1, $vr2
+vmaddwev.h.bu $vr0, $vr1, $vr2
+vmaddwev.w.hu $vr0, $vr1, $vr2
+vmaddwev.d.wu $vr0, $vr1, $vr2
+vmaddwev.q.du $vr0, $vr1, $vr2
+vmaddwev.h.bu.b $vr0, $vr1, $vr2
+vmaddwev.w.hu.h $vr0, $vr1, $vr2
+vmaddwev.d.wu.w $vr0, $vr1, $vr2
+vmaddwev.q.du.d $vr0, $vr1, $vr2
+vmaddwod.h.b $vr0, $vr1, $vr2
+vmaddwod.w.h $vr0, $vr1, $vr2
+vmaddwod.d.w $vr0, $vr1, $vr2
+vmaddwod.q.d $vr0, $vr1, $vr2
+vmaddwod.h.bu $vr0, $vr1, $vr2
+vmaddwod.w.hu $vr0, $vr1, $vr2
+vmaddwod.d.wu $vr0, $vr1, $vr2
+vmaddwod.q.du $vr0, $vr1, $vr2
+vmaddwod.h.bu.b $vr0, $vr1, $vr2
+vmaddwod.w.hu.h $vr0, $vr1, $vr2
+vmaddwod.d.wu.w $vr0, $vr1, $vr2
+vmaddwod.q.du.d $vr0, $vr1, $vr2
+vmulwev.h.b $vr0, $vr1, $vr2
+vmulwev.w.h $vr0, $vr1, $vr2
+vmulwev.d.w $vr0, $vr1, $vr2
+vmulwev.q.d $vr0, $vr1, $vr2
+vmulwev.h.bu $vr0, $vr1, $vr2
+vmulwev.w.hu $vr0, $vr1, $vr2
+vmulwev.d.wu $vr0, $vr1, $vr2
+vmulwev.q.du $vr0, $vr1, $vr2
+vmulwev.h.bu.b $vr0, $vr1, $vr2
+vmulwev.w.hu.h $vr0, $vr1, $vr2
+vmulwev.d.wu.w $vr0, $vr1, $vr2
+vmulwev.q.du.d $vr0, $vr1, $vr2
+vmulwod.h.b $vr0, $vr1, $vr2
+vmulwod.w.h $vr0, $vr1, $vr2
+vmulwod.d.w $vr0, $vr1, $vr2
+vmulwod.q.d $vr0, $vr1, $vr2
+vmulwod.h.bu $vr0, $vr1, $vr2
+vmulwod.w.hu $vr0, $vr1, $vr2
+vmulwod.d.wu $vr0, $vr1, $vr2
+vmulwod.q.du $vr0, $vr1, $vr2
+vmulwod.h.bu.b $vr0, $vr1, $vr2
+vmulwod.w.hu.h $vr0, $vr1, $vr2
+vmulwod.d.wu.w $vr0, $vr1, $vr2
+vmulwod.q.du.d $vr0, $vr1, $vr2
+vsubwev.h.b $vr0, $vr1, $vr2
+vsubwev.w.h $vr0, $vr1, $vr2
+vsubwev.d.w $vr0, $vr1, $vr2
+vsubwev.q.d $vr0, $vr1, $vr2
+vsubwev.h.bu $vr0, $vr1, $vr2
+vsubwev.w.hu $vr0, $vr1, $vr2
+vsubwev.d.wu $vr0, $vr1, $vr2
+vsubwev.q.du $vr0, $vr1, $vr2
+vsubwod.h.b $vr0, $vr1, $vr2
+vsubwod.w.h $vr0, $vr1, $vr2
+vsubwod.d.w $vr0, $vr1, $vr2
+vsubwod.q.d $vr0, $vr1, $vr2
+vsubwod.h.bu $vr0, $vr1, $vr2
+vsubwod.w.hu $vr0, $vr1, $vr2
+vsubwod.d.wu $vr0, $vr1, $vr2
+vsubwod.q.du $vr0, $vr1, $vr2
+vrepli.d $vr0, 1
+vrepli.h $vr0, 1
+vrepli.w $vr0, 1
+vldi $vr0, 1
+vpermi.w $vr0, $vr1, 1
+vext2xv.h.b $xr0, $xr1
+vext2xv.w.b $xr0, $xr1
+vext2xv.d.b $xr0, $xr1
+vext2xv.w.h $xr0, $xr1
+vext2xv.d.h $xr0, $xr1
+vext2xv.d.w $xr0, $xr1
+vext2xv.hu.bu $xr0, $xr1
+vext2xv.wu.bu $xr0, $xr1
+vext2xv.du.bu $xr0, $xr1
+vext2xv.wu.hu $xr0, $xr1
+vext2xv.du.hu $xr0, $xr1
+vext2xv.du.wu $xr0, $xr1
+vfrecipe.s $vr0, $vr1
+vfrecipe.d $vr0, $vr1
+vfrsqrte.s $vr0, $vr1
+vfrsqrte.d $vr0, $vr1
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v1 4/7] LoongArch: Add gas testsuit for LA64 int/float instructions
2024-02-29 11:45 [PATCH v1 0/7] Organize instructions and relocations test cases in gas Lulu Cai
` (2 preceding siblings ...)
2024-02-29 11:45 ` [PATCH v1 3/7] LoongArch: Add gas testsuit for lsx/lasx instructions Lulu Cai
@ 2024-02-29 11:45 ` Lulu Cai
3 siblings, 0 replies; 5+ messages in thread
From: Lulu Cai @ 2024-02-29 11:45 UTC (permalink / raw)
To: binutils
Cc: xuchenghua, chenglulu, liuzhensong, mengqinggang, xry111,
i.swmail, maskray, luweining, wanglei, hejinyang, Lulu Cai
Test the int/float instructions of LA64.
---
gas/testsuite/gas/loongarch/insn_float64.d | 165 ++++++++
gas/testsuite/gas/loongarch/insn_float64.s | 157 ++++++++
gas/testsuite/gas/loongarch/insn_int64.d | 430 ++++++++++++++++++++
gas/testsuite/gas/loongarch/insn_int64.s | 440 +++++++++++++++++++++
4 files changed, 1192 insertions(+)
create mode 100644 gas/testsuite/gas/loongarch/insn_float64.d
create mode 100644 gas/testsuite/gas/loongarch/insn_float64.s
create mode 100644 gas/testsuite/gas/loongarch/insn_int64.d
create mode 100644 gas/testsuite/gas/loongarch/insn_int64.s
diff --git a/gas/testsuite/gas/loongarch/insn_float64.d b/gas/testsuite/gas/loongarch/insn_float64.d
new file mode 100644
index 00000000000..4ffbfa78508
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_float64.d
@@ -0,0 +1,165 @@
+#as-new:
+#objdump: -d
+#skip: loongarch32-*-*
+
+.*: file format .*
+
+
+Disassembly of section .text:
+
+0+ <.*>:
+ 0: 01008820 fadd.s \$fa0, \$fa1, \$fa2
+ 4: 01010820 fadd.d \$fa0, \$fa1, \$fa2
+ 8: 01028820 fsub.s \$fa0, \$fa1, \$fa2
+ c: 01030820 fsub.d \$fa0, \$fa1, \$fa2
+ 10: 01048820 fmul.s \$fa0, \$fa1, \$fa2
+ 14: 01050820 fmul.d \$fa0, \$fa1, \$fa2
+ 18: 01068820 fdiv.s \$fa0, \$fa1, \$fa2
+ 1c: 01070820 fdiv.d \$fa0, \$fa1, \$fa2
+ 20: 01088820 fmax.s \$fa0, \$fa1, \$fa2
+ 24: 01090820 fmax.d \$fa0, \$fa1, \$fa2
+ 28: 010a8820 fmin.s \$fa0, \$fa1, \$fa2
+ 2c: 010b0820 fmin.d \$fa0, \$fa1, \$fa2
+ 30: 010c8820 fmaxa.s \$fa0, \$fa1, \$fa2
+ 34: 010d0820 fmaxa.d \$fa0, \$fa1, \$fa2
+ 38: 010e8820 fmina.s \$fa0, \$fa1, \$fa2
+ 3c: 010f0820 fmina.d \$fa0, \$fa1, \$fa2
+ 40: 01108820 fscaleb.s \$fa0, \$fa1, \$fa2
+ 44: 01110820 fscaleb.d \$fa0, \$fa1, \$fa2
+ 48: 01128820 fcopysign.s \$fa0, \$fa1, \$fa2
+ 4c: 01130820 fcopysign.d \$fa0, \$fa1, \$fa2
+ 50: 01140420 fabs.s \$fa0, \$fa1
+ 54: 01140820 fabs.d \$fa0, \$fa1
+ 58: 01141420 fneg.s \$fa0, \$fa1
+ 5c: 01141820 fneg.d \$fa0, \$fa1
+ 60: 01142420 flogb.s \$fa0, \$fa1
+ 64: 01142820 flogb.d \$fa0, \$fa1
+ 68: 01143420 fclass.s \$fa0, \$fa1
+ 6c: 01143820 fclass.d \$fa0, \$fa1
+ 70: 01144420 fsqrt.s \$fa0, \$fa1
+ 74: 01144820 fsqrt.d \$fa0, \$fa1
+ 78: 01145420 frecip.s \$fa0, \$fa1
+ 7c: 01145820 frecip.d \$fa0, \$fa1
+ 80: 01146420 frsqrt.s \$fa0, \$fa1
+ 84: 01146820 frsqrt.d \$fa0, \$fa1
+ 88: 01149420 fmov.s \$fa0, \$fa1
+ 8c: 01149820 fmov.d \$fa0, \$fa1
+ 90: 0114a4a0 movgr2fr.w \$fa0, \$a1
+ 94: 0114a8a0 movgr2fr.d \$fa0, \$a1
+ 98: 0114aca0 movgr2frh.w \$fa0, \$a1
+ 9c: 0114b424 movfr2gr.s \$a0, \$fa1
+ a0: 0114b824 movfr2gr.d \$a0, \$fa1
+ a4: 0114bc24 movfrh2gr.s \$a0, \$fa1
+ a8: 0114c0a0 movgr2fcsr \$fcsr0, \$a1
+ ac: 0114c804 movfcsr2gr \$a0, \$fcsr0
+ b0: 0114d020 movfr2cf \$fcc0, \$fa1
+ b4: 0114d4a0 movcf2fr \$fa0, \$fcc5
+ b8: 0114d8a0 movgr2cf \$fcc0, \$a1
+ bc: 0114dca4 movcf2gr \$a0, \$fcc5
+ c0: 01191820 fcvt.s.d \$fa0, \$fa1
+ c4: 01192420 fcvt.d.s \$fa0, \$fa1
+ c8: 011a0420 ftintrm.w.s \$fa0, \$fa1
+ cc: 011a0820 ftintrm.w.d \$fa0, \$fa1
+ d0: 011a2420 ftintrm.l.s \$fa0, \$fa1
+ d4: 011a2820 ftintrm.l.d \$fa0, \$fa1
+ d8: 011a4420 ftintrp.w.s \$fa0, \$fa1
+ dc: 011a4820 ftintrp.w.d \$fa0, \$fa1
+ e0: 011a6420 ftintrp.l.s \$fa0, \$fa1
+ e4: 011a6820 ftintrp.l.d \$fa0, \$fa1
+ e8: 011a8420 ftintrz.w.s \$fa0, \$fa1
+ ec: 011a8820 ftintrz.w.d \$fa0, \$fa1
+ f0: 011aa420 ftintrz.l.s \$fa0, \$fa1
+ f4: 011aa820 ftintrz.l.d \$fa0, \$fa1
+ f8: 011ac420 ftintrne.w.s \$fa0, \$fa1
+ fc: 011ac820 ftintrne.w.d \$fa0, \$fa1
+ 100: 011ae420 ftintrne.l.s \$fa0, \$fa1
+ 104: 011ae820 ftintrne.l.d \$fa0, \$fa1
+ 108: 011b0420 ftint.w.s \$fa0, \$fa1
+ 10c: 011b0820 ftint.w.d \$fa0, \$fa1
+ 110: 011b2420 ftint.l.s \$fa0, \$fa1
+ 114: 011b2820 ftint.l.d \$fa0, \$fa1
+ 118: 011d1020 ffint.s.w \$fa0, \$fa1
+ 11c: 011d1820 ffint.s.l \$fa0, \$fa1
+ 120: 011d2020 ffint.d.w \$fa0, \$fa1
+ 124: 011d2820 ffint.d.l \$fa0, \$fa1
+ 128: 011e4420 frint.s \$fa0, \$fa1
+ 12c: 011e4820 frint.d \$fa0, \$fa1
+ 130: 01147420 frecipe.s \$fa0, \$fa1
+ 134: 01147820 frecipe.d \$fa0, \$fa1
+ 138: 01148420 frsqrte.s \$fa0, \$fa1
+ 13c: 01148820 frsqrte.d \$fa0, \$fa1
+ 140: 08118820 fmadd.s \$fa0, \$fa1, \$fa2, \$fa3
+ 144: 08218820 fmadd.d \$fa0, \$fa1, \$fa2, \$fa3
+ 148: 08518820 fmsub.s \$fa0, \$fa1, \$fa2, \$fa3
+ 14c: 08618820 fmsub.d \$fa0, \$fa1, \$fa2, \$fa3
+ 150: 08918820 fnmadd.s \$fa0, \$fa1, \$fa2, \$fa3
+ 154: 08a18820 fnmadd.d \$fa0, \$fa1, \$fa2, \$fa3
+ 158: 08d18820 fnmsub.s \$fa0, \$fa1, \$fa2, \$fa3
+ 15c: 08e18820 fnmsub.d \$fa0, \$fa1, \$fa2, \$fa3
+ 160: 0c100820 fcmp.caf.s \$fcc0, \$fa1, \$fa2
+ 164: 0c108820 fcmp.saf.s \$fcc0, \$fa1, \$fa2
+ 168: 0c110820 fcmp.clt.s \$fcc0, \$fa1, \$fa2
+ 16c: 0c118820 fcmp.slt.s \$fcc0, \$fa1, \$fa2
+ 170: 0c118820 fcmp.slt.s \$fcc0, \$fa1, \$fa2
+ 174: 0c120820 fcmp.ceq.s \$fcc0, \$fa1, \$fa2
+ 178: 0c128820 fcmp.seq.s \$fcc0, \$fa1, \$fa2
+ 17c: 0c130820 fcmp.cle.s \$fcc0, \$fa1, \$fa2
+ 180: 0c138820 fcmp.sle.s \$fcc0, \$fa1, \$fa2
+ 184: 0c138820 fcmp.sle.s \$fcc0, \$fa1, \$fa2
+ 188: 0c140820 fcmp.cun.s \$fcc0, \$fa1, \$fa2
+ 18c: 0c148820 fcmp.sun.s \$fcc0, \$fa1, \$fa2
+ 190: 0c150820 fcmp.cult.s \$fcc0, \$fa1, \$fa2
+ 194: 0c150820 fcmp.cult.s \$fcc0, \$fa1, \$fa2
+ 198: 0c158820 fcmp.sult.s \$fcc0, \$fa1, \$fa2
+ 19c: 0c160820 fcmp.cueq.s \$fcc0, \$fa1, \$fa2
+ 1a0: 0c168820 fcmp.sueq.s \$fcc0, \$fa1, \$fa2
+ 1a4: 0c170820 fcmp.cule.s \$fcc0, \$fa1, \$fa2
+ 1a8: 0c170820 fcmp.cule.s \$fcc0, \$fa1, \$fa2
+ 1ac: 0c178820 fcmp.sule.s \$fcc0, \$fa1, \$fa2
+ 1b0: 0c180820 fcmp.cne.s \$fcc0, \$fa1, \$fa2
+ 1b4: 0c188820 fcmp.sne.s \$fcc0, \$fa1, \$fa2
+ 1b8: 0c1a0820 fcmp.cor.s \$fcc0, \$fa1, \$fa2
+ 1bc: 0c1a8820 fcmp.sor.s \$fcc0, \$fa1, \$fa2
+ 1c0: 0c1c0820 fcmp.cune.s \$fcc0, \$fa1, \$fa2
+ 1c4: 0c1c8820 fcmp.sune.s \$fcc0, \$fa1, \$fa2
+ 1c8: 0c200820 fcmp.caf.d \$fcc0, \$fa1, \$fa2
+ 1cc: 0c208820 fcmp.saf.d \$fcc0, \$fa1, \$fa2
+ 1d0: 0c210820 fcmp.clt.d \$fcc0, \$fa1, \$fa2
+ 1d4: 0c218820 fcmp.slt.d \$fcc0, \$fa1, \$fa2
+ 1d8: 0c218820 fcmp.slt.d \$fcc0, \$fa1, \$fa2
+ 1dc: 0c220820 fcmp.ceq.d \$fcc0, \$fa1, \$fa2
+ 1e0: 0c228820 fcmp.seq.d \$fcc0, \$fa1, \$fa2
+ 1e4: 0c230820 fcmp.cle.d \$fcc0, \$fa1, \$fa2
+ 1e8: 0c238820 fcmp.sle.d \$fcc0, \$fa1, \$fa2
+ 1ec: 0c238820 fcmp.sle.d \$fcc0, \$fa1, \$fa2
+ 1f0: 0c240820 fcmp.cun.d \$fcc0, \$fa1, \$fa2
+ 1f4: 0c248820 fcmp.sun.d \$fcc0, \$fa1, \$fa2
+ 1f8: 0c250820 fcmp.cult.d \$fcc0, \$fa1, \$fa2
+ 1fc: 0c250820 fcmp.cult.d \$fcc0, \$fa1, \$fa2
+ 200: 0c258820 fcmp.sult.d \$fcc0, \$fa1, \$fa2
+ 204: 0c260820 fcmp.cueq.d \$fcc0, \$fa1, \$fa2
+ 208: 0c268820 fcmp.sueq.d \$fcc0, \$fa1, \$fa2
+ 20c: 0c270820 fcmp.cule.d \$fcc0, \$fa1, \$fa2
+ 210: 0c270820 fcmp.cule.d \$fcc0, \$fa1, \$fa2
+ 214: 0c278820 fcmp.sule.d \$fcc0, \$fa1, \$fa2
+ 218: 0c280820 fcmp.cne.d \$fcc0, \$fa1, \$fa2
+ 21c: 0c288820 fcmp.sne.d \$fcc0, \$fa1, \$fa2
+ 220: 0c2a0820 fcmp.cor.d \$fcc0, \$fa1, \$fa2
+ 224: 0c2a8820 fcmp.sor.d \$fcc0, \$fa1, \$fa2
+ 228: 0c2c0820 fcmp.cune.d \$fcc0, \$fa1, \$fa2
+ 22c: 0c2c8820 fcmp.sune.d \$fcc0, \$fa1, \$fa2
+ 230: 0d000820 fsel \$fa0, \$fa1, \$fa2, \$fcc0
+ 234: 2b00058a fld.s \$ft2, \$t0, 1
+ 238: 2b40058a fst.s \$ft2, \$t0, 1
+ 23c: 2b80058a fld.d \$ft2, \$t0, 1
+ 240: 2bc0058a fst.d \$ft2, \$t0, 1
+ 244: 38741480 fldgt.s \$fa0, \$a0, \$a1
+ 248: 38749480 fldgt.d \$fa0, \$a0, \$a1
+ 24c: 38751480 fldle.s \$fa0, \$a0, \$a1
+ 250: 38759480 fldle.d \$fa0, \$a0, \$a1
+ 254: 38761480 fstgt.s \$fa0, \$a0, \$a1
+ 258: 38769480 fstgt.d \$fa0, \$a0, \$a1
+ 25c: 38771480 fstle.s \$fa0, \$a0, \$a1
+ 260: 38779480 fstle.d \$fa0, \$a0, \$a1
+ 264: 48000000 bceqz \$fcc0, 0 # 0x264
+ 268: 48000100 bcnez \$fcc0, 0 # 0x268
diff --git a/gas/testsuite/gas/loongarch/insn_float64.s b/gas/testsuite/gas/loongarch/insn_float64.s
new file mode 100644
index 00000000000..a7ce56efedf
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_float64.s
@@ -0,0 +1,157 @@
+fadd.s $f0,$f1,$f2
+fadd.d $f0,$f1,$f2
+fsub.s $f0,$f1,$f2
+fsub.d $f0,$f1,$f2
+fmul.s $f0,$f1,$f2
+fmul.d $f0,$f1,$f2
+fdiv.s $f0,$f1,$f2
+fdiv.d $f0,$f1,$f2
+fmax.s $f0,$f1,$f2
+fmax.d $f0,$f1,$f2
+fmin.s $f0,$f1,$f2
+fmin.d $f0,$f1,$f2
+fmaxa.s $f0,$f1,$f2
+fmaxa.d $f0,$f1,$f2
+fmina.s $f0,$f1,$f2
+fmina.d $f0,$f1,$f2
+fscaleb.s $f0,$f1,$f2
+fscaleb.d $f0,$f1,$f2
+fcopysign.s $f0,$f1,$f2
+fcopysign.d $f0,$f1,$f2
+fabs.s $f0,$f1
+fabs.d $f0,$f1
+fneg.s $f0,$f1
+fneg.d $f0,$f1
+flogb.s $f0,$f1
+flogb.d $f0,$f1
+fclass.s $f0,$f1
+fclass.d $f0,$f1
+fsqrt.s $f0,$f1
+fsqrt.d $f0,$f1
+frecip.s $f0,$f1
+frecip.d $f0,$f1
+frsqrt.s $f0,$f1
+frsqrt.d $f0,$f1
+fmov.s $f0,$f1
+fmov.d $f0,$f1
+movgr2fr.w $f0,$r5
+movgr2fr.d $f0,$r5
+movgr2frh.w $f0,$r5
+movfr2gr.s $r4,$f1
+movfr2gr.d $r4,$f1
+movfrh2gr.s $r4,$f1
+movgr2fcsr $fcsr0,$r5
+movfcsr2gr $r4,$fcsr0
+movfr2cf $fcc0,$f1
+movcf2fr $f0,$fcc5
+movgr2cf $fcc0,$r5
+movcf2gr $r4,$fcc5
+fcvt.s.d $f0,$f1
+fcvt.d.s $f0,$f1
+ftintrm.w.s $f0,$f1
+ftintrm.w.d $f0,$f1
+ftintrm.l.s $f0,$f1
+ftintrm.l.d $f0,$f1
+ftintrp.w.s $f0,$f1
+ftintrp.w.d $f0,$f1
+ftintrp.l.s $f0,$f1
+ftintrp.l.d $f0,$f1
+ftintrz.w.s $f0,$f1
+ftintrz.w.d $f0,$f1
+ftintrz.l.s $f0,$f1
+ftintrz.l.d $f0,$f1
+ftintrne.w.s $f0,$f1
+ftintrne.w.d $f0,$f1
+ftintrne.l.s $f0,$f1
+ftintrne.l.d $f0,$f1
+ftint.w.s $f0,$f1
+ftint.w.d $f0,$f1
+ftint.l.s $f0,$f1
+ftint.l.d $f0,$f1
+ffint.s.w $f0,$f1
+ffint.s.l $f0,$f1
+ffint.d.w $f0,$f1
+ffint.d.l $f0,$f1
+frint.s $f0,$f1
+frint.d $f0,$f1
+frecipe.s $f0,$f1
+frecipe.d $f0,$f1
+frsqrte.s $f0,$f1
+frsqrte.d $f0,$f1
+
+# 4_opt_op
+fmadd.s $f0,$f1,$f2,$f3
+fmadd.d $f0,$f1,$f2,$f3
+fmsub.s $f0,$f1,$f2,$f3
+fmsub.d $f0,$f1,$f2,$f3
+fnmadd.s $f0,$f1,$f2,$f3
+fnmadd.d $f0,$f1,$f2,$f3
+fnmsub.s $f0,$f1,$f2,$f3
+fnmsub.d $f0,$f1,$f2,$f3
+fcmp.caf.s $fcc0,$f1,$f2
+fcmp.saf.s $fcc0,$f1,$f2
+fcmp.clt.s $fcc0,$f1,$f2
+fcmp.slt.s $fcc0,$f1,$f2
+fcmp.sgt.s $fcc0,$f2,$f1
+fcmp.ceq.s $fcc0,$f1,$f2
+fcmp.seq.s $fcc0,$f1,$f2
+fcmp.cle.s $fcc0,$f1,$f2
+fcmp.sle.s $fcc0,$f1,$f2
+fcmp.sge.s $fcc0,$f2,$f1
+fcmp.cun.s $fcc0,$f1,$f2
+fcmp.sun.s $fcc0,$f1,$f2
+fcmp.cult.s $fcc0,$f1,$f2
+fcmp.cugt.s $fcc0,$f2,$f1
+fcmp.sult.s $fcc0,$f1,$f2
+fcmp.cueq.s $fcc0,$f1,$f2
+fcmp.sueq.s $fcc0,$f1,$f2
+fcmp.cule.s $fcc0,$f1,$f2
+fcmp.cuge.s $fcc0,$f2,$f1
+fcmp.sule.s $fcc0,$f1,$f2
+fcmp.cne.s $fcc0,$f1,$f2
+fcmp.sne.s $fcc0,$f1,$f2
+fcmp.cor.s $fcc0,$f1,$f2
+fcmp.sor.s $fcc0,$f1,$f2
+fcmp.cune.s $fcc0,$f1,$f2
+fcmp.sune.s $fcc0,$f1,$f2
+fcmp.caf.d $fcc0,$f1,$f2
+fcmp.saf.d $fcc0,$f1,$f2
+fcmp.clt.d $fcc0,$f1,$f2
+fcmp.slt.d $fcc0,$f1,$f2
+fcmp.sgt.d $fcc0,$f2,$f1
+fcmp.ceq.d $fcc0,$f1,$f2
+fcmp.seq.d $fcc0,$f1,$f2
+fcmp.cle.d $fcc0,$f1,$f2
+fcmp.sle.d $fcc0,$f1,$f2
+fcmp.sge.d $fcc0,$f2,$f1
+fcmp.cun.d $fcc0,$f1,$f2
+fcmp.sun.d $fcc0,$f1,$f2
+fcmp.cult.d $fcc0,$f1,$f2
+fcmp.cugt.d $fcc0,$f2,$f1
+fcmp.sult.d $fcc0,$f1,$f2
+fcmp.cueq.d $fcc0,$f1,$f2
+fcmp.sueq.d $fcc0,$f1,$f2
+fcmp.cule.d $fcc0,$f1,$f2
+fcmp.cuge.d $fcc0,$f2,$f1
+fcmp.sule.d $fcc0,$f1,$f2
+fcmp.cne.d $fcc0,$f1,$f2
+fcmp.sne.d $fcc0,$f1,$f2
+fcmp.cor.d $fcc0,$f1,$f2
+fcmp.sor.d $fcc0,$f1,$f2
+fcmp.cune.d $fcc0,$f1,$f2
+fcmp.sune.d $fcc0,$f1,$f2
+fsel $f0,$f1,$f2,$fcc0
+fld.s $f10,$r12,1
+fst.s $f10,$r12,1
+fld.d $f10,$r12,1
+fst.d $f10,$r12,1
+fldgt.s $f0,$a0,$a1
+fldgt.d $f0,$a0,$a1
+fldle.s $f0,$a0,$a1
+fldle.d $f0,$a0,$a1
+fstgt.s $f0,$a0,$a1
+fstgt.d $f0,$a0,$a1
+fstle.s $f0,$a0,$a1
+fstle.d $f0,$a0,$a1
+bceqz $fcc0,.L1
+bcnez $fcc0,.L1
diff --git a/gas/testsuite/gas/loongarch/insn_int64.d b/gas/testsuite/gas/loongarch/insn_int64.d
new file mode 100644
index 00000000000..360b840d415
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_int64.d
@@ -0,0 +1,430 @@
+#as-new:
+#objdump: -d -M no-aliases
+#skip: loongarch32-*-*
+
+.*: file format .*
+
+
+Disassembly of section .text:
+
+0+ <.*>:
+ 0: 020000a4 slti \$a0, \$a1, 0
+ 4: 021ffca4 slti \$a0, \$a1, 2047
+ 8: 022004a4 slti \$a0, \$a1, -2047
+ c: 024000a4 sltui \$a0, \$a1, 0
+ 10: 025ffca4 sltui \$a0, \$a1, 2047
+ 14: 026004a4 sltui \$a0, \$a1, -2047
+ 18: 028000a4 addi.w \$a0, \$a1, 0
+ 1c: 029ffca4 addi.w \$a0, \$a1, 2047
+ 20: 02a004a4 addi.w \$a0, \$a1, -2047
+ 24: 02c000a4 addi.d \$a0, \$a1, 0
+ 28: 02dffca4 addi.d \$a0, \$a1, 2047
+ 2c: 02e004a4 addi.d \$a0, \$a1, -2047
+ 30: 030000a4 lu52i.d \$a0, \$a1, 0
+ 34: 031ffca4 lu52i.d \$a0, \$a1, 2047
+ 38: 032004a4 lu52i.d \$a0, \$a1, -2047
+ 3c: 034000a4 andi \$a0, \$a1, 0x0
+ 40: 035ffca4 andi \$a0, \$a1, 0x7ff
+ 44: 038000a4 ori \$a0, \$a1, 0x0
+ 48: 039ffca4 ori \$a0, \$a1, 0x7ff
+ 4c: 03c000a4 xori \$a0, \$a1, 0x0
+ 50: 03dffca4 xori \$a0, \$a1, 0x7ff
+ 54: 100000a4 addu16i.d \$a0, \$a1, 0
+ 58: 11fffca4 addu16i.d \$a0, \$a1, 32767
+ 5c: 120004a4 addu16i.d \$a0, \$a1, -32767
+ 60: 14000004 lu12i.w \$a0, 0
+ 64: 14ffffe4 lu12i.w \$a0, 524287
+ 68: 17000024 lu32i.d \$a0, -524287
+ 6c: 18000004 pcaddi \$a0, 0
+ 70: 18ffffe4 pcaddi \$a0, 524287
+ 74: 19000004 pcaddi \$a0, -524288
+ 78: 1a000004 pcalau12i \$a0, 0
+ 7c: 1affffe4 pcalau12i \$a0, 524287
+ 80: 1b000024 pcalau12i \$a0, -524287
+ 84: 1c000004 pcaddu12i \$a0, 0
+ 88: 1cffffe4 pcaddu12i \$a0, 524287
+ 8c: 1d000024 pcaddu12i \$a0, -524287
+ 90: 1e000004 pcaddu18i \$a0, 0
+ 94: 1effffe4 pcaddu18i \$a0, 524287
+ 98: 1f000024 pcaddu18i \$a0, -524287
+ 9c: 0004b58b alsl.w \$a7, \$t0, \$t1, 0x2
+ a0: 0006b58b alsl.wu \$a7, \$t0, \$t1, 0x2
+ a4: 0009358b bytepick.w \$a7, \$t0, \$t1, 0x2
+ a8: 000d358b bytepick.d \$a7, \$t0, \$t1, 0x2
+ ac: 002a0002 break 0x2
+ b0: 002a8002 dbcl 0x2
+ b4: 002b0002 syscall 0x2
+ b8: 002cb58b alsl.d \$a7, \$t0, \$t1, 0x2
+ bc: 0040898b slli.w \$a7, \$t0, 0x2
+ c0: 0041098b slli.d \$a7, \$t0, 0x2
+ c4: 0044898b srli.w \$a7, \$t0, 0x2
+ c8: 004509ac srli.d \$t0, \$t1, 0x2
+ cc: 004889ac srai.w \$t0, \$t1, 0x2
+ d0: 004909ac srai.d \$t0, \$t1, 0x2
+ d4: 006209ac bstrins.w \$t0, \$t1, 0x2, 0x2
+ d8: 008209ac bstrins.d \$t0, \$t1, 0x2, 0x2
+ dc: 00c209ac bstrpick.d \$t0, \$t1, 0x2, 0x2
+ e0: 00c209ac bstrpick.d \$t0, \$t1, 0x2, 0x2
+ e4: 02048dac slti \$t0, \$t1, 291
+ e8: 02448dac sltui \$t0, \$t1, 291
+ ec: 02848dac addi.w \$t0, \$t1, 291
+ f0: 02c48dac addi.d \$t0, \$t1, 291
+ f4: 03048dac lu52i.d \$t0, \$t1, 291
+ f8: 034009ac andi \$t0, \$t1, 0x2
+ fc: 038009ac ori \$t0, \$t1, 0x2
+ 100: 03c009ac xori \$t0, \$t1, 0x2
+ 104: 100009ac addu16i.d \$t0, \$t1, 2
+ 108: 1400246c lu12i.w \$t0, 291
+ 10c: 1600246c lu32i.d \$t0, 291
+ 110: 1800000c pcaddi \$t0, 0
+ 114: 1a00246c pcalau12i \$t0, 291
+ 118: 1c00246c pcaddu12i \$t0, 291
+ 11c: 1e00246c pcaddu18i \$t0, 291
+ 120: 04048c0c csrrd \$t0, 0x123
+ 124: 04048c2c csrwr \$t0, 0x123
+ 128: 040009ac csrxchg \$t0, \$t1, 0x2
+ 12c: 060009a2 cacop 0x2, \$t1, 2
+ 130: 064009ac lddir \$t0, \$t1, 0x2
+ 134: 06440980 ldpte \$t0, 0x2
+ 138: 0649b9a2 invtlb 0x2, \$t1, \$t2
+ 13c: 000010a4 clo.w \$a0, \$a1
+ 140: 000014a4 clz.w \$a0, \$a1
+ 144: 000018a4 cto.w \$a0, \$a1
+ 148: 00001ca4 ctz.w \$a0, \$a1
+ 14c: 000020a4 clo.d \$a0, \$a1
+ 150: 000024a4 clz.d \$a0, \$a1
+ 154: 000028a4 cto.d \$a0, \$a1
+ 158: 00002ca4 ctz.d \$a0, \$a1
+ 15c: 000030a4 revb.2h \$a0, \$a1
+ 160: 000034a4 revb.4h \$a0, \$a1
+ 164: 000038a4 revb.2w \$a0, \$a1
+ 168: 00003ca4 revb.d \$a0, \$a1
+ 16c: 000040a4 revh.2w \$a0, \$a1
+ 170: 000044a4 revh.d \$a0, \$a1
+ 174: 000048a4 bitrev.4b \$a0, \$a1
+ 178: 00004ca4 bitrev.8b \$a0, \$a1
+ 17c: 000050a4 bitrev.w \$a0, \$a1
+ 180: 000054a4 bitrev.d \$a0, \$a1
+ 184: 000058a4 ext.w.h \$a0, \$a1
+ 188: 00005ca4 ext.w.b \$a0, \$a1
+ 18c: 000060a4 rdtimel.w \$a0, \$a1
+ 190: 000064a4 rdtimeh.w \$a0, \$a1
+ 194: 000068a4 rdtime.d \$a0, \$a1
+ 198: 00006ca4 cpucfg \$a0, \$a1
+ 19c: 000118a0 asrtle.d \$a1, \$a2
+ 1a0: 000198a0 asrtgt.d \$a1, \$a2
+ 1a4: 000418a4 alsl.w \$a0, \$a1, \$a2, 0x1
+ 1a8: 000598a4 alsl.w \$a0, \$a1, \$a2, 0x4
+ 1ac: 000618a4 alsl.wu \$a0, \$a1, \$a2, 0x1
+ 1b0: 000798a4 alsl.wu \$a0, \$a1, \$a2, 0x4
+ 1b4: 000818a4 bytepick.w \$a0, \$a1, \$a2, 0x0
+ 1b8: 000998a4 bytepick.w \$a0, \$a1, \$a2, 0x3
+ 1bc: 000c18a4 bytepick.d \$a0, \$a1, \$a2, 0x0
+ 1c0: 000f98a4 bytepick.d \$a0, \$a1, \$a2, 0x7
+ 1c4: 001018a4 add.w \$a0, \$a1, \$a2
+ 1c8: 001098a4 add.d \$a0, \$a1, \$a2
+ 1cc: 001118a4 sub.w \$a0, \$a1, \$a2
+ 1d0: 001198a4 sub.d \$a0, \$a1, \$a2
+ 1d4: 001218a4 slt \$a0, \$a1, \$a2
+ 1d8: 001298a4 sltu \$a0, \$a1, \$a2
+ 1dc: 001318a4 maskeqz \$a0, \$a1, \$a2
+ 1e0: 001398a4 masknez \$a0, \$a1, \$a2
+ 1e4: 001418a4 nor \$a0, \$a1, \$a2
+ 1e8: 001498a4 and \$a0, \$a1, \$a2
+ 1ec: 001518a4 or \$a0, \$a1, \$a2
+ 1f0: 001598a4 xor \$a0, \$a1, \$a2
+ 1f4: 001618a4 orn \$a0, \$a1, \$a2
+ 1f8: 001698a4 andn \$a0, \$a1, \$a2
+ 1fc: 001718a4 sll.w \$a0, \$a1, \$a2
+ 200: 001798a4 srl.w \$a0, \$a1, \$a2
+ 204: 001818a4 sra.w \$a0, \$a1, \$a2
+ 208: 001898a4 sll.d \$a0, \$a1, \$a2
+ 20c: 001918a4 srl.d \$a0, \$a1, \$a2
+ 210: 001998a4 sra.d \$a0, \$a1, \$a2
+ 214: 001b18a4 rotr.w \$a0, \$a1, \$a2
+ 218: 001b98a4 rotr.d \$a0, \$a1, \$a2
+ 21c: 001c18a4 mul.w \$a0, \$a1, \$a2
+ 220: 001c98a4 mulh.w \$a0, \$a1, \$a2
+ 224: 001d18a4 mulh.wu \$a0, \$a1, \$a2
+ 228: 001d98a4 mul.d \$a0, \$a1, \$a2
+ 22c: 001e18a4 mulh.d \$a0, \$a1, \$a2
+ 230: 001e98a4 mulh.du \$a0, \$a1, \$a2
+ 234: 001f18a4 mulw.d.w \$a0, \$a1, \$a2
+ 238: 001f98a4 mulw.d.wu \$a0, \$a1, \$a2
+ 23c: 002018a4 div.w \$a0, \$a1, \$a2
+ 240: 002098a4 mod.w \$a0, \$a1, \$a2
+ 244: 002118a4 div.wu \$a0, \$a1, \$a2
+ 248: 002198a4 mod.wu \$a0, \$a1, \$a2
+ 24c: 002218a4 div.d \$a0, \$a1, \$a2
+ 250: 002298a4 mod.d \$a0, \$a1, \$a2
+ 254: 002318a4 div.du \$a0, \$a1, \$a2
+ 258: 002398a4 mod.du \$a0, \$a1, \$a2
+ 25c: 002418a4 crc.w.b.w \$a0, \$a1, \$a2
+ 260: 002498a4 crc.w.h.w \$a0, \$a1, \$a2
+ 264: 002518a4 crc.w.w.w \$a0, \$a1, \$a2
+ 268: 002598a4 crc.w.d.w \$a0, \$a1, \$a2
+ 26c: 002618a4 crcc.w.b.w \$a0, \$a1, \$a2
+ 270: 002698a4 crcc.w.h.w \$a0, \$a1, \$a2
+ 274: 002718a4 crcc.w.w.w \$a0, \$a1, \$a2
+ 278: 002798a4 crcc.w.d.w \$a0, \$a1, \$a2
+ 27c: 002a0000 break 0x0
+ 280: 002a7fff break 0x7fff
+ 284: 002a8000 dbcl 0x0
+ 288: 002affff dbcl 0x7fff
+ 28c: 002c18a4 alsl.d \$a0, \$a1, \$a2, 0x1
+ 290: 002d98a4 alsl.d \$a0, \$a1, \$a2, 0x4
+ 294: 004080a4 slli.w \$a0, \$a1, 0x0
+ 298: 004084a4 slli.w \$a0, \$a1, 0x1
+ 29c: 0040fca4 slli.w \$a0, \$a1, 0x1f
+ 2a0: 004100a4 slli.d \$a0, \$a1, 0x0
+ 2a4: 004104a4 slli.d \$a0, \$a1, 0x1
+ 2a8: 0041fca4 slli.d \$a0, \$a1, 0x3f
+ 2ac: 004480a4 srli.w \$a0, \$a1, 0x0
+ 2b0: 004484a4 srli.w \$a0, \$a1, 0x1
+ 2b4: 0044fca4 srli.w \$a0, \$a1, 0x1f
+ 2b8: 004500a4 srli.d \$a0, \$a1, 0x0
+ 2bc: 004504a4 srli.d \$a0, \$a1, 0x1
+ 2c0: 0045fca4 srli.d \$a0, \$a1, 0x3f
+ 2c4: 004880a4 srai.w \$a0, \$a1, 0x0
+ 2c8: 004884a4 srai.w \$a0, \$a1, 0x1
+ 2cc: 0048fca4 srai.w \$a0, \$a1, 0x1f
+ 2d0: 004900a4 srai.d \$a0, \$a1, 0x0
+ 2d4: 004904a4 srai.d \$a0, \$a1, 0x1
+ 2d8: 0049fca4 srai.d \$a0, \$a1, 0x3f
+ 2dc: 004c80a4 rotri.w \$a0, \$a1, 0x0
+ 2e0: 004c84a4 rotri.w \$a0, \$a1, 0x1
+ 2e4: 004cfca4 rotri.w \$a0, \$a1, 0x1f
+ 2e8: 004d00a4 rotri.d \$a0, \$a1, 0x0
+ 2ec: 004d04a4 rotri.d \$a0, \$a1, 0x1
+ 2f0: 004dfca4 rotri.d \$a0, \$a1, 0x3f
+ 2f4: 006000a4 bstrins.w \$a0, \$a1, 0x0, 0x0
+ 2f8: 006204a4 bstrins.w \$a0, \$a1, 0x2, 0x1
+ 2fc: 007f00a4 bstrins.w \$a0, \$a1, 0x1f, 0x0
+ 300: 006080a4 bstrpick.w \$a0, \$a1, 0x0, 0x0
+ 304: 006284a4 bstrpick.w \$a0, \$a1, 0x2, 0x1
+ 308: 007f80a4 bstrpick.w \$a0, \$a1, 0x1f, 0x0
+ 30c: 008000a4 bstrins.d \$a0, \$a1, 0x0, 0x0
+ 310: 009f04a4 bstrins.d \$a0, \$a1, 0x1f, 0x1
+ 314: 00a000a4 bstrins.d \$a0, \$a1, 0x20, 0x0
+ 318: 00bf00a4 bstrins.d \$a0, \$a1, 0x3f, 0x0
+ 31c: 00c000a4 bstrpick.d \$a0, \$a1, 0x0, 0x0
+ 320: 00df04a4 bstrpick.d \$a0, \$a1, 0x1f, 0x1
+ 324: 00e000a4 bstrpick.d \$a0, \$a1, 0x20, 0x0
+ 328: 00ff00a4 bstrpick.d \$a0, \$a1, 0x3f, 0x0
+ 32c: 200000a4 ll.w \$a0, \$a1, 0
+ 330: 203ffca4 ll.w \$a0, \$a1, 16380
+ 334: 210000a4 sc.w \$a0, \$a1, 0
+ 338: 213ffca4 sc.w \$a0, \$a1, 16380
+ 33c: 220000a4 ll.d \$a0, \$a1, 0
+ 340: 223ffca4 ll.d \$a0, \$a1, 16380
+ 344: 230000a4 sc.d \$a0, \$a1, 0
+ 348: 233ffca4 sc.d \$a0, \$a1, 16380
+ 34c: 240000a4 ldptr.w \$a0, \$a1, 0
+ 350: 243ffca4 ldptr.w \$a0, \$a1, 16380
+ 354: 250000a4 stptr.w \$a0, \$a1, 0
+ 358: 253ffca4 stptr.w \$a0, \$a1, 16380
+ 35c: 260000a4 ldptr.d \$a0, \$a1, 0
+ 360: 263ffca4 ldptr.d \$a0, \$a1, 16380
+ 364: 270000a4 stptr.d \$a0, \$a1, 0
+ 368: 273ffca4 stptr.d \$a0, \$a1, 16380
+ 36c: 280000a4 ld.b \$a0, \$a1, 0
+ 370: 281ffca4 ld.b \$a0, \$a1, 2047
+ 374: 282004a4 ld.b \$a0, \$a1, -2047
+ 378: 284000a4 ld.h \$a0, \$a1, 0
+ 37c: 285ffca4 ld.h \$a0, \$a1, 2047
+ 380: 286004a4 ld.h \$a0, \$a1, -2047
+ 384: 288000a4 ld.w \$a0, \$a1, 0
+ 388: 289ffca4 ld.w \$a0, \$a1, 2047
+ 38c: 28a004a4 ld.w \$a0, \$a1, -2047
+ 390: 28c000a4 ld.d \$a0, \$a1, 0
+ 394: 28dffca4 ld.d \$a0, \$a1, 2047
+ 398: 28e004a4 ld.d \$a0, \$a1, -2047
+ 39c: 290000a4 st.b \$a0, \$a1, 0
+ 3a0: 291ffca4 st.b \$a0, \$a1, 2047
+ 3a4: 292004a4 st.b \$a0, \$a1, -2047
+ 3a8: 294000a4 st.h \$a0, \$a1, 0
+ 3ac: 295ffca4 st.h \$a0, \$a1, 2047
+ 3b0: 296004a4 st.h \$a0, \$a1, -2047
+ 3b4: 298000a4 st.w \$a0, \$a1, 0
+ 3b8: 299ffca4 st.w \$a0, \$a1, 2047
+ 3bc: 29a004a4 st.w \$a0, \$a1, -2047
+ 3c0: 29c000a4 st.d \$a0, \$a1, 0
+ 3c4: 29dffca4 st.d \$a0, \$a1, 2047
+ 3c8: 29e004a4 st.d \$a0, \$a1, -2047
+ 3cc: 2a0000a4 ld.bu \$a0, \$a1, 0
+ 3d0: 2a1ffca4 ld.bu \$a0, \$a1, 2047
+ 3d4: 2a2004a4 ld.bu \$a0, \$a1, -2047
+ 3d8: 2a4000a4 ld.hu \$a0, \$a1, 0
+ 3dc: 2a5ffca4 ld.hu \$a0, \$a1, 2047
+ 3e0: 2a6004a4 ld.hu \$a0, \$a1, -2047
+ 3e4: 2a8000a4 ld.wu \$a0, \$a1, 0
+ 3e8: 2a9ffca4 ld.wu \$a0, \$a1, 2047
+ 3ec: 2aa004a4 ld.wu \$a0, \$a1, -2047
+ 3f0: 2ac000a0 preld 0x0, \$a1, 0
+ 3f4: 2adffcbf preld 0x1f, \$a1, 2047
+ 3f8: 2ae004bf preld 0x1f, \$a1, -2047
+ 3fc: 380018a4 ldx.b \$a0, \$a1, \$a2
+ 400: 380418a4 ldx.h \$a0, \$a1, \$a2
+ 404: 380818a4 ldx.w \$a0, \$a1, \$a2
+ 408: 380c18a4 ldx.d \$a0, \$a1, \$a2
+ 40c: 381018a4 stx.b \$a0, \$a1, \$a2
+ 410: 381418a4 stx.h \$a0, \$a1, \$a2
+ 414: 381818a4 stx.w \$a0, \$a1, \$a2
+ 418: 381c18a4 stx.d \$a0, \$a1, \$a2
+ 41c: 382018a4 ldx.bu \$a0, \$a1, \$a2
+ 420: 382418a4 ldx.hu \$a0, \$a1, \$a2
+ 424: 382818a4 ldx.wu \$a0, \$a1, \$a2
+ 428: 382c18a0 preldx 0x0, \$a1, \$a2
+ 42c: 382c18bf preldx 0x1f, \$a1, \$a2
+ 430: 38720000 dbar 0x0
+ 434: 38727fff dbar 0x7fff
+ 438: 38728000 ibar 0x0
+ 43c: 3872ffff ibar 0x7fff
+ 440: 386014c4 amswap.w \$a0, \$a1, \$a2
+ 444: 386018a4 amswap.w \$a0, \$a2, \$a1
+ 448: 386094c4 amswap.d \$a0, \$a1, \$a2
+ 44c: 386098a4 amswap.d \$a0, \$a2, \$a1
+ 450: 386114c4 amadd.w \$a0, \$a1, \$a2
+ 454: 386118a4 amadd.w \$a0, \$a2, \$a1
+ 458: 386194c4 amadd.d \$a0, \$a1, \$a2
+ 45c: 386198a4 amadd.d \$a0, \$a2, \$a1
+ 460: 386214c4 amand.w \$a0, \$a1, \$a2
+ 464: 386218a4 amand.w \$a0, \$a2, \$a1
+ 468: 386294c4 amand.d \$a0, \$a1, \$a2
+ 46c: 386298a4 amand.d \$a0, \$a2, \$a1
+ 470: 386314c4 amor.w \$a0, \$a1, \$a2
+ 474: 386318a4 amor.w \$a0, \$a2, \$a1
+ 478: 386394c4 amor.d \$a0, \$a1, \$a2
+ 47c: 386398a4 amor.d \$a0, \$a2, \$a1
+ 480: 386414c4 amxor.w \$a0, \$a1, \$a2
+ 484: 386418a4 amxor.w \$a0, \$a2, \$a1
+ 488: 386494c4 amxor.d \$a0, \$a1, \$a2
+ 48c: 386498a4 amxor.d \$a0, \$a2, \$a1
+ 490: 386514c4 ammax.w \$a0, \$a1, \$a2
+ 494: 386518a4 ammax.w \$a0, \$a2, \$a1
+ 498: 386594c4 ammax.d \$a0, \$a1, \$a2
+ 49c: 386598a4 ammax.d \$a0, \$a2, \$a1
+ 4a0: 386614c4 ammin.w \$a0, \$a1, \$a2
+ 4a4: 386618a4 ammin.w \$a0, \$a2, \$a1
+ 4a8: 386694c4 ammin.d \$a0, \$a1, \$a2
+ 4ac: 386698a4 ammin.d \$a0, \$a2, \$a1
+ 4b0: 386714c4 ammax.wu \$a0, \$a1, \$a2
+ 4b4: 386718a4 ammax.wu \$a0, \$a2, \$a1
+ 4b8: 386794c4 ammax.du \$a0, \$a1, \$a2
+ 4bc: 386798a4 ammax.du \$a0, \$a2, \$a1
+ 4c0: 386814c4 ammin.wu \$a0, \$a1, \$a2
+ 4c4: 386818a4 ammin.wu \$a0, \$a2, \$a1
+ 4c8: 386894c4 ammin.du \$a0, \$a1, \$a2
+ 4cc: 386898a4 ammin.du \$a0, \$a2, \$a1
+ 4d0: 386914c4 amswap_db.w \$a0, \$a1, \$a2
+ 4d4: 386918a4 amswap_db.w \$a0, \$a2, \$a1
+ 4d8: 386994c4 amswap_db.d \$a0, \$a1, \$a2
+ 4dc: 386998a4 amswap_db.d \$a0, \$a2, \$a1
+ 4e0: 386a14c4 amadd_db.w \$a0, \$a1, \$a2
+ 4e4: 386a18a4 amadd_db.w \$a0, \$a2, \$a1
+ 4e8: 386a94c4 amadd_db.d \$a0, \$a1, \$a2
+ 4ec: 386a98a4 amadd_db.d \$a0, \$a2, \$a1
+ 4f0: 386b14c4 amand_db.w \$a0, \$a1, \$a2
+ 4f4: 386b18a4 amand_db.w \$a0, \$a2, \$a1
+ 4f8: 386b94c4 amand_db.d \$a0, \$a1, \$a2
+ 4fc: 386b98a4 amand_db.d \$a0, \$a2, \$a1
+ 500: 386c14c4 amor_db.w \$a0, \$a1, \$a2
+ 504: 386c18a4 amor_db.w \$a0, \$a2, \$a1
+ 508: 386c94c4 amor_db.d \$a0, \$a1, \$a2
+ 50c: 386c98a4 amor_db.d \$a0, \$a2, \$a1
+ 510: 386d14c4 amxor_db.w \$a0, \$a1, \$a2
+ 514: 386d18a4 amxor_db.w \$a0, \$a2, \$a1
+ 518: 386d94c4 amxor_db.d \$a0, \$a1, \$a2
+ 51c: 386d98a4 amxor_db.d \$a0, \$a2, \$a1
+ 520: 386e14c4 ammax_db.w \$a0, \$a1, \$a2
+ 524: 386e18a4 ammax_db.w \$a0, \$a2, \$a1
+ 528: 386e94c4 ammax_db.d \$a0, \$a1, \$a2
+ 52c: 386e98a4 ammax_db.d \$a0, \$a2, \$a1
+ 530: 386f14c4 ammin_db.w \$a0, \$a1, \$a2
+ 534: 386f18a4 ammin_db.w \$a0, \$a2, \$a1
+ 538: 386f94c4 ammin_db.d \$a0, \$a1, \$a2
+ 53c: 386f98a4 ammin_db.d \$a0, \$a2, \$a1
+ 540: 387014c4 ammax_db.wu \$a0, \$a1, \$a2
+ 544: 387018a4 ammax_db.wu \$a0, \$a2, \$a1
+ 548: 387094c4 ammax_db.du \$a0, \$a1, \$a2
+ 54c: 387098a4 ammax_db.du \$a0, \$a2, \$a1
+ 550: 387114c4 ammin_db.wu \$a0, \$a1, \$a2
+ 554: 387118a4 ammin_db.wu \$a0, \$a2, \$a1
+ 558: 387194c4 ammin_db.du \$a0, \$a1, \$a2
+ 55c: 387198a4 ammin_db.du \$a0, \$a2, \$a1
+ 560: 387818a4 ldgt.b \$a0, \$a1, \$a2
+ 564: 387898a4 ldgt.h \$a0, \$a1, \$a2
+ 568: 387918a4 ldgt.w \$a0, \$a1, \$a2
+ 56c: 387998a4 ldgt.d \$a0, \$a1, \$a2
+ 570: 387a18a4 ldle.b \$a0, \$a1, \$a2
+ 574: 387a98a4 ldle.h \$a0, \$a1, \$a2
+ 578: 387b18a4 ldle.w \$a0, \$a1, \$a2
+ 57c: 387b98a4 ldle.d \$a0, \$a1, \$a2
+ 580: 387c18a4 stgt.b \$a0, \$a1, \$a2
+ 584: 387c98a4 stgt.h \$a0, \$a1, \$a2
+ 588: 387d18a4 stgt.w \$a0, \$a1, \$a2
+ 58c: 387d98a4 stgt.d \$a0, \$a1, \$a2
+ 590: 387e18a4 stle.b \$a0, \$a1, \$a2
+ 594: 387e98a4 stle.h \$a0, \$a1, \$a2
+ 598: 387f18a4 stle.w \$a0, \$a1, \$a2
+ 59c: 387f98a4 stle.d \$a0, \$a1, \$a2
+ 5a0: 385714c4 sc.q \$a0, \$a1, \$a2
+ 5a4: 385714c4 sc.q \$a0, \$a1, \$a2
+ 5a8: 385780a4 llacq.w \$a0, \$a1
+ 5ac: 385780a4 llacq.w \$a0, \$a1
+ 5b0: 385784a4 screl.w \$a0, \$a1
+ 5b4: 385784a4 screl.w \$a0, \$a1
+ 5b8: 385788a4 llacq.d \$a0, \$a1
+ 5bc: 385788a4 llacq.d \$a0, \$a1
+ 5c0: 38578ca4 screl.d \$a0, \$a1
+ 5c4: 38578ca4 screl.d \$a0, \$a1
+ 5c8: 385814c4 amcas.b \$a0, \$a1, \$a2
+ 5cc: 385818a4 amcas.b \$a0, \$a2, \$a1
+ 5d0: 385894c4 amcas.h \$a0, \$a1, \$a2
+ 5d4: 385898a4 amcas.h \$a0, \$a2, \$a1
+ 5d8: 385914c4 amcas.w \$a0, \$a1, \$a2
+ 5dc: 385918a4 amcas.w \$a0, \$a2, \$a1
+ 5e0: 385994c4 amcas.d \$a0, \$a1, \$a2
+ 5e4: 385998a4 amcas.d \$a0, \$a2, \$a1
+ 5e8: 385a14c4 amcas_db.b \$a0, \$a1, \$a2
+ 5ec: 385a18a4 amcas_db.b \$a0, \$a2, \$a1
+ 5f0: 385a94c4 amcas_db.h \$a0, \$a1, \$a2
+ 5f4: 385a98a4 amcas_db.h \$a0, \$a2, \$a1
+ 5f8: 385b14c4 amcas_db.w \$a0, \$a1, \$a2
+ 5fc: 385b18a4 amcas_db.w \$a0, \$a2, \$a1
+ 600: 385b94c4 amcas_db.d \$a0, \$a1, \$a2
+ 604: 385b98a4 amcas_db.d \$a0, \$a2, \$a1
+ 608: 385c14c4 amswap.b \$a0, \$a1, \$a2
+ 60c: 385c18a4 amswap.b \$a0, \$a2, \$a1
+ 610: 385c94c4 amswap.h \$a0, \$a1, \$a2
+ 614: 385c98a4 amswap.h \$a0, \$a2, \$a1
+ 618: 385d14c4 amadd.b \$a0, \$a1, \$a2
+ 61c: 385d18a4 amadd.b \$a0, \$a2, \$a1
+ 620: 385d94c4 amadd.h \$a0, \$a1, \$a2
+ 624: 385d98a4 amadd.h \$a0, \$a2, \$a1
+ 628: 385e14c4 amswap_db.b \$a0, \$a1, \$a2
+ 62c: 385e18a4 amswap_db.b \$a0, \$a2, \$a1
+ 630: 385e94c4 amswap_db.h \$a0, \$a1, \$a2
+ 634: 385e98a4 amswap_db.h \$a0, \$a2, \$a1
+ 638: 385f14c4 amadd_db.b \$a0, \$a1, \$a2
+ 63c: 385f18a4 amadd_db.b \$a0, \$a2, \$a1
+ 640: 385f94c4 amadd_db.h \$a0, \$a1, \$a2
+ 644: 385f98a4 amadd_db.h \$a0, \$a2, \$a1
+
+0+648 <.L1>:
+ 648: 03400000 andi \$zero, \$zero, 0x0
+ 64c: 43fffc9f beqz \$a0, -4 # 648 <.L1>
+ 650: 47fff89f bnez \$a0, -8 # 648 <.L1>
+ 654: 53fff7ff b -12 # 648 <.L1>
+ 658: 57fff3ff bl -16 # 648 <.L1>
+ 65c: 5bffec85 beq \$a0, \$a1, -20 # 648 <.L1>
+ 660: 5fffe885 bne \$a0, \$a1, -24 # 648 <.L1>
+ 664: 63ffe485 blt \$a0, \$a1, -28 # 648 <.L1>
+ 668: 63ffe0a4 blt \$a1, \$a0, -32 # 648 <.L1>
+ 66c: 67ffdc85 bge \$a0, \$a1, -36 # 648 <.L1>
+ 670: 67ffd8a4 bge \$a1, \$a0, -40 # 648 <.L1>
+ 674: 6bffd485 bltu \$a0, \$a1, -44 # 648 <.L1>
+ 678: 6bffd0a4 bltu \$a1, \$a0, -48 # 648 <.L1>
+ 67c: 6fffcc85 bgeu \$a0, \$a1, -52 # 648 <.L1>
+ 680: 6fffc8a4 bgeu \$a1, \$a0, -56 # 648 <.L1>
+ 684: 4c000080 jirl \$zero, \$a0, 0
diff --git a/gas/testsuite/gas/loongarch/insn_int64.s b/gas/testsuite/gas/loongarch/insn_int64.s
new file mode 100644
index 00000000000..f80895178d4
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/insn_int64.s
@@ -0,0 +1,440 @@
+# imm_op
+slti $r4,$r5,0
+slti $r4,$r5,0x7ff
+slti $r4,$r5,-0x7ff
+sltui $r4,$r5,0
+sltui $r4,$r5,0x7ff
+sltui $r4,$r5,-0x7ff
+addi.w $r4,$r5,0
+addi.w $r4,$r5,0x7ff
+addi.w $r4,$r5,-0x7ff
+addi.d $r4,$r5,0
+addi.d $r4,$r5,0x7ff
+addi.d $r4,$r5,-0x7ff
+lu52i.d $r4,$r5,0
+lu52i.d $r4,$r5,0x7ff
+lu52i.d $r4,$r5,-0x7ff
+andi $r4,$r5,0
+andi $r4,$r5,0x7ff
+ori $r4,$r5,0
+ori $r4,$r5,0x7ff
+xori $r4,$r5,0
+xori $r4,$r5,0x7ff
+addu16i.d $r4,$r5,0
+addu16i.d $r4,$r5,0x7fff
+addu16i.d $r4,$r5,-0x7fff
+lu12i.w $r4,0
+lu12i.w $r4,0x7ffff
+lu32i.d $r4,-0x7ffff
+pcaddi $r4,0
+pcaddi $r4,0x7ffff
+pcaddi $r4,-0x80000
+pcalau12i $r4,0
+pcalau12i $r4,0x7ffff
+pcalau12i $r4,-0x7ffff
+pcaddu12i $r4,0
+pcaddu12i $r4,0x7ffff
+pcaddu12i $r4,-0x7ffff
+pcaddu18i $r4,0
+pcaddu18i $r4,0x7ffff
+pcaddu18i $r4,-0x7ffff
+
+# imm_ins
+.equ a, 0x123
+.equ b, 0xfffff00000
+.equ c, 0xfffffffffff
+.equ d, 2
+.equ e,0x100
+
+alsl.w $r11,$r12,$r13,d
+alsl.wu $r11,$r12,$r13,d
+bytepick.w $r11,$r12,$r13,d
+bytepick.d $r11,$r12,$r13,d
+
+break d
+dbcl d
+syscall d
+
+alsl.d $r11,$r12, $r13,d
+slli.w $r11,$r12,d
+slli.d $r11,$r12,d
+srli.w $r11,$r12,d
+srli.d $r12,$r13,d
+srai.w $r12,$r13,d
+srai.d $r12,$r13,d
+
+bstrins.w $r12,$r13,d,d
+bstrins.d $r12,$r13,d,d
+bstrpick.d $r12,$r13,d,d
+bstrpick.d $r12,$r13,d,d
+
+slti $r12,$r13,a
+sltui $r12,$r13,a
+addi.w $r12,$r13,a
+addi.d $r12,$r13,a
+lu52i.d $r12,$r13,a
+andi $r12,$r13,d
+ori $r12,$r13,d
+xori $r12,$r13,d
+addu16i.d $r12,$r13,d
+lu12i.w $r12,a
+lu32i.d $r12,a
+pcaddi $r12,a
+pcalau12i $r12,a
+pcaddu12i $r12,a
+pcaddu18i $r12,a
+
+csrrd $r12,a
+csrwr $r12,a
+csrxchg $r12,$r13,d
+cacop d,$r13,d
+lddir $r12,$r13,d
+ldpte $r12,d
+
+invtlb d,$r13,$r14
+
+# fix_op
+clo.w $r4,$r5
+clz.w $r4,$r5
+cto.w $r4,$r5
+ctz.w $r4,$r5
+clo.d $r4,$r5
+clz.d $r4,$r5
+cto.d $r4,$r5
+ctz.d $r4,$r5
+revb.2h $r4,$r5
+revb.4h $r4,$r5
+revb.2w $r4,$r5
+revb.d $r4,$r5
+revh.2w $r4,$r5
+revh.d $r4,$r5
+bitrev.4b $r4,$r5
+bitrev.8b $r4,$r5
+bitrev.w $r4,$r5
+bitrev.d $r4,$r5
+ext.w.h $r4,$r5
+ext.w.b $r4,$r5
+rdtimel.w $r4,$r5
+rdtimeh.w $r4,$r5
+rdtime.d $r4,$r5
+cpucfg $r4,$r5
+asrtle.d $r5,$r6
+asrtgt.d $r5,$r6
+alsl.w $r4,$r5,$r6,1
+alsl.w $r4,$r5,$r6,4
+alsl.wu $r4,$r5,$r6,1
+alsl.wu $r4,$r5,$r6,4
+bytepick.w $r4,$r5,$r6,0
+bytepick.w $r4,$r5,$r6,3
+bytepick.d $r4,$r5,$r6,0
+bytepick.d $r4,$r5,$r6,7
+add.w $r4,$r5,$r6
+add.d $r4,$r5,$r6
+sub.w $r4,$r5,$r6
+sub.d $r4,$r5,$r6
+slt $r4,$r5,$r6
+sltu $r4,$r5,$r6
+maskeqz $r4,$r5,$r6
+masknez $r4,$r5,$r6
+nor $r4,$r5,$r6
+and $r4,$r5,$r6
+or $r4,$r5,$r6
+xor $r4,$r5,$r6
+orn $r4,$r5,$r6
+andn $r4,$r5,$r6
+
+# load_store
+sll.w $r4,$r5,$r6
+srl.w $r4,$r5,$r6
+sra.w $r4,$r5,$r6
+sll.d $r4,$r5,$r6
+srl.d $r4,$r5,$r6
+sra.d $r4,$r5,$r6
+rotr.w $r4,$r5,$r6
+rotr.d $r4,$r5,$r6
+mul.w $r4,$r5,$r6
+mulh.w $r4,$r5,$r6
+mulh.wu $r4,$r5,$r6
+mul.d $r4,$r5,$r6
+mulh.d $r4,$r5,$r6
+mulh.du $r4,$r5,$r6
+mulw.d.w $r4,$r5,$r6
+mulw.d.wu $r4,$r5,$r6
+div.w $r4,$r5,$r6
+mod.w $r4,$r5,$r6
+div.wu $r4,$r5,$r6
+mod.wu $r4,$r5,$r6
+div.d $r4,$r5,$r6
+mod.d $r4,$r5,$r6
+div.du $r4,$r5,$r6
+mod.du $r4,$r5,$r6
+crc.w.b.w $r4,$r5,$r6
+crc.w.h.w $r4,$r5,$r6
+crc.w.w.w $r4,$r5,$r6
+crc.w.d.w $r4,$r5,$r6
+crcc.w.b.w $r4,$r5,$r6
+crcc.w.h.w $r4,$r5,$r6
+crcc.w.w.w $r4,$r5,$r6
+crcc.w.d.w $r4,$r5,$r6
+break 0
+break 0x7fff
+dbcl 0
+dbcl 0x7fff
+alsl.d $r4,$r5,$r6,1
+alsl.d $r4,$r5,$r6,4
+slli.w $r4,$r5,0
+slli.w $r4,$r5,1
+slli.w $r4,$r5,0x1f
+slli.d $r4,$r5,0
+slli.d $r4,$r5,1
+slli.d $r4,$r5,0x3f
+srli.w $r4,$r5,0
+srli.w $r4,$r5,1
+srli.w $r4,$r5,0x1f
+srli.d $r4,$r5,0
+srli.d $r4,$r5,1
+srli.d $r4,$r5,0x3f
+srai.w $r4,$r5,0
+srai.w $r4,$r5,1
+srai.w $r4,$r5,0x1f
+srai.d $r4,$r5,0
+srai.d $r4,$r5,1
+srai.d $r4,$r5,0x3f
+rotri.w $r4,$r5,0
+rotri.w $r4,$r5,1
+rotri.w $r4,$r5,0x1f
+rotri.d $r4,$r5,0
+rotri.d $r4,$r5,1
+rotri.d $r4,$r5,0x3f
+bstrins.w $r4,$r5,0,0
+bstrins.w $r4,$r5,2,1
+bstrins.w $r4,$r5,31,0
+bstrpick.w $r4,$r5,0,0
+bstrpick.w $r4,$r5,2,1
+bstrpick.w $r4,$r5,31,0
+bstrins.d $r4,$r5,0,0
+bstrins.d $r4,$r5,31,1
+bstrins.d $r4,$r5,32,0
+bstrins.d $r4,$r5,63,0
+bstrpick.d $r4,$r5,0,0
+bstrpick.d $r4,$r5,31,1
+bstrpick.d $r4,$r5,32,0
+bstrpick.d $r4,$r5,63,0
+ll.w $r4,$r5,0
+ll.w $r4,$r5,0x3ffc
+sc.w $r4,$r5,0
+sc.w $r4,$r5,0x3ffc
+ll.d $r4,$r5,0
+ll.d $r4,$r5,0x3ffc
+sc.d $r4,$r5,0
+sc.d $r4,$r5,0x3ffc
+ldptr.w $r4,$r5,0
+ldptr.w $r4,$r5,0x3ffc
+stptr.w $r4,$r5,0
+stptr.w $r4,$r5,0x3ffc
+ldptr.d $r4,$r5,0
+ldptr.d $r4,$r5,0x3ffc
+stptr.d $r4,$r5,0
+stptr.d $r4,$r5,0x3ffc
+ld.b $r4,$r5,0
+ld.b $r4,$r5,0x7ff
+ld.b $r4,$r5,-0x7ff
+ld.h $r4,$r5,0
+ld.h $r4,$r5,0x7ff
+ld.h $r4,$r5,-0x7ff
+ld.w $r4,$r5,0
+ld.w $r4,$r5,0x7ff
+ld.w $r4,$r5,-0x7ff
+ld.d $r4,$r5,0
+ld.d $r4,$r5,0x7ff
+ld.d $r4,$r5,-0x7ff
+st.b $r4,$r5,0
+st.b $r4,$r5,0x7ff
+st.b $r4,$r5,-0x7ff
+st.h $r4,$r5,0
+st.h $r4,$r5,0x7ff
+st.h $r4,$r5,-0x7ff
+st.w $r4,$r5,0
+st.w $r4,$r5,0x7ff
+st.w $r4,$r5,-0x7ff
+st.d $r4,$r5,0
+st.d $r4,$r5,0x7ff
+st.d $r4,$r5,-0x7ff
+ld.bu $r4,$r5,0
+ld.bu $r4,$r5,0x7ff
+ld.bu $r4,$r5,-0x7ff
+ld.hu $r4,$r5,0
+ld.hu $r4,$r5,0x7ff
+ld.hu $r4,$r5,-0x7ff
+ld.wu $r4,$r5,0
+ld.wu $r4,$r5,0x7ff
+ld.wu $r4,$r5,-0x7ff
+preld 0,$r5,0
+preld 31,$r5,0x7ff
+preld 31,$r5,-0x7ff
+ldx.b $r4,$r5,$r6
+ldx.h $r4,$r5,$r6
+ldx.w $r4,$r5,$r6
+ldx.d $r4,$r5,$r6
+stx.b $r4,$r5,$r6
+stx.h $r4,$r5,$r6
+stx.w $r4,$r5,$r6
+stx.d $r4,$r5,$r6
+ldx.bu $r4,$r5,$r6
+ldx.hu $r4,$r5,$r6
+ldx.wu $r4,$r5,$r6
+preldx 0,$r5,$r6
+preldx 31,$r5,$r6
+dbar 0
+dbar 0x7fff
+ibar 0
+ibar 0x7fff
+amswap.w $r4,$r5,$r6,0
+amswap.w $r4,$r6,$r5
+amswap.d $r4,$r5,$r6,0
+amswap.d $r4,$r6,$r5
+amadd.w $r4,$r5,$r6,0
+amadd.w $r4,$r6,$r5
+amadd.d $r4,$r5,$r6,0
+amadd.d $r4,$r6,$r5
+amand.w $r4,$r5,$r6,0
+amand.w $r4,$r6,$r5
+amand.d $r4,$r5,$r6,0
+amand.d $r4,$r6,$r5
+amor.w $r4,$r5,$r6,0
+amor.w $r4,$r6,$r5
+amor.d $r4,$r5,$r6,0
+amor.d $r4,$r6,$r5
+amxor.w $r4,$r5,$r6,0
+amxor.w $r4,$r6,$r5
+amxor.d $r4,$r5,$r6,0
+amxor.d $r4,$r6,$r5
+ammax.w $r4,$r5,$r6,0
+ammax.w $r4,$r6,$r5
+ammax.d $r4,$r5,$r6,0
+ammax.d $r4,$r6,$r5
+ammin.w $r4,$r5,$r6,0
+ammin.w $r4,$r6,$r5
+ammin.d $r4,$r5,$r6,0
+ammin.d $r4,$r6,$r5
+ammax.wu $r4,$r5,$r6,0
+ammax.wu $r4,$r6,$r5
+ammax.du $r4,$r5,$r6,0
+ammax.du $r4,$r6,$r5
+ammin.wu $r4,$r5,$r6,0
+ammin.wu $r4,$r6,$r5
+ammin.du $r4,$r5,$r6,0
+ammin.du $r4,$r6,$r5
+amswap_db.w $r4,$r5,$r6,0
+amswap_db.w $r4,$r6,$r5
+amswap_db.d $r4,$r5,$r6,0
+amswap_db.d $r4,$r6,$r5
+amadd_db.w $r4,$r5,$r6,0
+amadd_db.w $r4,$r6,$r5
+amadd_db.d $r4,$r5,$r6,0
+amadd_db.d $r4,$r6,$r5
+amand_db.w $r4,$r5,$r6,0
+amand_db.w $r4,$r6,$r5
+amand_db.d $r4,$r5,$r6,0
+amand_db.d $r4,$r6,$r5
+amor_db.w $r4,$r5,$r6,0
+amor_db.w $r4,$r6,$r5
+amor_db.d $r4,$r5,$r6,0
+amor_db.d $r4,$r6,$r5
+amxor_db.w $r4,$r5,$r6,0
+amxor_db.w $r4,$r6,$r5
+amxor_db.d $r4,$r5,$r6,0
+amxor_db.d $r4,$r6,$r5
+ammax_db.w $r4,$r5,$r6,0
+ammax_db.w $r4,$r6,$r5
+ammax_db.d $r4,$r5,$r6,0
+ammax_db.d $r4,$r6,$r5
+ammin_db.w $r4,$r5,$r6,0
+ammin_db.w $r4,$r6,$r5
+ammin_db.d $r4,$r5,$r6,0
+ammin_db.d $r4,$r6,$r5
+ammax_db.wu $r4,$r5,$r6,0
+ammax_db.wu $r4,$r6,$r5
+ammax_db.du $r4,$r5,$r6,0
+ammax_db.du $r4,$r6,$r5
+ammin_db.wu $r4,$r5,$r6,0
+ammin_db.wu $r4,$r6,$r5
+ammin_db.du $r4,$r5,$r6,0
+ammin_db.du $r4,$r6,$r5
+ldgt.b $r4,$r5,$r6
+ldgt.h $r4,$r5,$r6
+ldgt.w $r4,$r5,$r6
+ldgt.d $r4,$r5,$r6
+ldle.b $r4,$r5,$r6
+ldle.h $r4,$r5,$r6
+ldle.w $r4,$r5,$r6
+ldle.d $r4,$r5,$r6
+stgt.b $r4,$r5,$r6
+stgt.h $r4,$r5,$r6
+stgt.w $r4,$r5,$r6
+stgt.d $r4,$r5,$r6
+stle.b $r4,$r5,$r6
+stle.h $r4,$r5,$r6
+stle.w $r4,$r5,$r6
+stle.d $r4,$r5,$r6
+sc.q $r4,$r5,$r6,0
+sc.q $r4,$r5,$r6
+llacq.w $r4,$r5,0
+llacq.w $r4,$r5
+screl.w $r4,$r5,0
+screl.w $r4,$r5
+llacq.d $r4,$r5,0
+llacq.d $r4,$r5
+screl.d $r4,$r5,0
+screl.d $r4,$r5
+amcas.b $r4,$r5,$r6,0
+amcas.b $r4,$r6,$r5
+amcas.h $r4,$r5,$r6,0
+amcas.h $r4,$r6,$r5
+amcas.w $r4,$r5,$r6,0
+amcas.w $r4,$r6,$r5
+amcas.d $r4,$r5,$r6,0
+amcas.d $r4,$r6,$r5
+amcas_db.b $r4,$r5,$r6,0
+amcas_db.b $r4,$r6,$r5
+amcas_db.h $r4,$r5,$r6,0
+amcas_db.h $r4,$r6,$r5
+amcas_db.w $r4,$r5,$r6,0
+amcas_db.w $r4,$r6,$r5
+amcas_db.d $r4,$r5,$r6,0
+amcas_db.d $r4,$r6,$r5
+amswap.b $r4,$r5,$r6,0
+amswap.b $r4,$r6,$r5
+amswap.h $r4,$r5,$r6,0
+amswap.h $r4,$r6,$r5
+amadd.b $r4,$r5,$r6,0
+amadd.b $r4,$r6,$r5
+amadd.h $r4,$r5,$r6,0
+amadd.h $r4,$r6,$r5
+amswap_db.b $r4,$r5,$r6,0
+amswap_db.b $r4,$r6,$r5
+amswap_db.h $r4,$r5,$r6,0
+amswap_db.h $r4,$r6,$r5
+amadd_db.b $r4,$r5,$r6,0
+amadd_db.b $r4,$r6,$r5
+amadd_db.h $r4,$r5,$r6,0
+amadd_db.h $r4,$r6,$r5
+
+# jmp_op
+.L1:
+nop
+beqz $r4,.L1
+bnez $r4,.L1
+b .L1
+bl .L1
+beq $r4,$r5,.L1
+bne $r4,$r5,.L1
+blt $r4,$r5,.L1
+bgt $r4,$r5,.L1
+bge $r4,$r5,.L1
+ble $r4,$r5,.L1
+bltu $r4,$r5,.L1
+bgtu $r4,$r5,.L1
+bgeu $r4,$r5,.L1
+bleu $r4,$r5,.L1
+jirl $zero,$r4,0
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2024-02-29 11:45 UTC | newest]
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