* [PATCH] [arm] Fix PR18841 ifunc relocation ordering
@ 2023-01-03 10:22 Christophe Lyon
2023-01-03 10:22 ` [PATCH] [arm] Skip ld/pr23169 test on arm Christophe Lyon
2023-01-09 13:28 ` [PATCH] [arm] Fix PR18841 ifunc relocation ordering Christophe Lyon
0 siblings, 2 replies; 6+ messages in thread
From: Christophe Lyon @ 2023-01-03 10:22 UTC (permalink / raw)
To: binutils
In order to get the ifunc relocs properly sorted the correct class
needs to be returned. The code mimics what has been done for AArch64.
Fixes:
FAIL: Run pr18841 with libpr18841b.so
FAIL: Run pr18841 with libpr18841c.so
FAIL: Run pr18841 with libpr18841bn.so (-z now)
FAIL: Run pr18841 with libpr18841cn.so (-z now)
bfd/
PR ld/18841
* elf32-arm.c (elf32_arm_reloc_type_class): Return
reloc_class_ifunc for ifunc symbols.
ld/testsuite/
* ld-arm/ifunc-12.rd: Update relocations order.
* ld-arm/ifunc-3.rd: Likewise.
* ld-arm/ifunc-4.rd: Likewise.
---
bfd/elf32-arm.c | 29 ++++++++++++++++
ld/testsuite/ld-arm/ifunc-12.rd | 8 ++---
ld/testsuite/ld-arm/ifunc-3.rd | 10 +++---
ld/testsuite/ld-arm/ifunc-4.rd | 60 ++++++++++++++++-----------------
4 files changed, 68 insertions(+), 39 deletions(-)
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 0cd3aec1436..96ba509f505 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -17691,6 +17691,35 @@ elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
const asection *rel_sec ATTRIBUTE_UNUSED,
const Elf_Internal_Rela *rela)
{
+ struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
+
+ if (htab->root.dynsym != NULL
+ && htab->root.dynsym->contents != NULL)
+ {
+ /* Check relocation against STT_GNU_IFUNC symbol if there are
+ dynamic symbols. */
+ bfd *abfd = info->output_bfd;
+ const struct elf_backend_data *bed = get_elf_backend_data (abfd);
+ unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
+ if (r_symndx != STN_UNDEF)
+ {
+ Elf_Internal_Sym sym;
+ if (!bed->s->swap_symbol_in (abfd,
+ (htab->root.dynsym->contents
+ + r_symndx * bed->s->sizeof_sym),
+ 0, &sym))
+ {
+ /* xgettext:c-format */
+ _bfd_error_handler (_("%pB symbol number %lu references"
+ " nonexistent SHT_SYMTAB_SHNDX section"),
+ abfd, r_symndx);
+ /* Ideally an error class should be returned here. */
+ }
+ else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
+ return reloc_class_ifunc;
+ }
+ }
+
switch ((int) ELF32_R_TYPE (rela->r_info))
{
case R_ARM_RELATIVE:
diff --git a/ld/testsuite/ld-arm/ifunc-12.rd b/ld/testsuite/ld-arm/ifunc-12.rd
index 69ed420e0d6..c5d62c1ac52 100644
--- a/ld/testsuite/ld-arm/ifunc-12.rd
+++ b/ld/testsuite/ld-arm/ifunc-12.rd
@@ -5,10 +5,6 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 16 entries:
00010020 ......17 R_ARM_RELATIVE
0001100c ......17 R_ARM_RELATIVE
00011018 ......17 R_ARM_RELATIVE
-00010008 ......02 R_ARM_ABS32 f2\(\) f2
-00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2
-00010014 ......02 R_ARM_ABS32 f2t\(\) f2t
-0001101c ......15 R_ARM_GLOB_DAT f2t\(\) f2t
00010004 ......a0 R_ARM_IRELATIVE
0001000c ......a0 R_ARM_IRELATIVE
00010010 ......a0 R_ARM_IRELATIVE
@@ -17,3 +13,7 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 16 entries:
00011014 ......a0 R_ARM_IRELATIVE
00011020 ......a0 R_ARM_IRELATIVE
00011028 ......a0 R_ARM_IRELATIVE
+00010008 ......02 R_ARM_ABS32 f2\(\) f2
+00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2
+00010014 ......02 R_ARM_ABS32 f2t\(\) f2t
+0001101c ......15 R_ARM_GLOB_DAT f2t\(\) f2t
diff --git a/ld/testsuite/ld-arm/ifunc-3.rd b/ld/testsuite/ld-arm/ifunc-3.rd
index e3973e44c3d..274a4e45ac4 100644
--- a/ld/testsuite/ld-arm/ifunc-3.rd
+++ b/ld/testsuite/ld-arm/ifunc-3.rd
@@ -4,16 +4,16 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 13 entries:
00010004 ......17 R_ARM_RELATIVE
0001101c ......17 R_ARM_RELATIVE
00011020 ......17 R_ARM_RELATIVE
-00010014 ......02 R_ARM_ABS32 f2\(\) f2
-00010018 ......03 R_ARM_REL32 f2\(\) f2
-00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2
-00010024 ......02 R_ARM_ABS32 f4\(\) f4
-00011028 ......15 R_ARM_GLOB_DAT f4\(\) f4
0001000c ......a0 R_ARM_IRELATIVE
0001001c ......a0 R_ARM_IRELATIVE
00011010 ......a0 R_ARM_IRELATIVE
00011014 ......a0 R_ARM_IRELATIVE
00011018 ......a0 R_ARM_IRELATIVE
+00010014 ......02 R_ARM_ABS32 f2\(\) f2
+00010018 ......03 R_ARM_REL32 f2\(\) f2
+00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2
+00010024 ......02 R_ARM_ABS32 f4\(\) f4
+00011028 ......15 R_ARM_GLOB_DAT f4\(\) f4
Relocation section '\.rel\.plt' at offset 0x8068 contains 1 entry:
Offset Info Type Sym\.Value Sym\. Name
diff --git a/ld/testsuite/ld-arm/ifunc-4.rd b/ld/testsuite/ld-arm/ifunc-4.rd
index 43a0019ca91..b8079d5c615 100644
--- a/ld/testsuite/ld-arm/ifunc-4.rd
+++ b/ld/testsuite/ld-arm/ifunc-4.rd
@@ -3,36 +3,6 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 62 entries:
Offset Info Type Sym\.Value Sym\. Name
0001106c ......17 R_ARM_RELATIVE
00011070 ......17 R_ARM_RELATIVE
-00010034 ......02 R_ARM_ABS32 aaf2\(\) aaf2
-00010038 ......03 R_ARM_REL32 aaf2\(\) aaf2
-00011088 ......15 R_ARM_GLOB_DAT aaf2\(\) aaf2
-0001003c ......02 R_ARM_ABS32 atf2\(\) atf2
-00010040 ......03 R_ARM_REL32 atf2\(\) atf2
-00011074 ......15 R_ARM_GLOB_DAT atf2\(\) atf2
-00010044 ......02 R_ARM_ABS32 abf2\(\) abf2
-00010048 ......03 R_ARM_REL32 abf2\(\) abf2
-000110a0 ......15 R_ARM_GLOB_DAT abf2\(\) abf2
-0001004c ......02 R_ARM_ABS32 taf2\(\) taf2
-00010050 ......03 R_ARM_REL32 taf2\(\) taf2
-00011084 ......15 R_ARM_GLOB_DAT taf2\(\) taf2
-00010054 ......02 R_ARM_ABS32 ttf2\(\) ttf2
-00010058 ......03 R_ARM_REL32 ttf2\(\) ttf2
-0001107c ......15 R_ARM_GLOB_DAT ttf2\(\) ttf2
-0001005c ......02 R_ARM_ABS32 tbf2\(\) tbf2
-00010060 ......03 R_ARM_REL32 tbf2\(\) tbf2
-00011080 ......15 R_ARM_GLOB_DAT tbf2\(\) tbf2
-00010094 ......02 R_ARM_ABS32 aaf4\(\) aaf4
-00011078 ......15 R_ARM_GLOB_DAT aaf4\(\) aaf4
-0001009c ......02 R_ARM_ABS32 atf4\(\) atf4
-00011098 ......15 R_ARM_GLOB_DAT atf4\(\) atf4
-000100a4 ......02 R_ARM_ABS32 abf4\(\) abf4
-0001108c ......15 R_ARM_GLOB_DAT abf4\(\) abf4
-000100ac ......02 R_ARM_ABS32 taf4\(\) taf4
-0001109c ......15 R_ARM_GLOB_DAT taf4\(\) taf4
-000100b4 ......02 R_ARM_ABS32 ttf4\(\) ttf4
-00011094 ......15 R_ARM_GLOB_DAT ttf4\(\) ttf4
-000100bc ......02 R_ARM_ABS32 tbf4\(\) tbf4
-00011090 ......15 R_ARM_GLOB_DAT tbf4\(\) tbf4
00010004 ......a0 R_ARM_IRELATIVE
0001000c ......a0 R_ARM_IRELATIVE
00010014 ......a0 R_ARM_IRELATIVE
@@ -63,6 +33,36 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 62 entries:
00011060 ......a0 R_ARM_IRELATIVE
00011064 ......a0 R_ARM_IRELATIVE
00011068 ......a0 R_ARM_IRELATIVE
+00010034 ......02 R_ARM_ABS32 aaf2\(\) aaf2
+00010038 ......03 R_ARM_REL32 aaf2\(\) aaf2
+00011088 ......15 R_ARM_GLOB_DAT aaf2\(\) aaf2
+0001003c ......02 R_ARM_ABS32 atf2\(\) atf2
+00010040 ......03 R_ARM_REL32 atf2\(\) atf2
+00011074 ......15 R_ARM_GLOB_DAT atf2\(\) atf2
+00010044 ......02 R_ARM_ABS32 abf2\(\) abf2
+00010048 ......03 R_ARM_REL32 abf2\(\) abf2
+000110a0 ......15 R_ARM_GLOB_DAT abf2\(\) abf2
+0001004c ......02 R_ARM_ABS32 taf2\(\) taf2
+00010050 ......03 R_ARM_REL32 taf2\(\) taf2
+00011084 ......15 R_ARM_GLOB_DAT taf2\(\) taf2
+00010054 ......02 R_ARM_ABS32 ttf2\(\) ttf2
+00010058 ......03 R_ARM_REL32 ttf2\(\) ttf2
+0001107c ......15 R_ARM_GLOB_DAT ttf2\(\) ttf2
+0001005c ......02 R_ARM_ABS32 tbf2\(\) tbf2
+00010060 ......03 R_ARM_REL32 tbf2\(\) tbf2
+00011080 ......15 R_ARM_GLOB_DAT tbf2\(\) tbf2
+00010094 ......02 R_ARM_ABS32 aaf4\(\) aaf4
+00011078 ......15 R_ARM_GLOB_DAT aaf4\(\) aaf4
+0001009c ......02 R_ARM_ABS32 atf4\(\) atf4
+00011098 ......15 R_ARM_GLOB_DAT atf4\(\) atf4
+000100a4 ......02 R_ARM_ABS32 abf4\(\) abf4
+0001108c ......15 R_ARM_GLOB_DAT abf4\(\) abf4
+000100ac ......02 R_ARM_ABS32 taf4\(\) taf4
+0001109c ......15 R_ARM_GLOB_DAT taf4\(\) taf4
+000100b4 ......02 R_ARM_ABS32 ttf4\(\) ttf4
+00011094 ......15 R_ARM_GLOB_DAT ttf4\(\) ttf4
+000100bc ......02 R_ARM_ABS32 tbf4\(\) tbf4
+00011090 ......15 R_ARM_GLOB_DAT tbf4\(\) tbf4
Relocation section '\.rel\.plt' at offset 0x81f0 contains 6 entries:
Offset Info Type Sym\.Value Sym\. Name
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] [arm] Skip ld/pr23169 test on arm.
2023-01-03 10:22 [PATCH] [arm] Fix PR18841 ifunc relocation ordering Christophe Lyon
@ 2023-01-03 10:22 ` Christophe Lyon
2023-01-09 13:28 ` Christophe Lyon
2023-01-09 13:28 ` [PATCH] [arm] Fix PR18841 ifunc relocation ordering Christophe Lyon
1 sibling, 1 reply; 6+ messages in thread
From: Christophe Lyon @ 2023-01-03 10:22 UTC (permalink / raw)
To: binutils
The test is already skipped on several targets (including AArch64)
because it's invalid.
* testsuite/ld-ifunc/ifunc.exp: Skip pr23169 on arm.
---
ld/testsuite/ld-ifunc/ifunc.exp | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/ld/testsuite/ld-ifunc/ifunc.exp b/ld/testsuite/ld-ifunc/ifunc.exp
index 15dcee0d967..edabcc3f744 100644
--- a/ld/testsuite/ld-ifunc/ifunc.exp
+++ b/ld/testsuite/ld-ifunc/ifunc.exp
@@ -735,9 +735,10 @@ run_ld_link_exec_tests [list \
# in the executable (which is relocated last by ld.so).
if { [isnative]
&& !([istarget "powerpc-*-*"]
- || [istarget "aarch64*-*-*"]
- || [istarget "sparc*-*-*"]
- || [istarget "riscv*-*-*"]) } {
+ || [istarget "aarch64*-*-*"]
+ || [istarget "arm*-*-*"]
+ || [istarget "sparc*-*-*"]
+ || [istarget "riscv*-*-*"]) } {
run_ld_link_exec_tests [list \
[list \
"Run pr23169a" \
--
2.25.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] [arm] Fix PR18841 ifunc relocation ordering
2023-01-03 10:22 [PATCH] [arm] Fix PR18841 ifunc relocation ordering Christophe Lyon
2023-01-03 10:22 ` [PATCH] [arm] Skip ld/pr23169 test on arm Christophe Lyon
@ 2023-01-09 13:28 ` Christophe Lyon
2023-01-09 14:59 ` Nick Clifton
1 sibling, 1 reply; 6+ messages in thread
From: Christophe Lyon @ 2023-01-09 13:28 UTC (permalink / raw)
To: binutils
ping?
(this solves some of the failures reported by Matthias on the 2.40 branch)
On 1/3/23 11:22, Christophe Lyon via Binutils wrote:
> In order to get the ifunc relocs properly sorted the correct class
> needs to be returned. The code mimics what has been done for AArch64.
>
> Fixes:
> FAIL: Run pr18841 with libpr18841b.so
> FAIL: Run pr18841 with libpr18841c.so
> FAIL: Run pr18841 with libpr18841bn.so (-z now)
> FAIL: Run pr18841 with libpr18841cn.so (-z now)
>
> bfd/
> PR ld/18841
> * elf32-arm.c (elf32_arm_reloc_type_class): Return
> reloc_class_ifunc for ifunc symbols.
>
> ld/testsuite/
> * ld-arm/ifunc-12.rd: Update relocations order.
> * ld-arm/ifunc-3.rd: Likewise.
> * ld-arm/ifunc-4.rd: Likewise.
> ---
> bfd/elf32-arm.c | 29 ++++++++++++++++
> ld/testsuite/ld-arm/ifunc-12.rd | 8 ++---
> ld/testsuite/ld-arm/ifunc-3.rd | 10 +++---
> ld/testsuite/ld-arm/ifunc-4.rd | 60 ++++++++++++++++-----------------
> 4 files changed, 68 insertions(+), 39 deletions(-)
>
> diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
> index 0cd3aec1436..96ba509f505 100644
> --- a/bfd/elf32-arm.c
> +++ b/bfd/elf32-arm.c
> @@ -17691,6 +17691,35 @@ elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
> const asection *rel_sec ATTRIBUTE_UNUSED,
> const Elf_Internal_Rela *rela)
> {
> + struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
> +
> + if (htab->root.dynsym != NULL
> + && htab->root.dynsym->contents != NULL)
> + {
> + /* Check relocation against STT_GNU_IFUNC symbol if there are
> + dynamic symbols. */
> + bfd *abfd = info->output_bfd;
> + const struct elf_backend_data *bed = get_elf_backend_data (abfd);
> + unsigned long r_symndx = ELF32_R_SYM (rela->r_info);
> + if (r_symndx != STN_UNDEF)
> + {
> + Elf_Internal_Sym sym;
> + if (!bed->s->swap_symbol_in (abfd,
> + (htab->root.dynsym->contents
> + + r_symndx * bed->s->sizeof_sym),
> + 0, &sym))
> + {
> + /* xgettext:c-format */
> + _bfd_error_handler (_("%pB symbol number %lu references"
> + " nonexistent SHT_SYMTAB_SHNDX section"),
> + abfd, r_symndx);
> + /* Ideally an error class should be returned here. */
> + }
> + else if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC)
> + return reloc_class_ifunc;
> + }
> + }
> +
> switch ((int) ELF32_R_TYPE (rela->r_info))
> {
> case R_ARM_RELATIVE:
> diff --git a/ld/testsuite/ld-arm/ifunc-12.rd b/ld/testsuite/ld-arm/ifunc-12.rd
> index 69ed420e0d6..c5d62c1ac52 100644
> --- a/ld/testsuite/ld-arm/ifunc-12.rd
> +++ b/ld/testsuite/ld-arm/ifunc-12.rd
> @@ -5,10 +5,6 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 16 entries:
> 00010020 ......17 R_ARM_RELATIVE
> 0001100c ......17 R_ARM_RELATIVE
> 00011018 ......17 R_ARM_RELATIVE
> -00010008 ......02 R_ARM_ABS32 f2\(\) f2
> -00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2
> -00010014 ......02 R_ARM_ABS32 f2t\(\) f2t
> -0001101c ......15 R_ARM_GLOB_DAT f2t\(\) f2t
> 00010004 ......a0 R_ARM_IRELATIVE
> 0001000c ......a0 R_ARM_IRELATIVE
> 00010010 ......a0 R_ARM_IRELATIVE
> @@ -17,3 +13,7 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 16 entries:
> 00011014 ......a0 R_ARM_IRELATIVE
> 00011020 ......a0 R_ARM_IRELATIVE
> 00011028 ......a0 R_ARM_IRELATIVE
> +00010008 ......02 R_ARM_ABS32 f2\(\) f2
> +00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2
> +00010014 ......02 R_ARM_ABS32 f2t\(\) f2t
> +0001101c ......15 R_ARM_GLOB_DAT f2t\(\) f2t
> diff --git a/ld/testsuite/ld-arm/ifunc-3.rd b/ld/testsuite/ld-arm/ifunc-3.rd
> index e3973e44c3d..274a4e45ac4 100644
> --- a/ld/testsuite/ld-arm/ifunc-3.rd
> +++ b/ld/testsuite/ld-arm/ifunc-3.rd
> @@ -4,16 +4,16 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 13 entries:
> 00010004 ......17 R_ARM_RELATIVE
> 0001101c ......17 R_ARM_RELATIVE
> 00011020 ......17 R_ARM_RELATIVE
> -00010014 ......02 R_ARM_ABS32 f2\(\) f2
> -00010018 ......03 R_ARM_REL32 f2\(\) f2
> -00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2
> -00010024 ......02 R_ARM_ABS32 f4\(\) f4
> -00011028 ......15 R_ARM_GLOB_DAT f4\(\) f4
> 0001000c ......a0 R_ARM_IRELATIVE
> 0001001c ......a0 R_ARM_IRELATIVE
> 00011010 ......a0 R_ARM_IRELATIVE
> 00011014 ......a0 R_ARM_IRELATIVE
> 00011018 ......a0 R_ARM_IRELATIVE
> +00010014 ......02 R_ARM_ABS32 f2\(\) f2
> +00010018 ......03 R_ARM_REL32 f2\(\) f2
> +00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2
> +00010024 ......02 R_ARM_ABS32 f4\(\) f4
> +00011028 ......15 R_ARM_GLOB_DAT f4\(\) f4
>
> Relocation section '\.rel\.plt' at offset 0x8068 contains 1 entry:
> Offset Info Type Sym\.Value Sym\. Name
> diff --git a/ld/testsuite/ld-arm/ifunc-4.rd b/ld/testsuite/ld-arm/ifunc-4.rd
> index 43a0019ca91..b8079d5c615 100644
> --- a/ld/testsuite/ld-arm/ifunc-4.rd
> +++ b/ld/testsuite/ld-arm/ifunc-4.rd
> @@ -3,36 +3,6 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 62 entries:
> Offset Info Type Sym\.Value Sym\. Name
> 0001106c ......17 R_ARM_RELATIVE
> 00011070 ......17 R_ARM_RELATIVE
> -00010034 ......02 R_ARM_ABS32 aaf2\(\) aaf2
> -00010038 ......03 R_ARM_REL32 aaf2\(\) aaf2
> -00011088 ......15 R_ARM_GLOB_DAT aaf2\(\) aaf2
> -0001003c ......02 R_ARM_ABS32 atf2\(\) atf2
> -00010040 ......03 R_ARM_REL32 atf2\(\) atf2
> -00011074 ......15 R_ARM_GLOB_DAT atf2\(\) atf2
> -00010044 ......02 R_ARM_ABS32 abf2\(\) abf2
> -00010048 ......03 R_ARM_REL32 abf2\(\) abf2
> -000110a0 ......15 R_ARM_GLOB_DAT abf2\(\) abf2
> -0001004c ......02 R_ARM_ABS32 taf2\(\) taf2
> -00010050 ......03 R_ARM_REL32 taf2\(\) taf2
> -00011084 ......15 R_ARM_GLOB_DAT taf2\(\) taf2
> -00010054 ......02 R_ARM_ABS32 ttf2\(\) ttf2
> -00010058 ......03 R_ARM_REL32 ttf2\(\) ttf2
> -0001107c ......15 R_ARM_GLOB_DAT ttf2\(\) ttf2
> -0001005c ......02 R_ARM_ABS32 tbf2\(\) tbf2
> -00010060 ......03 R_ARM_REL32 tbf2\(\) tbf2
> -00011080 ......15 R_ARM_GLOB_DAT tbf2\(\) tbf2
> -00010094 ......02 R_ARM_ABS32 aaf4\(\) aaf4
> -00011078 ......15 R_ARM_GLOB_DAT aaf4\(\) aaf4
> -0001009c ......02 R_ARM_ABS32 atf4\(\) atf4
> -00011098 ......15 R_ARM_GLOB_DAT atf4\(\) atf4
> -000100a4 ......02 R_ARM_ABS32 abf4\(\) abf4
> -0001108c ......15 R_ARM_GLOB_DAT abf4\(\) abf4
> -000100ac ......02 R_ARM_ABS32 taf4\(\) taf4
> -0001109c ......15 R_ARM_GLOB_DAT taf4\(\) taf4
> -000100b4 ......02 R_ARM_ABS32 ttf4\(\) ttf4
> -00011094 ......15 R_ARM_GLOB_DAT ttf4\(\) ttf4
> -000100bc ......02 R_ARM_ABS32 tbf4\(\) tbf4
> -00011090 ......15 R_ARM_GLOB_DAT tbf4\(\) tbf4
> 00010004 ......a0 R_ARM_IRELATIVE
> 0001000c ......a0 R_ARM_IRELATIVE
> 00010014 ......a0 R_ARM_IRELATIVE
> @@ -63,6 +33,36 @@ Relocation section '\.rel\.dyn' at offset 0x8000 contains 62 entries:
> 00011060 ......a0 R_ARM_IRELATIVE
> 00011064 ......a0 R_ARM_IRELATIVE
> 00011068 ......a0 R_ARM_IRELATIVE
> +00010034 ......02 R_ARM_ABS32 aaf2\(\) aaf2
> +00010038 ......03 R_ARM_REL32 aaf2\(\) aaf2
> +00011088 ......15 R_ARM_GLOB_DAT aaf2\(\) aaf2
> +0001003c ......02 R_ARM_ABS32 atf2\(\) atf2
> +00010040 ......03 R_ARM_REL32 atf2\(\) atf2
> +00011074 ......15 R_ARM_GLOB_DAT atf2\(\) atf2
> +00010044 ......02 R_ARM_ABS32 abf2\(\) abf2
> +00010048 ......03 R_ARM_REL32 abf2\(\) abf2
> +000110a0 ......15 R_ARM_GLOB_DAT abf2\(\) abf2
> +0001004c ......02 R_ARM_ABS32 taf2\(\) taf2
> +00010050 ......03 R_ARM_REL32 taf2\(\) taf2
> +00011084 ......15 R_ARM_GLOB_DAT taf2\(\) taf2
> +00010054 ......02 R_ARM_ABS32 ttf2\(\) ttf2
> +00010058 ......03 R_ARM_REL32 ttf2\(\) ttf2
> +0001107c ......15 R_ARM_GLOB_DAT ttf2\(\) ttf2
> +0001005c ......02 R_ARM_ABS32 tbf2\(\) tbf2
> +00010060 ......03 R_ARM_REL32 tbf2\(\) tbf2
> +00011080 ......15 R_ARM_GLOB_DAT tbf2\(\) tbf2
> +00010094 ......02 R_ARM_ABS32 aaf4\(\) aaf4
> +00011078 ......15 R_ARM_GLOB_DAT aaf4\(\) aaf4
> +0001009c ......02 R_ARM_ABS32 atf4\(\) atf4
> +00011098 ......15 R_ARM_GLOB_DAT atf4\(\) atf4
> +000100a4 ......02 R_ARM_ABS32 abf4\(\) abf4
> +0001108c ......15 R_ARM_GLOB_DAT abf4\(\) abf4
> +000100ac ......02 R_ARM_ABS32 taf4\(\) taf4
> +0001109c ......15 R_ARM_GLOB_DAT taf4\(\) taf4
> +000100b4 ......02 R_ARM_ABS32 ttf4\(\) ttf4
> +00011094 ......15 R_ARM_GLOB_DAT ttf4\(\) ttf4
> +000100bc ......02 R_ARM_ABS32 tbf4\(\) tbf4
> +00011090 ......15 R_ARM_GLOB_DAT tbf4\(\) tbf4
>
> Relocation section '\.rel\.plt' at offset 0x81f0 contains 6 entries:
> Offset Info Type Sym\.Value Sym\. Name
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] [arm] Skip ld/pr23169 test on arm.
2023-01-03 10:22 ` [PATCH] [arm] Skip ld/pr23169 test on arm Christophe Lyon
@ 2023-01-09 13:28 ` Christophe Lyon
2023-01-09 15:00 ` Nick Clifton
0 siblings, 1 reply; 6+ messages in thread
From: Christophe Lyon @ 2023-01-09 13:28 UTC (permalink / raw)
To: binutils
ping?
(this solves some of the failures reported by Matthias on the 2.40 branch)
On 1/3/23 11:22, Christophe Lyon via Binutils wrote:
> The test is already skipped on several targets (including AArch64)
> because it's invalid.
>
> * testsuite/ld-ifunc/ifunc.exp: Skip pr23169 on arm.
> ---
> ld/testsuite/ld-ifunc/ifunc.exp | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/ld/testsuite/ld-ifunc/ifunc.exp b/ld/testsuite/ld-ifunc/ifunc.exp
> index 15dcee0d967..edabcc3f744 100644
> --- a/ld/testsuite/ld-ifunc/ifunc.exp
> +++ b/ld/testsuite/ld-ifunc/ifunc.exp
> @@ -735,9 +735,10 @@ run_ld_link_exec_tests [list \
> # in the executable (which is relocated last by ld.so).
> if { [isnative]
> && !([istarget "powerpc-*-*"]
> - || [istarget "aarch64*-*-*"]
> - || [istarget "sparc*-*-*"]
> - || [istarget "riscv*-*-*"]) } {
> + || [istarget "aarch64*-*-*"]
> + || [istarget "arm*-*-*"]
> + || [istarget "sparc*-*-*"]
> + || [istarget "riscv*-*-*"]) } {
> run_ld_link_exec_tests [list \
> [list \
> "Run pr23169a" \
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] [arm] Fix PR18841 ifunc relocation ordering
2023-01-09 13:28 ` [PATCH] [arm] Fix PR18841 ifunc relocation ordering Christophe Lyon
@ 2023-01-09 14:59 ` Nick Clifton
0 siblings, 0 replies; 6+ messages in thread
From: Nick Clifton @ 2023-01-09 14:59 UTC (permalink / raw)
To: Christophe Lyon, binutils
Hi Christophe,
>> Fixes:
>> FAIL: Run pr18841 with libpr18841b.so
>> FAIL: Run pr18841 with libpr18841c.so
>> FAIL: Run pr18841 with libpr18841bn.so (-z now)
>> FAIL: Run pr18841 with libpr18841cn.so (-z now)
>>
>> bfd/
>> PR ld/18841
>> * elf32-arm.c (elf32_arm_reloc_type_class): Return
>> reloc_class_ifunc for ifunc symbols.
>>
>> ld/testsuite/
>> * ld-arm/ifunc-12.rd: Update relocations order.
>> * ld-arm/ifunc-3.rd: Likewise.
>> * ld-arm/ifunc-4.rd: Likewise.
Approved - please apply - mainline and 2.40 branch.
Cheers
Nick
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] [arm] Skip ld/pr23169 test on arm.
2023-01-09 13:28 ` Christophe Lyon
@ 2023-01-09 15:00 ` Nick Clifton
0 siblings, 0 replies; 6+ messages in thread
From: Nick Clifton @ 2023-01-09 15:00 UTC (permalink / raw)
To: Christophe Lyon, binutils
Hi Christophe,
>> * testsuite/ld-ifunc/ifunc.exp: Skip pr23169 on arm.
Approved - please apply, mainline and 2.40 branch.
Cheers
Nick
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2023-01-09 15:00 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-01-03 10:22 [PATCH] [arm] Fix PR18841 ifunc relocation ordering Christophe Lyon
2023-01-03 10:22 ` [PATCH] [arm] Skip ld/pr23169 test on arm Christophe Lyon
2023-01-09 13:28 ` Christophe Lyon
2023-01-09 15:00 ` Nick Clifton
2023-01-09 13:28 ` [PATCH] [arm] Fix PR18841 ifunc relocation ordering Christophe Lyon
2023-01-09 14:59 ` Nick Clifton
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