From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Subject: [PATCH] x86/Intel: test non-legacy VCVT{,U}SI2SH insn forms
Date: Tue, 12 Apr 2022 08:57:54 +0200 [thread overview]
Message-ID: <22e18c57-bd7d-eac7-6494-8c9cfdc4bd8d@suse.com> (raw)
For an unclear reason corresponding AVX512F tests were apparently not
cloned or used as reference here, and instead the bogus legacy forms of
the insns (with the embedded rounding specifier not last) were used.
---
Ideally the legacy forms wouldn't have been supported by gas in the
first place, but I guess it's too late now for correcting this mistake.
Note that in some other (pre-FP16) tests we also have some legacy
instances left. Perhaps we want to retain those for making sure they
continue to work even if modern code better wouldn't use them.
Ultimately even those forms aren't MASM-compatible, but I'll get to that
later.
--- a/gas/testsuite/gas/i386/avx512_fp16.s
+++ b/gas/testsuite/gas/i386/avx512_fp16.s
@@ -891,7 +891,7 @@ _start:
vcvtsh2usi edx, WORD PTR [ecx+254] #AVX512-FP16 Disp8(7f)
vcvtsh2usi edx, WORD PTR [edx-256] #AVX512-FP16 Disp8(80)
vcvtsi2sh xmm6, xmm5, edx #AVX512-FP16
- vcvtsi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtsi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtsi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000] #AVX512-FP16
vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16
vcvtsi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16 Disp8(7f)
@@ -972,7 +972,7 @@ _start:
vcvtuqq2ph xmm6, ZMMWORD PTR [ecx+8128] #AVX512-FP16 Disp8(7f)
vcvtuqq2ph xmm6{k7}{z}, QWORD PTR [edx-1024]{1to8} #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL
vcvtusi2sh xmm6, xmm5, edx #AVX512-FP16
- vcvtusi2sh xmm6, xmm5, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtusi2sh xmm6, xmm5, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtusi2sh xmm6, xmm5, DWORD PTR [esp+esi*8+0x10000000] #AVX512-FP16
vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx] #AVX512-FP16
vcvtusi2sh xmm6, xmm5, DWORD PTR [ecx+508] #AVX512-FP16 Disp8(7f)
--- a/gas/testsuite/gas/i386/x86-64-avx512_fp16.s
+++ b/gas/testsuite/gas/i386/x86-64-avx512_fp16.s
@@ -933,9 +933,9 @@ _start:
vcvtsh2usi r12, WORD PTR [rcx+254] #AVX512-FP16 Disp8(7f)
vcvtsh2usi r12, WORD PTR [rdx-256] #AVX512-FP16 Disp8(80)
vcvtsi2sh xmm30, xmm29, r12 #AVX512-FP16
- vcvtsi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtsi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtsi2sh xmm30, xmm29, edx #AVX512-FP16
- vcvtsi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtsi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtsi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000] #AVX512-FP16
vcvtsi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16
vcvtsi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-FP16 Disp8(7f)
@@ -1030,9 +1030,9 @@ _start:
vcvtuqq2ph xmm30, ZMMWORD PTR [rcx+8128] #AVX512-FP16 Disp8(7f)
vcvtuqq2ph xmm30{k7}{z}, QWORD PTR [rdx-1024]{1to8} #AVX512-FP16 BROADCAST_EN Disp8(80) MASK_ENABLING ZEROCTL
vcvtusi2sh xmm30, xmm29, r12 #AVX512-FP16
- vcvtusi2sh xmm30, xmm29, {rn-sae}, r12 #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtusi2sh xmm30, xmm29, r12, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtusi2sh xmm30, xmm29, edx #AVX512-FP16
- vcvtusi2sh xmm30, xmm29, {rn-sae}, edx #AVX512-FP16 HAS_SAE RC_CTRL
+ vcvtusi2sh xmm30, xmm29, edx, {rn-sae} #AVX512-FP16 HAS_SAE RC_CTRL
vcvtusi2sh xmm30, xmm29, DWORD PTR [rbp+r14*8+0x10000000] #AVX512-FP16
vcvtusi2sh xmm30, xmm29, DWORD PTR [r9] #AVX512-FP16
vcvtusi2sh xmm30, xmm29, DWORD PTR [rcx+508] #AVX512-FP16 Disp8(7f)
next reply other threads:[~2022-04-12 6:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-12 6:57 Jan Beulich [this message]
2022-05-18 17:38 ` H.J. Lu
2022-05-19 1:21 ` Cui, Lili
2022-05-19 5:53 ` Jan Beulich
2022-05-19 6:14 ` Cui, Lili
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