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From: Tsukasa OI <research_trasio@irq.a4lg.com>
To: Tsukasa OI <research_trasio@irq.a4lg.com>,
	Nelson Chu <nelson.chu@sifive.com>,
	Kito Cheng <kito.cheng@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>
Cc: binutils@sourceware.org
Subject: [RFC PATCH 1/5] RISC-V: Use bool on riscv_set_options members
Date: Thu, 11 Aug 2022 16:00:49 +0900	[thread overview]
Message-ID: <23764761af27e9903ec2d1ed1e0f1e9547d10efe.1660201178.git.research_trasio@irq.a4lg.com> (raw)
In-Reply-To: <cover.1660201178.git.research_trasio@irq.a4lg.com>

All uses of riscv_set_options members are safe to be bool.  If we change
them from `int' to `bool', we can shrink the `riscv_set_options' and the
intent of the members are clearer.

gas/ChangeLog:

	* config/tc-riscv.c (struct riscv_set_options): Make all members
	from `int' to `bool'.
---
 gas/config/tc-riscv.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 34ce68e8252..92eabf0cbc7 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -229,20 +229,20 @@ riscv_set_default_priv_spec (const char *s)
 /* This is the set of options which the .option pseudo-op may modify.  */
 struct riscv_set_options
 {
-  int pic; /* Generate position-independent code.  */
-  int rvc; /* Generate RVC code.  */
-  int relax; /* Emit relocs the linker is allowed to relax.  */
-  int arch_attr; /* Emit architecture and privileged elf attributes.  */
-  int csr_check; /* Enable the CSR checking.  */
+  bool pic; /* Generate position-independent code.  */
+  bool rvc; /* Generate RVC code.  */
+  bool relax; /* Emit relocs the linker is allowed to relax.  */
+  bool arch_attr; /* Emit architecture and privileged elf attributes.  */
+  bool csr_check; /* Enable the CSR checking.  */
 };
 
 static struct riscv_set_options riscv_opts =
 {
-  0, /* pic */
-  0, /* rvc */
-  1, /* relax */
-  DEFAULT_RISCV_ATTR, /* arch_attr */
-  0, /* csr_check */
+  false, /* pic */
+  false, /* rvc */
+  true,  /* relax */
+  (bool) DEFAULT_RISCV_ATTR, /* arch_attr */
+  false, /* csr_check */
 };
 
 /* Enable or disable the rvc flags for riscv_opts.  Turn on the rvc flag
-- 
2.34.1


  reply	other threads:[~2022-08-11  7:01 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-05  9:36 [PATCH] RISC-V: Output mapping symbols with ISA string once .option arch is used Nelson Chu
2022-08-05 10:31 ` Tsukasa OI
2022-08-11  7:00 ` [RFC PATCH 0/5] RISC-V: Support mapping symbols with ISA string Tsukasa OI
2022-08-11  7:00   ` Tsukasa OI [this message]
2022-08-11  7:00   ` [RFC PATCH 2/5] gas: Copyediting on tc-riscv.c Tsukasa OI
2022-08-11  7:00   ` [RFC PATCH 3/5] RISC-V: Mapping symbols with ISA string on assembler Tsukasa OI
2022-08-11  7:31     ` Jan Beulich
2022-08-11 11:43       ` Tsukasa OI
2022-08-11 12:12         ` Jan Beulich
2022-08-11  7:00   ` [RFC PATCH 4/5] RISC-V: Mapping symbols with ISA string on disassembler Tsukasa OI
2022-08-11  7:00   ` [RFC PATCH 5/5] RISC-V: New testcases for mapping symbols w/ ISA Tsukasa OI

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