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From: Jan Beulich <>
To: "H.J. Lu" <>
Cc: Binutils <>
Subject: Ping: [PATCH v2 1/7] x86/Intel: restrict suffix derivation
Date: Tue, 13 Sep 2022 16:20:28 +0200	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

On 26.08.2022 12:30, Jan Beulich via Binutils wrote:
> While in some cases deriving an AT&T-style suffix from an Intel syntax
> memory operand size specifier is necessary, in many cases this is not
> only pointless, but has led to the introduction of various workarounds:
> Excessive use of IgnoreSize and NoRex64 as well as the ToDword and
> ToQword attributes. Suppress suffix derivation when we can clearly tell
> that the memory operand's size isn't going to be needed to infer the
> possible need for the low byte/word opcode bit or an operand size prefix
> (0x66 or REX.W).
> As a result ToDword and ToQword can be dropped entirely, plus a fair
> number of IgnoreSize and NoRex64 can also be got rid of. Note that
> IgnoreSize needs to remain on legacy encoded SIMD insns with GPR
> operand, to avoid emitting an operand size prefix in 16-bit mode. (Since
> 16-bit code using SIMD insns isn't well tested, clone an existing
> testcase just enough to cover a few insns which are potentially
> problematic but are being touched here.)
> Note that while folding the VCVT{,T}S{S,D}2SI templates, VCVT{,T}SH2SI
> isn't included there. This is to fulfill the request of not allowing L
> and Q suffixes there, despite the inconsistency with VCVT{,T}S{S,D}2SI.
> ---
> Long term suffix derivation should be dropped altogether, not the least
> such that bogus error messages like "incorrect register `...' used with
> `...' suffix" don't misguid people anymore when no suffix was used at
> all.
> ---
> v2: Don't cover VCVT{,T}SH2SI with the templatization.

Since you didn't like the respective aspect of v1, may I ask for explicit
feedback on v2? If I don't hear back by the end of next week, I guess I'll
commit this change.


  parent reply	other threads:[~2022-09-13 14:20 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-26 10:28 [PATCH v2 0/7] x86: suffix handling changes Jan Beulich
2022-08-26 10:28 ` Jan Beulich
2022-08-26 10:30 ` [PATCH v2 1/7] x86/Intel: restrict suffix derivation Jan Beulich
2022-08-26 10:30   ` Jan Beulich
2022-09-13 14:20   ` Jan Beulich [this message]
2022-08-26 10:30 ` [PATCH v2 2/7] x86: improve match_template()'s diagnostics Jan Beulich
2022-08-26 10:30   ` Jan Beulich
2022-09-13 14:24   ` Ping: " Jan Beulich
2022-08-26 10:31 ` [PATCH v2 3/7] x86: re-work insn/suffix recognition Jan Beulich
2022-08-26 10:31   ` Jan Beulich
2022-08-26 10:32 ` [PATCH v2 4/7] x86-64: further re-work insn/suffix recognition to also cover MOVSL Jan Beulich
2022-08-26 10:32   ` Jan Beulich
2022-08-26 10:32 ` [PATCH v2 5/7] ix86: don't recognize/derive Q suffix in the common case Jan Beulich
2022-08-26 10:32   ` Jan Beulich
2022-08-26 10:33 ` [PATCH v2 6/7] x86-64: allow HLE store of accumulator to absolute 32-bit address Jan Beulich
2022-08-26 10:33   ` Jan Beulich
2022-08-26 10:33 ` [PATCH v2 7/7] x86: move bad-use-of-TLS-reloc check Jan Beulich
2022-08-26 10:33   ` Jan Beulich

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