* [PATCH] RISC-V: Use `xlen' on ADDIW address sequence
@ 2022-07-13 3:51 Tsukasa OI
2022-07-30 4:19 ` Tsukasa OI
0 siblings, 1 reply; 2+ messages in thread
From: Tsukasa OI @ 2022-07-13 3:51 UTC (permalink / raw)
To: Tsukasa OI, Nelson Chu, Kito Cheng, Palmer Dabbelt; +Cc: binutils
Because XLEN for the disassembler is computed and stored in the `xlen'
variable, this commit replaces uses of `info->mach' with `xlen'
(testing for ADDIW / C.ADDIW address sequence).
opcodes/ChangeLog:
* riscv-dis.c (print_insn_args): Use `xlen' to determine whether
XLEN is larger than 32.
---
opcodes/riscv-dis.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 164fd209dbd..3f69756606e 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -235,7 +235,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
case 'j':
if (((l & MASK_C_ADDI) == MATCH_C_ADDI) && rd != 0)
maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 0);
- if (info->mach == bfd_mach_riscv64
+ if (xlen > 32
&& ((l & MASK_C_ADDIW) == MATCH_C_ADDIW) && rd != 0)
maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 1);
print (info->stream, dis_style_immediate, "%d",
@@ -433,7 +433,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
if (((l & MASK_ADDI) == MATCH_ADDI && rs1 != 0)
|| (l & MASK_JALR) == MATCH_JALR)
maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0);
- if (info->mach == bfd_mach_riscv64
+ if (xlen > 32
&& ((l & MASK_ADDIW) == MATCH_ADDIW) && rs1 != 0)
maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 1);
print (info->stream, dis_style_immediate, "%d",
base-commit: dd4c046506cd4da46b439a2b4f8b6d933ecbb961
--
2.34.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] RISC-V: Use `xlen' on ADDIW address sequence
2022-07-13 3:51 [PATCH] RISC-V: Use `xlen' on ADDIW address sequence Tsukasa OI
@ 2022-07-30 4:19 ` Tsukasa OI
0 siblings, 0 replies; 2+ messages in thread
From: Tsukasa OI @ 2022-07-30 4:19 UTC (permalink / raw)
To: Nelson Chu, Kito Cheng, Palmer Dabbelt; +Cc: binutils
This patch is postponed because I will merge this into a larger patchset
with general core disassembler improvements.
Thanks,
Tsukasa
On 2022/07/13 12:51, Tsukasa OI wrote:
> Because XLEN for the disassembler is computed and stored in the `xlen'
> variable, this commit replaces uses of `info->mach' with `xlen'
> (testing for ADDIW / C.ADDIW address sequence).
>
> opcodes/ChangeLog:
>
> * riscv-dis.c (print_insn_args): Use `xlen' to determine whether
> XLEN is larger than 32.
> ---
> opcodes/riscv-dis.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> index 164fd209dbd..3f69756606e 100644
> --- a/opcodes/riscv-dis.c
> +++ b/opcodes/riscv-dis.c
> @@ -235,7 +235,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
> case 'j':
> if (((l & MASK_C_ADDI) == MATCH_C_ADDI) && rd != 0)
> maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 0);
> - if (info->mach == bfd_mach_riscv64
> + if (xlen > 32
> && ((l & MASK_C_ADDIW) == MATCH_C_ADDIW) && rd != 0)
> maybe_print_address (pd, rd, EXTRACT_CITYPE_IMM (l), 1);
> print (info->stream, dis_style_immediate, "%d",
> @@ -433,7 +433,7 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
> if (((l & MASK_ADDI) == MATCH_ADDI && rs1 != 0)
> || (l & MASK_JALR) == MATCH_JALR)
> maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 0);
> - if (info->mach == bfd_mach_riscv64
> + if (xlen > 32
> && ((l & MASK_ADDIW) == MATCH_ADDIW) && rs1 != 0)
> maybe_print_address (pd, rs1, EXTRACT_ITYPE_IMM (l), 1);
> print (info->stream, dis_style_immediate, "%d",
>
> base-commit: dd4c046506cd4da46b439a2b4f8b6d933ecbb961
^ permalink raw reply [flat|nested] 2+ messages in thread
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