From: Jan Beulich <jbeulich@suse.com>
To: "Jiang, Haochen" <haochen.jiang@intel.com>
Cc: "H.J. Lu" <hjl.tools@gmail.com>, Binutils <binutils@sourceware.org>
Subject: Re: [PATCH v2 2/3] x86: support AVX10.1/512
Date: Tue, 5 Sep 2023 10:04:51 +0200 [thread overview]
Message-ID: <27b594ab-6380-d92e-9fb4-148a48366664@suse.com> (raw)
In-Reply-To: <SA1PR11MB594697F065AC5C65A256135DECE8A@SA1PR11MB5946.namprd11.prod.outlook.com>
On 05.09.2023 10:00, Jiang, Haochen wrote:
>> ---
>> TBD: What about (VEX-encoded) FMA, F16C, AVX-VNNI, AVX-IFMA? Should we
>> make those prereqs as well, along with the various AVX512* ones?
>> (If so, the latter two would want VEX encodings generally preferred
>> over EVEX ones when AVX10.1 is explicitly enabled, unless Disp8
>> scaling helps shortening the resulting encoding.)
>
> Forgot to mention in previous thread, AVX-IFMA should not be implied for AVX10.1
> because it will not be present in Granite Rapids.
Despite AVX512-IFMA being covered by AVX10? Very odd.
Jan
next prev parent reply other threads:[~2023-09-05 8:04 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-05 7:49 [PATCH v2 0/3] x86: AVX10.1 (alternative attempt) Jan Beulich
2023-09-05 7:51 ` [PATCH v2 1/3] x86: make AES/PCMULQDQ respectively prereqs of VAES/VPCMULQDQ Jan Beulich
2023-09-05 7:52 ` [PATCH v2 2/3] x86: support AVX10.1/512 Jan Beulich
2023-09-05 8:00 ` Jiang, Haochen
2023-09-05 8:04 ` Jan Beulich [this message]
2023-09-05 8:13 ` Jiang, Haochen
2023-09-05 7:53 ` [PATCH v2 3/3] x86: support AVX10.1 vector size restrictions Jan Beulich
2023-09-05 8:11 ` Jiang, Haochen
2023-09-05 8:40 ` Jan Beulich
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