* PATCH resubmit: GAS Documentation for the ARC backend.
@ 2005-02-24 22:23 Ramana Radhakrishnan
0 siblings, 0 replies; 3+ messages in thread
From: Ramana Radhakrishnan @ 2005-02-24 22:23 UTC (permalink / raw)
To: binutils; +Cc: nickc
Hi,
The earlier patch at :
http://sourceware.org/ml/binutils/2005-02/msg00151.html
approved at:
http://sourceware.org/ml/binutils/2005-02/msg00152.html
had a couple of formatting issues. I have corrected them to the best of my
knowledge of texi and added a couple of other changes. Also changed the
grammar in a couple of sentences.
Ok to commit ?
cheers
Ramana
----
Ramana Radhakrishnan
Codito Technologies
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: PATCH resubmit: GAS Documentation for the ARC backend.
2005-02-24 22:20 Ramana Radhakrishnan
@ 2005-02-28 20:19 ` Nick Clifton
0 siblings, 0 replies; 3+ messages in thread
From: Nick Clifton @ 2005-02-28 20:19 UTC (permalink / raw)
To: ramana.radhakrishnan; +Cc: binutils
Hi Ramana,
> had a couple of formatting issues. I have corrected them to the best of my
> knowledge of texi and added a couple of other changes. Also changed the
> grammar in a couple of sentences.
Thank you for tidying up this patch. I have checked in this version of
it along with this ChangeLog message:
gas/ChangeLog
2005-02-28 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
* doc/c-arc.texi: Update documentation about ARC's extension
instructions.
Cheers
Nick
^ permalink raw reply [flat|nested] 3+ messages in thread
* PATCH resubmit: GAS Documentation for the ARC backend.
@ 2005-02-24 22:20 Ramana Radhakrishnan
2005-02-28 20:19 ` Nick Clifton
0 siblings, 1 reply; 3+ messages in thread
From: Ramana Radhakrishnan @ 2005-02-24 22:20 UTC (permalink / raw)
To: binutils; +Cc: nickc
[-- Attachment #1: Type: text/plain, Size: 415 bytes --]
Hi,
The earlier patch at :
http://sourceware.org/ml/binutils/2005-02/msg00151.html
approved at:
http://sourceware.org/ml/binutils/2005-02/msg00152.html
had a couple of formatting issues. I have corrected them to the best of my
knowledge of texi and added a couple of other changes. Also changed the
grammar in a couple of sentences.
Ok to commit ?
cheers
Ramana
----
Ramana Radhakrishnan
Codito Technologies
[-- Attachment #2: c-arc-ext-patch --]
[-- Type: application/octet-stream, Size: 8126 bytes --]
Index: c-arc.texi
===================================================================
RCS file: /cvs/src/src/gas/doc/c-arc.texi,v
retrieving revision 1.3
diff -c -3 -p -r1.3 c-arc.texi
*** c-arc.texi 12 May 2001 15:14:52 -0000 1.3
--- c-arc.texi 24 Feb 2005 18:51:32 -0000
***************
*** 1,4 ****
! @c Copyright 2000, 2001 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
--- 1,4 ----
! @c Copyright 2000, 2001,2002,2003,2004 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
*************** Base instruction set.
*** 49,55 ****
Jump-and-link (jl) instruction. No requirement of an instruction between
setting flags and conditional jump. For example:
! @smallexample
mov.f r0,r1
beq foo
@end smallexample
--- 49,55 ----
Jump-and-link (jl) instruction. No requirement of an instruction between
setting flags and conditional jump. For example:
! @smallexample @ta
mov.f r0,r1
beq foo
@end smallexample
*************** default.
*** 100,106 ****
@cindex ARC register names
@cindex register names, ARC
! *TODO*
@node ARC Floating Point
--- 100,106 ----
@cindex ARC register names
@cindex register names, ARC
! *TODO*
@node ARC Floating Point
*************** machine directives:
*** 137,172 ****
@cindex @code{extAuxRegister} directive, ARC
@item .extAuxRegister @var{name},@var{address},@var{mode}
! *TODO*
@smallexample
.extAuxRegister mulhi,0x12,w
@end smallexample
@cindex @code{extCondCode} directive, ARC
@item .extCondCode @var{suffix},@var{value}
! *TODO*
@smallexample
.extCondCode is_busy,0x14
@end smallexample
@cindex @code{extCoreRegister} directive, ARC
@item .extCoreRegister @var{name},@var{regnum},@var{mode},@var{shortcut}
! *TODO*
@smallexample
.extCoreRegister mlo,57,r,can_shortcut
@end smallexample
@cindex @code{extInstruction} directive, ARC
@item .extInstruction @var{name},@var{opcode},@var{subopcode},@var{suffixclass},@var{syntaxclass}
! *TODO*
@smallexample
! .extInstruction mul64,0x14,0x0,SUFFIX_COND,SYNTAX_3OP|OP1_MUST_BE_IMM
@end smallexample
@cindex @code{half} directive, ARC
@item .half @var{expressions}
*TODO*
--- 137,288 ----
@cindex @code{extAuxRegister} directive, ARC
@item .extAuxRegister @var{name},@var{address},@var{mode}
! The ARCtangent A4 has extensible auxiliary register space. The
! auxiliary registers can be defined in the assembler source code by
! @var{name}, the address of the register in the auxiliary register
! memory map for the variant of the ARC. The mode in which the register
! is to be operated is specified by @var{mode} which could be one of :
!
! @table @code
!
! @item r (readonly)
! @item w (write only)
! @item r|w (read or write)
!
! @end table
@smallexample
.extAuxRegister mulhi,0x12,w
+ specifies an extension auxiliary register mulhi which has
+ is at 0x12 and is only writable.
@end smallexample
@cindex @code{extCondCode} directive, ARC
@item .extCondCode @var{suffix},@var{value}
! The condition codes on the ARCtangent A4 are extensible and can be
! specified by means of assembler directives. These are specified by the
! suffix and the value for the condition code. These can be used to
! specify extra condition codes with any values.
@smallexample
.extCondCode is_busy,0x14
+ add.is_busy r1,r2,r3
+ bis_busy _main
@end smallexample
@cindex @code{extCoreRegister} directive, ARC
@item .extCoreRegister @var{name},@var{regnum},@var{mode},@var{shortcut}
! Specify an extension core register @var{name} for the
! application. This allows a register @var{name} with a valid
! @var{regnum} between 0 and 60, with the following as valid
! values for @var{mode}
!
! @table @samp
! @item @emph{r} (readonly)
! @item @emph{w} (write only)
! @item @emph{r|w} (read or write)
! @end table
!
! The other parameter gives a description of the register having a
! @var{shortcut} in the pipeline. The valid values are:
!
! @table @code
! @item can_shortcut
! @item cannot_shortcut
! @end table
@smallexample
+
.extCoreRegister mlo,57,r,can_shortcut
+
+ defines an extension core register mlo with the
+ value 57 which can shortcut the pipeline.
@end smallexample
@cindex @code{extInstruction} directive, ARC
@item .extInstruction @var{name},@var{opcode},@var{subopcode},@var{suffixclass},@var{syntaxclass}
!
! The ARCtangent A4 allows the user to specify extension instructions .
! The extension instructions are not macros . The assembler creates encodings for
! use of these instructions according to the specification by the user.
! The parameters are :
!
! @itemize @bullet
!
! @item @var{name} : Name of the extension instruction
!
! @item @var{opcode} : Opcode to be used. (Bits 27:31 in the encoding)
! Valid values 0x10-0x1f or 0x03
!
! @item @var{subopcode}: Subopcode to be used. (Bits ) Valid values
! are from 0x09-0x3f .
!
! However the correct value also depends on @var{syntaxclass}
!
! @item @var{suffixclass} : Determines the kinds of suffixes to be allowed .
! Valid values are @code{SUFFIX_NONE} , @code{SUFFIX_COND}, @code{SUFFIX_FLAG}
! which indicates the absence or presence of conditional suffixes and
! flag setting by the extension instruction . It is also possible
! to specify that an instruction sets the flags and is conditional by
! using @code{SUFFIX_CODE} | @code{SUFFIX_FLAG}
!
! @item @var{syntaxclass} : Determines the syntax class for the instruction.
! It can have the following values.
!
! @code{SYNTAX_2OP}: 2 Operand Instruction
! @code{SYNTAX_3OP}: 3 Operand Instruction
!
! In addition there could be modifiers for the syntax class
! as described below.
!
! @itemize @minus
! Syntax Class Modifiers are :
!
! @item @code{OP1_MUST_BE_IMM}: OP1_MUST_BE_IMM modifies syntax class
! SYNTAX_3OP, specifying that the first operand of a three-operand
! instruction must be an immediate (i.e. the result is discarded ).
! OP1_MUST_BE_IMM is used by bitwise ORing it with SYNTAX_3OP as given
! in the example below. This could usually be used to set the flags
! using specific instructions and not retain results.
!
! @item @code{OP1_IMM_IMPLIED}:OP1_IMM_IMPLIED modifies syntax class
! SYNTAX_20P, it specifies that there is an implied immediate
! destination operand which does not appear in the syntax. For
! example, if the source code contains an instruction like:
@smallexample
! inst r1,r2
@end smallexample
+ it really means that the first argument is an implied immediate (that
+ is, the result is discarded). This is the same as though the source
+ code were: inst 0,r1,r2. You use OP1_IMM_IMPLIED by bitwise ORing it
+ with SYNTAX_20P.
+
+
+ @end itemize
+ @end itemize
+
+ @smallexample
+ Defining MUL64 with immediate operands.
+
+ .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
+ SYNTAX_3OP|OP1_MUST_BE_IMM
+
+ The above specifies an extension instruction called mp64 which has 3 operands,
+ sets the flags, can be used with a condition code, for which the
+ first operand is an immediate.(equivalent to discarding the result
+ of the operation.)
+
+ .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
+
+ This describes a 2 operand instruction with an implicit first immediate
+ operand. The result of this operation would be discarded .
+
+ @end smallexample
+
+
+
@cindex @code{half} directive, ARC
@item .half @var{expressions}
*TODO*
*************** between the two - even for the implicit
*** 204,207 ****
@cindex opcodes for ARC
For information on the ARC instruction set, see @cite{ARC Programmers
! Reference Manual}, ARC Cores Ltd.
--- 320,323 ----
@cindex opcodes for ARC
For information on the ARC instruction set, see @cite{ARC Programmers
! Reference Manual}, ARC International (www.arc.com)
[-- Attachment #3: chglog --]
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2005-02-25 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
* doc/c-arc.texi: Update documentation for ARC's extension
instructions.
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2005-02-24 22:23 PATCH resubmit: GAS Documentation for the ARC backend Ramana Radhakrishnan
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2005-02-24 22:20 Ramana Radhakrishnan
2005-02-28 20:19 ` Nick Clifton
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