public inbox for binutils@sourceware.org
 help / color / mirror / Atom feed
* [PATCH] Add support for secidx relocations to aarch64-w64-mingw32
@ 2023-01-23  0:32 Mark Harmstone
  2023-01-23 12:02 ` Nick Clifton
  0 siblings, 1 reply; 2+ messages in thread
From: Mark Harmstone @ 2023-01-23  0:32 UTC (permalink / raw)
  To: binutils, zac.walker; +Cc: Mark Harmstone

This patch adds support for the .secidx directive and its corresponding
relocation to aarch64-w64-mingw32. As with x86, this is a two-byte LE
integer which gets filled in with the 1-based index of the output
section that a symbol ends up in.

This is needed for PDBs, which represent addresses as a .secrel32,
.secidx pair.

The test is substantially the same as for amd64, but with changes made
for padding and alignment.

---
 bfd/coff-aarch64.c                  | 36 ++++++++++++++++++++++++++++-
 gas/config/tc-aarch64.c             | 26 +++++++++++++++++++++
 ld/testsuite/ld-pe/pe.exp           |  2 ++
 ld/testsuite/ld-pe/secidx_aarch64.d | 27 ++++++++++++++++++++++
 4 files changed, 90 insertions(+), 1 deletion(-)
 create mode 100644 ld/testsuite/ld-pe/secidx_aarch64.d

diff --git a/bfd/coff-aarch64.c b/bfd/coff-aarch64.c
index 73fa2442dfe..12e242e18d0 100644
--- a/bfd/coff-aarch64.c
+++ b/bfd/coff-aarch64.c
@@ -305,6 +305,10 @@ static const reloc_howto_type arm64_reloc_howto_secrel
 = HOW (IMAGE_REL_ARM64_SECREL,
        0, 4, 32, false, 0, dont, secrel_reloc, 0xffffffff);
 
+static const reloc_howto_type arm64_reloc_howto_secidx
+= HOW (IMAGE_REL_ARM64_SECTION,
+       0, 2, 16, false, 0, dont, NULL, 0xffff);
+
 static const reloc_howto_type* const arm64_howto_table[] = {
      &arm64_reloc_howto_abs,
      &arm64_reloc_howto_64,
@@ -318,7 +322,8 @@ static const reloc_howto_type* const arm64_howto_table[] = {
      &arm64_reloc_howto_branch14,
      &arm64_reloc_howto_pgoff12a,
      &arm64_reloc_howto_32nb,
-     &arm64_reloc_howto_secrel
+     &arm64_reloc_howto_secrel,
+     &arm64_reloc_howto_secidx
 };
 
 /* No adjustment to addends should be needed.  The actual relocation
@@ -372,6 +377,8 @@ coff_aarch64_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, bfd_reloc_code_real
     return &arm64_reloc_howto_32nb;
   case BFD_RELOC_32_SECREL:
     return &arm64_reloc_howto_secrel;
+  case BFD_RELOC_16_SECIDX:
+    return &arm64_reloc_howto_secidx;
   default:
     BFD_FAIL ();
     return NULL;
@@ -428,6 +435,8 @@ coff_aarch64_rtype_lookup (unsigned int code)
       return &arm64_reloc_howto_32nb;
     case IMAGE_REL_ARM64_SECREL:
       return &arm64_reloc_howto_secrel;
+    case IMAGE_REL_ARM64_SECTION:
+      return &arm64_reloc_howto_secidx;
     default:
       return NULL;
   }
@@ -847,6 +856,31 @@ coff_pe_aarch64_relocate_section (bfd *output_bfd,
 	    break;
 	  }
 
+	case IMAGE_REL_ARM64_SECTION:
+	  {
+	    uint16_t idx = 0, i = 1;
+	    asection *s;
+
+	    s = output_bfd->sections;
+	    while (s)
+	      {
+		if (s == sec->output_section)
+		  {
+		    idx = i;
+		    break;
+		  }
+
+		i++;
+		s = s->next;
+	      }
+
+
+	    bfd_putl16 (idx, contents + rel->r_vaddr);
+	    rel->r_type = IMAGE_REL_ARM64_ABSOLUTE;
+
+	    break;
+	  }
+
 	default:
 	  info->callbacks->einfo (_("%F%P: Unhandled relocation type %u\n"),
 				  rel->r_type);
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 2b74db256a2..2aeab6f958a 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2127,6 +2127,25 @@ tc_pe_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
   exp.X_add_number = 0;
   emit_expr (&exp, size);
 }
+
+static void
+s_secidx (int dummy ATTRIBUTE_UNUSED)
+{
+  expressionS exp;
+
+  do
+    {
+      expression (&exp);
+      if (exp.X_op == O_symbol)
+	exp.X_op = O_secidx;
+
+      emit_expr (&exp, 2);
+    }
+  while (*input_line_pointer++ == ',');
+
+  input_line_pointer--;
+  demand_empty_rest_of_line ();
+}
 #endif	/* TE_PE */
 
 static void s_aarch64_arch (int);
@@ -2166,6 +2185,7 @@ const pseudo_typeS md_pseudo_table[] = {
 #endif
 #ifdef TE_PE
   {"secrel32", s_secrel, 0},
+  {"secidx", s_secidx, 0},
 #endif
   {"float16", float_cons, 'h'},
   {"bfloat16", float_cons, 'b'},
@@ -9304,6 +9324,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
 
     case BFD_RELOC_RVA:
     case BFD_RELOC_32_SECREL:
+    case BFD_RELOC_16_SECIDX:
       break;
 
     default:
@@ -9395,6 +9416,11 @@ cons_fix_new_aarch64 (fragS * frag, int where, int size, expressionS * exp)
       exp->X_op = O_symbol;
       type = BFD_RELOC_32_SECREL;
     }
+  else if (exp->X_op == O_secidx)
+    {
+      exp->X_op = O_symbol;
+      type = BFD_RELOC_16_SECIDX;
+    }
   else
     {
 #endif
diff --git a/ld/testsuite/ld-pe/pe.exp b/ld/testsuite/ld-pe/pe.exp
index c4d48bb8c08..35a88d26bcf 100644
--- a/ld/testsuite/ld-pe/pe.exp
+++ b/ld/testsuite/ld-pe/pe.exp
@@ -86,6 +86,8 @@ if {[istarget "aarch64-*-pe*"] || [istarget "aarch64-*-mingw*"]} {
 	{{objdump -dr aarch64.d}} "aarch64.x"}
       {".secrel32" "--disable-reloc-section" "" "" {secrel1.s secrel2.s}
 	{{objdump -s secrel_64.d}} "secrel.x"}
+      {".secidx" "--disable-reloc-section" "" "" {secidx1.s secidx2.s}
+	{{objdump -s secidx_aarch64.d}} "secidx.x"}
     }
 
     run_ld_link_tests $pe_tests
diff --git a/ld/testsuite/ld-pe/secidx_aarch64.d b/ld/testsuite/ld-pe/secidx_aarch64.d
new file mode 100644
index 00000000000..e119d1cff6f
--- /dev/null
+++ b/ld/testsuite/ld-pe/secidx_aarch64.d
@@ -0,0 +1,27 @@
+
+tmpdir/secidx\.x: +file format pei-.*
+
+Contents of section \.text:
+ .*1000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  .*
+ .*1010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  .*
+ .*1020 3c3c3c3c 3e3e3e3e 3e000000 00000000  .*
+ .*1030 ffffffff ffffffff 00000000 00000000  .*
+ .*1040 ffffffff ffffffff 00000000 00000000  .*
+Contents of section \.data:
+ .*2000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  .*
+ .*2010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  .*
+ .*2020 3e3e3e3e 01001101 00110100 11010011  .*
+ .*2030 3c3c3c3c 3c3c3c3c 3e3e3e3e 02001102  .*
+ .*2040 00110200 11020011 3c3c3c3c 3c3c3c3c  .*
+ .*2050 3e3e3e3e 03001103 00110300 11030011  .*
+ .*2060 3c3c3c3c 3c3c3c3c 3e3e3e3e 01001102  .*
+ .*2070 00110300 113c3c3c 3c3c3c3c 3c000000  .*
+ .*2080 3c3c3c3e 3e3e3e3e 3e000000 .*
+Contents of section \.rdata:
+ .*3000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c  .*
+ .*3010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c  .*
+ .*3020 3e3e3e3e 00000000 00000000 00000000  .*
+ .*3030 3c3c3c3e 3e3e3e3e 3e000000 .*
+Contents of section \.idata:
+ .*4000 00000000 00000000 00000000 00000000  .*
+ .*4010 00000000 00000000                    .*
-- 
2.38.2


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] Add support for secidx relocations to aarch64-w64-mingw32
  2023-01-23  0:32 [PATCH] Add support for secidx relocations to aarch64-w64-mingw32 Mark Harmstone
@ 2023-01-23 12:02 ` Nick Clifton
  0 siblings, 0 replies; 2+ messages in thread
From: Nick Clifton @ 2023-01-23 12:02 UTC (permalink / raw)
  To: Mark Harmstone, binutils, zac.walker

Hi Mark,

>   bfd/coff-aarch64.c                  | 36 ++++++++++++++++++++++++++++-
>   gas/config/tc-aarch64.c             | 26 +++++++++++++++++++++
>   ld/testsuite/ld-pe/pe.exp           |  2 ++
>   ld/testsuite/ld-pe/secidx_aarch64.d | 27 ++++++++++++++++++++++

Approved - please apply.

Cheers
   Nick



^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2023-01-23 12:02 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-01-23  0:32 [PATCH] Add support for secidx relocations to aarch64-w64-mingw32 Mark Harmstone
2023-01-23 12:02 ` Nick Clifton

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).