* [PATCH 0/2] x86: rework AMX insn disassembly
@ 2023-04-21 10:15 Jan Beulich
2023-04-21 10:16 ` [PATCH 1/2] x86: rework AMX multiplication " Jan Beulich
2023-04-21 10:16 ` [PATCH 2/2] x86: rework AMX control " Jan Beulich
0 siblings, 2 replies; 3+ messages in thread
From: Jan Beulich @ 2023-04-21 10:15 UTC (permalink / raw)
To: Binutils; +Cc: H.J. Lu
As previously indicated, there are inefficiencies (waste of space).
Plus in the course I noticed a missing decode step for one of the
insns (see patch 2).
1: rework AMX multiplication insn disassembly
2: rework AMX control insn disassembly
Jan
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/2] x86: rework AMX multiplication insn disassembly
2023-04-21 10:15 [PATCH 0/2] x86: rework AMX insn disassembly Jan Beulich
@ 2023-04-21 10:16 ` Jan Beulich
2023-04-21 10:16 ` [PATCH 2/2] x86: rework AMX control " Jan Beulich
1 sibling, 0 replies; 3+ messages in thread
From: Jan Beulich @ 2023-04-21 10:16 UTC (permalink / raw)
To: Binutils; +Cc: H.J. Lu
Consistently do 64-bit first, ModR/M second, VEX.L third, VEX.W fourth,
and prefix last, resulting in fewer table entries. Note that in the
course of the re-work wrong M_0 suffixes are also corrected to be M_1
(partly infixes now).
Since it ended up confusing while testing the change, also adjust the
test name in x86-64-amx-bad.d (to be distinct from x86-64-amx.d's).
---
The %XS plans didn't work out, as that's EVEX-specific.
--- a/gas/testsuite/gas/i386/x86-64-amx-bad.d
+++ b/gas/testsuite/gas/i386/x86-64-amx-bad.d
@@ -1,6 +1,6 @@
#as:
#objdump: -drw
-#name: x86_64 AMX insns
+#name: x86_64 Illegal AMX insns
#source: x86-64-amx-bad.s
.*: +file format .*
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -976,13 +976,9 @@ enum
MOD_VEX_0F384B_X86_64_P_2_W_0,
MOD_VEX_0F384B_X86_64_P_3_W_0,
MOD_VEX_0F385A,
- MOD_VEX_0F385C_X86_64_P_1_W_0,
- MOD_VEX_0F385C_X86_64_P_3_W_0,
- MOD_VEX_0F385E_X86_64_P_0_W_0,
- MOD_VEX_0F385E_X86_64_P_1_W_0,
- MOD_VEX_0F385E_X86_64_P_2_W_0,
- MOD_VEX_0F385E_X86_64_P_3_W_0,
- MOD_VEX_0F386C_X86_64_W_0,
+ MOD_VEX_0F385C_X86_64,
+ MOD_VEX_0F385E_X86_64,
+ MOD_VEX_0F386C_X86_64,
MOD_VEX_0F388C,
MOD_VEX_0F388E,
MOD_VEX_0F3A30_L_0,
@@ -1183,9 +1179,9 @@ enum
PREFIX_VEX_0F384B_X86_64,
PREFIX_VEX_0F3850_W_0,
PREFIX_VEX_0F3851_W_0,
- PREFIX_VEX_0F385C_X86_64,
- PREFIX_VEX_0F385E_X86_64,
- PREFIX_VEX_0F386C_X86_64_W_0_M_1_L_0,
+ PREFIX_VEX_0F385C_X86_64_M_1_L_0_W_0,
+ PREFIX_VEX_0F385E_X86_64_M_1_L_0_W_0,
+ PREFIX_VEX_0F386C_X86_64_M_1_L_0_W_0,
PREFIX_VEX_0F3872,
PREFIX_VEX_0F38B0_W_0,
PREFIX_VEX_0F38B1_W_0,
@@ -1434,13 +1430,9 @@ enum
VEX_LEN_0F384B_X86_64_P_2_W_0_M_0,
VEX_LEN_0F384B_X86_64_P_3_W_0_M_0,
VEX_LEN_0F385A_M_0,
- VEX_LEN_0F385C_X86_64_P_1_W_0_M_0,
- VEX_LEN_0F385C_X86_64_P_3_W_0_M_0,
- VEX_LEN_0F385E_X86_64_P_0_W_0_M_0,
- VEX_LEN_0F385E_X86_64_P_1_W_0_M_0,
- VEX_LEN_0F385E_X86_64_P_2_W_0_M_0,
- VEX_LEN_0F385E_X86_64_P_3_W_0_M_0,
- VEX_LEN_0F386C_X86_64_W_0_M_1,
+ VEX_LEN_0F385C_X86_64_M_1,
+ VEX_LEN_0F385E_X86_64_M_1,
+ VEX_LEN_0F386C_X86_64_M_1,
VEX_LEN_0F38DB,
VEX_LEN_0F38F2,
VEX_LEN_0F38F3,
@@ -1602,13 +1594,9 @@ enum
VEX_W_0F3858,
VEX_W_0F3859,
VEX_W_0F385A_M_0_L_0,
- VEX_W_0F385C_X86_64_P_1,
- VEX_W_0F385C_X86_64_P_3,
- VEX_W_0F385E_X86_64_P_0,
- VEX_W_0F385E_X86_64_P_1,
- VEX_W_0F385E_X86_64_P_2,
- VEX_W_0F385E_X86_64_P_3,
- VEX_W_0F386C_X86_64,
+ VEX_W_0F385C_X86_64_M_1_L_0,
+ VEX_W_0F385E_X86_64_M_1_L_0,
+ VEX_W_0F386C_X86_64_M_1_L_0,
VEX_W_0F3872_P_1,
VEX_W_0F3878,
VEX_W_0F3879,
@@ -4147,23 +4135,23 @@ static const struct dis386 prefix_table[
{ "%XVvpdpbusds", { XM, Vex, EXx }, 0 },
{ "vpdpbssds", { XM, Vex, EXx }, 0 },
},
- /* PREFIX_VEX_0F385C_X86_64 */
+ /* PREFIX_VEX_0F385C_X86_64_M_1_L_0_W_0 */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F385C_X86_64_P_1) },
+ { "tdpbf16ps", { TMM, EXtmm, VexTmm }, 0 },
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F385C_X86_64_P_3) },
+ { "tdpfp16ps", { TMM, EXtmm, VexTmm }, 0 },
},
- /* PREFIX_VEX_0F385E_X86_64 */
+ /* PREFIX_VEX_0F385E_X86_64_M_1_L_0_W_0 */
{
- { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_0) },
- { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_1) },
- { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_2) },
- { VEX_W_TABLE (VEX_W_0F385E_X86_64_P_3) },
+ { "tdpbuud", {TMM, EXtmm, VexTmm }, 0 },
+ { "tdpbsud", {TMM, EXtmm, VexTmm }, 0 },
+ { "tdpbusd", {TMM, EXtmm, VexTmm }, 0 },
+ { "tdpbssd", {TMM, EXtmm, VexTmm }, 0 },
},
- /* PREFIX_VEX_0F386C_X86_64_W_0_M_1_L_0 */
+ /* PREFIX_VEX_0F386C_X86_64_M_1_L_0_W_0 */
{
{ "tcmmrlfp16ps", { TMM, EXtmm, VexTmm }, 0 },
{ Bad_Opcode },
@@ -4528,19 +4516,19 @@ static const struct dis386 x86_64_table[
/* X86_64_VEX_0F385C */
{
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F385C_X86_64) },
+ { MOD_TABLE (MOD_VEX_0F385C_X86_64) },
},
/* X86_64_VEX_0F385E */
{
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F385E_X86_64) },
+ { MOD_TABLE (MOD_VEX_0F385E_X86_64) },
},
/* X86_64_VEX_0F386C */
{
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F386C_X86_64) },
+ { MOD_TABLE (MOD_VEX_0F386C_X86_64) },
},
/* X86_64_VEX_0F38E0 */
@@ -7208,39 +7196,19 @@ static const struct dis386 vex_len_table
{ VEX_W_TABLE (VEX_W_0F385A_M_0_L_0) },
},
- /* VEX_LEN_0F385C_X86_64_P_1_W_0_M_0 */
- {
- { "tdpbf16ps", { TMM, EXtmm, VexTmm }, 0 },
- },
-
- /* VEX_LEN_0F385C_X86_64_P_3_W_0_M_0 */
- {
- { "tdpfp16ps", { TMM, EXtmm, VexTmm }, 0 },
- },
-
- /* VEX_LEN_0F385E_X86_64_P_0_W_0_M_0 */
- {
- { "tdpbuud", {TMM, EXtmm, VexTmm }, 0 },
- },
-
- /* VEX_LEN_0F385E_X86_64_P_1_W_0_M_0 */
- {
- { "tdpbsud", {TMM, EXtmm, VexTmm }, 0 },
- },
-
- /* VEX_LEN_0F385E_X86_64_P_2_W_0_M_0 */
+ /* VEX_LEN_0F385C_X86_64_M_1 */
{
- { "tdpbusd", {TMM, EXtmm, VexTmm }, 0 },
+ { VEX_W_TABLE (VEX_W_0F385C_X86_64_M_1_L_0) },
},
- /* VEX_LEN_0F385E_X86_64_P_3_W_0_M_0 */
+ /* VEX_LEN_0F385E_X86_64_M_1 */
{
- { "tdpbssd", {TMM, EXtmm, VexTmm }, 0 },
+ { VEX_W_TABLE (VEX_W_0F385E_X86_64_M_1_L_0) },
},
- /* VEX_LEN_0F386C_X86_64_W_0_M_1 */
+ /* VEX_LEN_0F386C_X86_64_M_1 */
{
- { PREFIX_TABLE (PREFIX_VEX_0F386C_X86_64_W_0_M_1_L_0) },
+ { VEX_W_TABLE (VEX_W_0F386C_X86_64_M_1_L_0) },
},
/* VEX_LEN_0F38DB */
@@ -7888,32 +7856,16 @@ static const struct dis386 vex_w_table[]
{ "vbroadcasti128", { XM, Mxmm }, PREFIX_DATA },
},
{
- /* VEX_W_0F385C_X86_64_P_1 */
- { MOD_TABLE (MOD_VEX_0F385C_X86_64_P_1_W_0) },
- },
- {
- /* VEX_W_0F385C_X86_64_P_3 */
- { MOD_TABLE (MOD_VEX_0F385C_X86_64_P_3_W_0) },
- },
- {
- /* VEX_W_0F385E_X86_64_P_0 */
- { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_0_W_0) },
+ /* VEX_W_0F385C_X86_64_M_1_L_0 */
+ { PREFIX_TABLE (PREFIX_VEX_0F385C_X86_64_M_1_L_0_W_0) },
},
{
- /* VEX_W_0F385E_X86_64_P_1 */
- { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_1_W_0) },
+ /* VEX_W_0F385E_X86_64_M_1_L_0 */
+ { PREFIX_TABLE (PREFIX_VEX_0F385E_X86_64_M_1_L_0_W_0) },
},
{
- /* VEX_W_0F385E_X86_64_P_2 */
- { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_2_W_0) },
- },
- {
- /* VEX_W_0F385E_X86_64_P_3 */
- { MOD_TABLE (MOD_VEX_0F385E_X86_64_P_3_W_0) },
- },
- {
- /* VEX_W_0F386C_X86_64 */
- { MOD_TABLE (MOD_VEX_0F386C_X86_64_W_0) },
+ /* VEX_W_0F386C_X86_64_M_1_L_0 */
+ { PREFIX_TABLE (PREFIX_VEX_0F386C_X86_64_M_1_L_0_W_0) },
},
{
/* VEX_W_0F3872_P_1 */
@@ -8733,39 +8685,19 @@ static const struct dis386 mod_table[][2
{ VEX_LEN_TABLE (VEX_LEN_0F385A_M_0) },
},
{
- /* MOD_VEX_0F385C_X86_64_P_1_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F385C_X86_64_P_3_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_P_3_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F385E_X86_64_P_0_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F385E_X86_64_P_1_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F385E_X86_64_P_2_W_0 */
+ /* MOD_VEX_0F385C_X86_64 */
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0) },
+ { VEX_LEN_TABLE (VEX_LEN_0F385C_X86_64_M_1) },
},
{
- /* MOD_VEX_0F385E_X86_64_P_3_W_0 */
+ /* MOD_VEX_0F385E_X86_64 */
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0) },
+ { VEX_LEN_TABLE (VEX_LEN_0F385E_X86_64_M_1) },
},
{
- /* MOD_VEX_0F386C_X86_64_W_0 */
+ /* MOD_VEX_0F386C_X86_64 */
{ Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F386C_X86_64_W_0_M_1) },
+ { VEX_LEN_TABLE (VEX_LEN_0F386C_X86_64_M_1) },
},
{
/* MOD_VEX_0F388C */
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 2/2] x86: rework AMX control insn disassembly
2023-04-21 10:15 [PATCH 0/2] x86: rework AMX insn disassembly Jan Beulich
2023-04-21 10:16 ` [PATCH 1/2] x86: rework AMX multiplication " Jan Beulich
@ 2023-04-21 10:16 ` Jan Beulich
1 sibling, 0 replies; 3+ messages in thread
From: Jan Beulich @ 2023-04-21 10:16 UTC (permalink / raw)
To: Binutils; +Cc: H.J. Lu
Consistently do 64-bit first, VEX.L second, VEX.W third, ModR/M fourth,
and only then prefix, resulting in fewer table entries. Note that in the
course of the re-work
- TILEZERO has a previously missing decode step through rm_table[]
added,
- a wrong M_0 suffix for TILEZERO is also corrected to be M_1 (now an
infix).
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -841,7 +841,7 @@ enum
REG_VEX_0F72_M_0,
REG_VEX_0F73_M_0,
REG_VEX_0FAE,
- REG_VEX_0F3849_X86_64_P_0_W_0_M_1,
+ REG_VEX_0F3849_X86_64_L_0_W_0_M_1_P_0,
REG_VEX_0F38F3_L_0,
REG_XOP_09_01_L_0,
@@ -969,12 +969,8 @@ enum
MOD_VEX_0F382D,
MOD_VEX_0F382E,
MOD_VEX_0F382F,
- MOD_VEX_0F3849_X86_64_P_0_W_0,
- MOD_VEX_0F3849_X86_64_P_2_W_0,
- MOD_VEX_0F3849_X86_64_P_3_W_0,
- MOD_VEX_0F384B_X86_64_P_1_W_0,
- MOD_VEX_0F384B_X86_64_P_2_W_0,
- MOD_VEX_0F384B_X86_64_P_3_W_0,
+ MOD_VEX_0F3849_X86_64_L_0_W_0,
+ MOD_VEX_0F384B_X86_64_L_0_W_0,
MOD_VEX_0F385A,
MOD_VEX_0F385C_X86_64,
MOD_VEX_0F385E_X86_64,
@@ -1018,7 +1014,8 @@ enum
RM_0FAE_REG_7_MOD_3,
RM_0F3A0F_P_1_MOD_3_REG_0,
- RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0
+ RM_VEX_0F3849_X86_64_L_0_W_0_M_1_P_0_R_0,
+ RM_VEX_0F3849_X86_64_L_0_W_0_M_1_P_3,
};
enum
@@ -1175,8 +1172,9 @@ enum
PREFIX_VEX_0FD0,
PREFIX_VEX_0FE6,
PREFIX_VEX_0FF0,
- PREFIX_VEX_0F3849_X86_64,
- PREFIX_VEX_0F384B_X86_64,
+ PREFIX_VEX_0F3849_X86_64_L_0_W_0_M_0,
+ PREFIX_VEX_0F3849_X86_64_L_0_W_0_M_1,
+ PREFIX_VEX_0F384B_X86_64_L_0_W_0_M_0,
PREFIX_VEX_0F3850_W_0,
PREFIX_VEX_0F3851_W_0,
PREFIX_VEX_0F385C_X86_64_M_1_L_0_W_0,
@@ -1422,13 +1420,8 @@ enum
VEX_LEN_0F381A_M_0,
VEX_LEN_0F3836,
VEX_LEN_0F3841,
- VEX_LEN_0F3849_X86_64_P_0_W_0_M_0,
- VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0,
- VEX_LEN_0F3849_X86_64_P_2_W_0_M_0,
- VEX_LEN_0F3849_X86_64_P_3_W_0_M_0,
- VEX_LEN_0F384B_X86_64_P_1_W_0_M_0,
- VEX_LEN_0F384B_X86_64_P_2_W_0_M_0,
- VEX_LEN_0F384B_X86_64_P_3_W_0_M_0,
+ VEX_LEN_0F3849_X86_64,
+ VEX_LEN_0F384B_X86_64,
VEX_LEN_0F385A_M_0,
VEX_LEN_0F385C_X86_64_M_1,
VEX_LEN_0F385E_X86_64_M_1,
@@ -1581,12 +1574,8 @@ enum
VEX_W_0F382F_M_0,
VEX_W_0F3836,
VEX_W_0F3846,
- VEX_W_0F3849_X86_64_P_0,
- VEX_W_0F3849_X86_64_P_2,
- VEX_W_0F3849_X86_64_P_3,
- VEX_W_0F384B_X86_64_P_1,
- VEX_W_0F384B_X86_64_P_2,
- VEX_W_0F384B_X86_64_P_3,
+ VEX_W_0F3849_X86_64_L_0,
+ VEX_W_0F384B_X86_64_L_0,
VEX_W_0F3850,
VEX_W_0F3851,
VEX_W_0F3852,
@@ -2948,9 +2937,9 @@ static const struct dis386 reg_table[][8
{ MOD_TABLE (MOD_VEX_0FAE_REG_2) },
{ MOD_TABLE (MOD_VEX_0FAE_REG_3) },
},
- /* REG_VEX_0F3849_X86_64_P_0_W_0_M_1 */
+ /* REG_VEX_0F3849_X86_64_L_0_W_0_M_1_P_0 */
{
- { RM_TABLE (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0) },
+ { RM_TABLE (RM_VEX_0F3849_X86_64_L_0_W_0_M_1_P_0_R_0) },
},
/* REG_VEX_0F38F3_L_0 */
{
@@ -4104,20 +4093,27 @@ static const struct dis386 prefix_table[
{ MOD_TABLE (MOD_VEX_0FF0_PREFIX_3) },
},
- /* PREFIX_VEX_0F3849_X86_64 */
+ /* PREFIX_VEX_0F3849_X86_64_L_0_W_0_M_0 */
{
- { VEX_W_TABLE (VEX_W_0F3849_X86_64_P_0) },
+ { "ldtilecfg", { M }, 0 },
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F3849_X86_64_P_2) },
- { VEX_W_TABLE (VEX_W_0F3849_X86_64_P_3) },
+ { "sttilecfg", { M }, 0 },
},
- /* PREFIX_VEX_0F384B_X86_64 */
+ /* PREFIX_VEX_0F3849_X86_64_L_0_W_0_M_1 */
{
+ { REG_TABLE (REG_VEX_0F3849_X86_64_L_0_W_0_M_1_P_0) },
+ { Bad_Opcode },
{ Bad_Opcode },
- { VEX_W_TABLE (VEX_W_0F384B_X86_64_P_1) },
- { VEX_W_TABLE (VEX_W_0F384B_X86_64_P_2) },
- { VEX_W_TABLE (VEX_W_0F384B_X86_64_P_3) },
+ { RM_TABLE (RM_VEX_0F3849_X86_64_L_0_W_0_M_1_P_3) },
+ },
+
+ /* PREFIX_VEX_0F384B_X86_64_L_0_W_0_M_0 */
+ {
+ { Bad_Opcode },
+ { "tilestored", { MVexSIBMEM, TMM }, 0 },
+ { "tileloaddt1", { TMM, MVexSIBMEM }, 0 },
+ { "tileloadd", { TMM, MVexSIBMEM }, 0 },
},
/* PREFIX_VEX_0F3850_W_0 */
@@ -4504,13 +4500,13 @@ static const struct dis386 x86_64_table[
/* X86_64_VEX_0F3849 */
{
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F3849_X86_64) },
+ { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64) },
},
/* X86_64_VEX_0F384B */
{
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_VEX_0F384B_X86_64) },
+ { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64) },
},
/* X86_64_VEX_0F385C */
@@ -7156,38 +7152,14 @@ static const struct dis386 vex_len_table
{ "vphminposuw", { XM, EXx }, PREFIX_DATA },
},
- /* VEX_LEN_0F3849_X86_64_P_0_W_0_M_0 */
- {
- { "ldtilecfg", { M }, 0 },
- },
-
- /* VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0 */
- {
- { "tilerelease", { Skip_MODRM }, 0 },
- },
-
- /* VEX_LEN_0F3849_X86_64_P_2_W_0_M_0 */
- {
- { "sttilecfg", { M }, 0 },
- },
-
- /* VEX_LEN_0F3849_X86_64_P_3_W_0_M_0 */
- {
- { "tilezero", { TMM, Skip_MODRM }, 0 },
- },
-
- /* VEX_LEN_0F384B_X86_64_P_1_W_0_M_0 */
+ /* VEX_LEN_0F3849_X86_64 */
{
- { "tilestored", { MVexSIBMEM, TMM }, 0 },
- },
- /* VEX_LEN_0F384B_X86_64_P_2_W_0_M_0 */
- {
- { "tileloaddt1", { TMM, MVexSIBMEM }, 0 },
+ { VEX_W_TABLE (VEX_W_0F3849_X86_64_L_0) },
},
- /* VEX_LEN_0F384B_X86_64_P_3_W_0_M_0 */
+ /* VEX_LEN_0F384B_X86_64 */
{
- { "tileloadd", { TMM, MVexSIBMEM }, 0 },
+ { VEX_W_TABLE (VEX_W_0F384B_X86_64_L_0) },
},
/* VEX_LEN_0F385A_M_0 */
@@ -7804,28 +7776,12 @@ static const struct dis386 vex_w_table[]
{ "vpsravd", { XM, Vex, EXx }, PREFIX_DATA },
},
{
- /* VEX_W_0F3849_X86_64_P_0 */
- { MOD_TABLE (MOD_VEX_0F3849_X86_64_P_0_W_0) },
- },
- {
- /* VEX_W_0F3849_X86_64_P_2 */
- { MOD_TABLE (MOD_VEX_0F3849_X86_64_P_2_W_0) },
- },
- {
- /* VEX_W_0F3849_X86_64_P_3 */
- { MOD_TABLE (MOD_VEX_0F3849_X86_64_P_3_W_0) },
+ /* VEX_W_0F3849_X86_64_L_0 */
+ { MOD_TABLE (MOD_VEX_0F3849_X86_64_L_0_W_0) },
},
{
- /* VEX_W_0F384B_X86_64_P_1 */
- { MOD_TABLE (MOD_VEX_0F384B_X86_64_P_1_W_0) },
- },
- {
- /* VEX_W_0F384B_X86_64_P_2 */
- { MOD_TABLE (MOD_VEX_0F384B_X86_64_P_2_W_0) },
- },
- {
- /* VEX_W_0F384B_X86_64_P_3 */
- { MOD_TABLE (MOD_VEX_0F384B_X86_64_P_3_W_0) },
+ /* VEX_W_0F384B_X86_64_L_0 */
+ { MOD_TABLE (MOD_VEX_0F384B_X86_64_L_0_W_0) },
},
{
/* VEX_W_0F3850 */
@@ -8655,30 +8611,13 @@ static const struct dis386 mod_table[][2
{ VEX_W_TABLE (VEX_W_0F382F_M_0) },
},
{
- /* MOD_VEX_0F3849_X86_64_P_0_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0) },
- { REG_TABLE (REG_VEX_0F3849_X86_64_P_0_W_0_M_1) },
+ /* MOD_VEX_0F3849_X86_64_L_0_W_0 */
+ { PREFIX_TABLE (PREFIX_VEX_0F3849_X86_64_L_0_W_0_M_0) },
+ { PREFIX_TABLE (PREFIX_VEX_0F3849_X86_64_L_0_W_0_M_1) },
},
{
- /* MOD_VEX_0F3849_X86_64_P_2_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F3849_X86_64_P_3_W_0 */
- { Bad_Opcode },
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F384B_X86_64_P_1_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F384B_X86_64_P_2_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0) },
- },
- {
- /* MOD_VEX_0F384B_X86_64_P_3_W_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0) },
+ /* MOD_VEX_0F384B_X86_64_L_0_W_0 */
+ { PREFIX_TABLE (PREFIX_VEX_0F384B_X86_64_L_0_W_0_M_0) },
},
{
/* MOD_VEX_0F385A */
@@ -8834,8 +8773,12 @@ static const struct dis386 rm_table[][8]
{ "hreset", { Skip_MODRM, Ib }, 0 },
},
{
- /* RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0 */
- { VEX_LEN_TABLE (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0) },
+ /* RM_VEX_0F3849_X86_64_L_0_W_0_M_1_P_0_R_0 */
+ { "tilerelease", { Skip_MODRM }, 0 },
+ },
+ {
+ /* RM_VEX_0F3849_X86_64_L_0_W_0_M_1_P_3 */
+ { "tilezero", { TMM, Skip_MODRM }, 0 },
},
};
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-04-21 10:17 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2023-04-21 10:15 [PATCH 0/2] x86: rework AMX insn disassembly Jan Beulich
2023-04-21 10:16 ` [PATCH 1/2] x86: rework AMX multiplication " Jan Beulich
2023-04-21 10:16 ` [PATCH 2/2] x86: rework AMX control " Jan Beulich
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