[PATCH, ARM] "Neon-style" VFP syntax for assembler

[PATCH, ARM] "Neon-style" VFP syntax for assembler

[Julian Brown]

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Hi,

This patch implements the revised syntax for ARM VFP instructions based 
on the syntax used for Neon instructions.

Various things have been changed internally from the previous Neon 
support: classification of "instruction shapes" has been made a bit more 
powerful, which is particularly useful for disambiguating the extended 
set of vmov and vcvt instructions. Type checking has been extended to 
cover the slightly different semantics of VFP element types (where each 
element generally fills a register), and an F64 type has been introduced 
to the Neon machinery.

VFP data-processing instructions may be conditional in ARM mode whereas 
Neon versions are unconditional. This necessitates some extra checking, 
which I hope I've got right -- I've added some tests which cover the 
tricky cases, I think.

Tested with "make check" with cross to arm-none-eabi, with a couple of 
tests added. OK to apply to CSL branch? Mainline?

Cheers,

Julian

ChangeLog (gas):

     * config/tc-arm.c (stdarg.h): include.
     (arm_it): Add uncond_value field. Add isvec and issingle to operand
     array.
     (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
     REG_TYPE_NSDQ (single, double or quad vector reg).
     (reg_expected_msgs): Update.
     (BAD_FPU): Add macro for unsupported FPU instruction error.
     (parse_neon_type): Support 'd' as an alias for .f64.
     (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
     sets of registers.
     (parse_vfp_reg_list): Don't update first arg on error.
     (parse_neon_mov): Support extra syntax for VFP moves.
     (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
     OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
     (parse_operands): Support isvec, issingle operands fields, new parse
     codes above.
     (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
     msr variants.
     (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
     (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
     (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
     (NEON_SHAPE_DEF): New macro. Define table of possible instruction
     shapes.
     (neon_shape): Redefine in terms of above.
     (neon_shape_class): New enumeration, table of shape classes.
     (neon_shape_el): New enumeration. One element of a shape.
     (neon_shape_el_size): Register widths of above, where appropriate.
     (neon_shape_info): New struct. Info for shape table.
     (neon_shape_tab): New array.
     (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
     (neon_check_shape): Rewrite as...
     (neon_select_shape): New function to classify instruction shapes,
     driven by new table neon_shape_tab array.
     (neon_quad): New function. Return 1 if shape should set Q flag in
     instructions (or equivalent), 0 otherwise.
     (type_chk_of_el_type): Support F64.
     (el_type_of_type_chk): Likewise.
     (neon_check_type): Add support for VFP type checking (VFP data
     elements fill their containing registers).
     (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
     in thumb mode for VFP instructions.
     (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
     and encode the current instruction as if it were that opcode.
     (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
     arguments, call function in PFN.
     (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
     (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
     (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
     (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
     (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
     Redirect Neon-syntax VFP instructions to VFP instruction handlers.
     (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
     (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
     (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
     (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
     (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
     (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
     (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
     (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
     (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
     neon_quad.
     (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
     between VFP and Neon turns out to belong to Neon. Perform
     architecture check and fill in condition field if appropriate.
     (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
     (do_neon_cvt): Add support for VFP variants of instructions.
     (neon_cvt_flavour): Extend to cover VFP conversions.
     (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
     vmov variants.
     (do_neon_ldr_str): Handle single-precision VFP load/store.
     (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
     NS_NULL not NS_IGNORE.
     (opcode_tag): Add OT_csuffixF for operands which either take a
     conditional suffix, or have 0xF in the condition field.
     (md_assemble): Add support for OT_csuffixF.
     (NCE): Replace macro with...
     (NCE_tag, NCE, NCEF): New macros.
     (nCE): Replace macro with...
     (nCE_tag, nCE, nCEF): New macros.
     (insns): Add support for VFP insns or VFP versions of insns msr,
     mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
     vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
     vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
     VFP/Neon insns together.

ChangeLog (gas/testsuite):

     * gas/arm/itblock.s: New file. Helper macro for making all-true IT
     blocks.
     * gas/arm/neon-cond-bad-inc.s: New test. Make sure unconditional
     Neon instructions are rejected...
     * gas/arm/neon-cond-bad.s: In ARM mode, and...
     * gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode (with IT).
     * gas/arm/neon-cond-bad.l: Expected error output in ARM mode.
     * gas/arm/neon-cond-bad.d: Control ARM mode test.
     * gas/arm/neon-cond-bad_t2.d: Expected output in Thumb mode.
     * gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style syntax.
     * gas/arm/vfp-neon-syntax.s: ...in ARM mode.
     * gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
     * gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
     * gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb mode.

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Re: [PATCH, ARM] "Neon-style" VFP syntax for assembler

[Nick Clifton]

Hi Julian,

> Tested with "make check" with cross to arm-none-eabi, with a couple of 
> tests added. OK to apply to CSL branch? Mainline?

OK for mainline.


> ChangeLog (gas):
> 
>     * config/tc-arm.c (stdarg.h): include.
>     (arm_it): Add uncond_value field. Add isvec and issingle to operand
>     array.
>     (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
>     REG_TYPE_NSDQ (single, double or quad vector reg).
>     (reg_expected_msgs): Update.
>     (BAD_FPU): Add macro for unsupported FPU instruction error.
>     (parse_neon_type): Support 'd' as an alias for .f64.
>     (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
>     sets of registers.
>     (parse_vfp_reg_list): Don't update first arg on error.
>     (parse_neon_mov): Support extra syntax for VFP moves.
>     (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
>     OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
>     (parse_operands): Support isvec, issingle operands fields, new parse
>     codes above.
>     (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
>     msr variants.
>     (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
>     (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
>     (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
>     (NEON_SHAPE_DEF): New macro. Define table of possible instruction
>     shapes.
>     (neon_shape): Redefine in terms of above.
>     (neon_shape_class): New enumeration, table of shape classes.
>     (neon_shape_el): New enumeration. One element of a shape.
>     (neon_shape_el_size): Register widths of above, where appropriate.
>     (neon_shape_info): New struct. Info for shape table.
>     (neon_shape_tab): New array.
>     (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
>     (neon_check_shape): Rewrite as...
>     (neon_select_shape): New function to classify instruction shapes,
>     driven by new table neon_shape_tab array.
>     (neon_quad): New function. Return 1 if shape should set Q flag in
>     instructions (or equivalent), 0 otherwise.
>     (type_chk_of_el_type): Support F64.
>     (el_type_of_type_chk): Likewise.
>     (neon_check_type): Add support for VFP type checking (VFP data
>     elements fill their containing registers).
>     (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
>     in thumb mode for VFP instructions.
>     (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
>     and encode the current instruction as if it were that opcode.
>     (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
>     arguments, call function in PFN.
>     (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
>     (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
>     (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
>     (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
>     (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
>     Redirect Neon-syntax VFP instructions to VFP instruction handlers.
>     (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
>     (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
>     (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
>     (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
>     (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
>     (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
>     (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
>     (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
>     (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
>     neon_quad.
>     (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
>     between VFP and Neon turns out to belong to Neon. Perform
>     architecture check and fill in condition field if appropriate.
>     (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
>     (do_neon_cvt): Add support for VFP variants of instructions.
>     (neon_cvt_flavour): Extend to cover VFP conversions.
>     (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
>     vmov variants.
>     (do_neon_ldr_str): Handle single-precision VFP load/store.
>     (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
>     NS_NULL not NS_IGNORE.
>     (opcode_tag): Add OT_csuffixF for operands which either take a
>     conditional suffix, or have 0xF in the condition field.
>     (md_assemble): Add support for OT_csuffixF.
>     (NCE): Replace macro with...
>     (NCE_tag, NCE, NCEF): New macros.
>     (nCE): Replace macro with...
>     (nCE_tag, nCE, nCEF): New macros.
>     (insns): Add support for VFP insns or VFP versions of insns msr,
>     mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
>     vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
>     vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
>     VFP/Neon insns together.
> 
> ChangeLog (gas/testsuite):
> 
>     * gas/arm/itblock.s: New file. Helper macro for making all-true IT
>     blocks.
>     * gas/arm/neon-cond-bad-inc.s: New test. Make sure unconditional
>     Neon instructions are rejected...
>     * gas/arm/neon-cond-bad.s: In ARM mode, and...
>     * gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode (with IT).
>     * gas/arm/neon-cond-bad.l: Expected error output in ARM mode.
>     * gas/arm/neon-cond-bad.d: Control ARM mode test.
>     * gas/arm/neon-cond-bad_t2.d: Expected output in Thumb mode.
>     * gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style syntax.
>     * gas/arm/vfp-neon-syntax.s: ...in ARM mode.
>     * gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
>     * gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
>     * gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb mode.

Re: [PATCH, ARM] "Neon-style" VFP syntax for assembler

[Julian Brown]

Nick Clifton wrote:
> Hi Julian,
> 
>> Tested with "make check" with cross to arm-none-eabi, with a couple of 
>> tests added. OK to apply to CSL branch? Mainline?
> 
> 
> OK for mainline.

Thanks for review! The patch depends (for the testsuite only) on Paul 
Brook's patch here though:

   http://sourceware.org/ml/binutils/2006-04/msg00427.html

So it might be better to wait for that patch before committing it.

Cheers,

Julian

Re: [PATCH, ARM] "Neon-style" VFP syntax for assembler

[Nick Clifton]

Hi Julian,

> Thanks for review! The patch depends (for the testsuite only) on Paul 
> Brook's patch here though:
> 
>   http://sourceware.org/ml/binutils/2006-04/msg00427.html

Do you or Paul have a response to Daniel's comments about that patch ?

Cheers
   Nick

Re: [PATCH, ARM] "Neon-style" VFP syntax for assembler

[Paul Brook]

On Wednesday 10 May 2006 18:05, Nick Clifton wrote:
> Hi Julian,
>
> > Thanks for review! The patch depends (for the testsuite only) on Paul
> > Brook's patch here though:
> >
> >   http://sourceware.org/ml/binutils/2006-04/msg00427.html
>
> Do you or Paul have a response to Daniel's comments about that patch ?

It seems a reasonable point. I haven't had time to figure out how feasible it 
is to implement.

Paul

Re: [PATCH, ARM] "Neon-style" VFP syntax for assembler

[Nick Clifton]

Hi Paul,

>> Do you or Paul have a response to Daniel's comments about that patch ?
> 
> It seems a reasonable point. I haven't had time to figure out how feasible it 
> is to implement.

You could add a new ARM specific disassembler option which means "assume 
that the area being disassembled has changed its contents and reset any 
state flags".  The GDB could use this option when it hooks into the 
parse_insn() routine.

Cheers
   Nick

Re: [PATCH, ARM] "Neon-style" VFP syntax for assembler

[Julian Brown]

Nick Clifton wrote:
> Hi Julian,
> 
>> Tested with "make check" with cross to arm-none-eabi, with a couple of 
>> tests added. OK to apply to CSL branch? Mainline?
> 
> 
> OK for mainline.

I've just applied this to mainline, following Paul's conditional 
disassembly patch.

Cheers,

Julian