Re: [PATCH v1 0/6] LoongArch linker relaxation support.

[mengqinggang <mengqinggang@loongson.cn>]

We tried this method. We use R_LARCH_RELAX addend to distinguish two load
sequences. But there is a problem that has not been solved.
If there are two load sequences after a branch instruction like this:

   branch ------------
     | |
   pcalau12i pcalau12i
   ld.d ld.d

After scheduling, two pcalau12i may be reduced to one and put before
branch instruction like this:

pcalau12i
   branch -----------
     | |
    ld.d ld.d

For this case, if one branch make a relax, another branch will get a 
mistake.

But we will try to solve this question in relax v2 version.


在 2022/12/5 下午4:43, Xi Ruoyao 写道:
> On Mon, 2022-12-05 at 16:04 +0800, mengqinggang wrote:
>> Now, only the instrunctions expand from macro (la.local, la.got, etc.) at
>> assembly time can be relaxed, because gcc instruction scheduling causes relax
>> unable to handle some special cases. Gcc can add -mno-explicit-relocs option
>> to generate macro instrunction.
> Frankly, I don't like this.  Can the compiler explicitly emit some
> relocations to mark a instruction chain suitable for relaxation?  Some
> random thought:
>
> .reloc R_LARCH_RELOC_X 1
> pcalau12i $a0, %got_pc_hi20(sym_a)
> .reloc R_LARCH_RELOC_X 2
> pcalau12i $a1, %got_pc_hi20(sym_b)
> .reloc R_LARCH_RELOC_X 1
> ld.d $a0, $a0, %got_pc_lo12(sym_a)
> .reloc R_LARCH_RELOC_X 2
> ld.d $a1, $a1, %got_pc_lo12(sym_b)
> .reloc R_LARCH_RELOC_X 1
> ld.d $a0, $a0, 0
> .reloc R_LARCH_RELOC_X 2
> ld.d $a1, $a1, 0
>
> Here "R_LARCH_RELOC_X" is an imaginary relocation type.  We may be able
> to use the different values of the 32-bit addend to distinguish two load
> sequences interleaved after scheduling (I don't think there will be more
> than 2147483647 load sequences in an object file).
>
> This is just some random thoughts, I don't understand the linking
> process very well anyway.
>