From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH 04/11] x86: don't use operand size override with NOP in 16-bit code
Date: Wed, 27 Sep 2023 17:49:31 +0200 [thread overview]
Message-ID: <829df523-3632-abd6-daaa-d42eaa82fe37@suse.com> (raw)
In-Reply-To: <7ce54bc2-fef2-d2e4-21fd-202fdead0c20@suse.com>
Since we don't key the NOP selection to user-controlled properties, we
may not use i386 features; otherwise we would violate a possible .arch
directive restricting ISA to pre-386.
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1291,6 +1291,7 @@ static const unsigned char f64_7[] =
#define f64_8 (f64_9 + 1) /* lea 0L(%rsi,%riz),%rsi */
static const unsigned char f64_9[] =
{0x2e,0x48,0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* lea %cs:0L(%rsi,%riz),%rsi */
+#define f16_2 (f64_3 + 1) /* mov %si,%si */
static const unsigned char f16_3[] =
{0x8d,0x74,0x00}; /* lea 0(%si),%si */
static const unsigned char f16_4[] =
@@ -1311,7 +1312,7 @@ static const unsigned char *const f64_pa
};
/* 16-bit NOPs patterns. */
static const unsigned char *const f16_patt[] = {
- f32_1, f32_2, f16_3, f16_4
+ f32_1, f16_2, f16_3, f16_4
};
/* nopl (%[re]ax) */
static const unsigned char alt_3[] =
--- a/gas/testsuite/gas/i386/nop-2.d
+++ b/gas/testsuite/gas/i386/nop-2.d
@@ -26,7 +26,7 @@ Disassembly of section .text:
+[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
+[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
+[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
- +[a-f0-9]+: 66 90 xchg %eax,%eax
+ +[a-f0-9]+: 89 f6 mov %si,%si
0+26 <pseudo_30>:
+[a-f0-9]+: eb 1c jmp 44 <pseudo_129>
--- a/gas/testsuite/gas/i386/nops16-1.d
+++ b/gas/testsuite/gas/i386/nops16-1.d
@@ -55,7 +55,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
-[ ]*[a-f0-9]+: 66 90 xchg %eax,%eax
+[ ]*[a-f0-9]+: 89 f6 mov %si,%si
0+80 <nop27>:
[ ]*[a-f0-9]+: 90 nop
@@ -118,7 +118,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
-[ ]*[a-f0-9]+: 66 90 xchg %eax,%eax
+[ ]*[a-f0-9]+: 89 f6 mov %si,%si
0+100 <nop23>:
[ ]*[a-f0-9]+: 90 nop
@@ -193,7 +193,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
-[ ]*[a-f0-9]+: 66 90 xchg %eax,%eax
+[ ]*[a-f0-9]+: 89 f6 mov %si,%si
0+180 <nop19>:
[ ]*[a-f0-9]+: 90 nop
@@ -280,7 +280,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
-[ ]*[a-f0-9]+: 66 90 xchg %eax,%eax
+[ ]*[a-f0-9]+: 89 f6 mov %si,%si
0+200 <nop15>:
[ ]*[a-f0-9]+: 90 nop
@@ -315,7 +315,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: eb 0a jmp 240 <nop11>
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
-[ ]*[a-f0-9]+: 66 90 xchg %eax,%eax
+[ ]*[a-f0-9]+: 89 f6 mov %si,%si
0+240 <nop11>:
[ ]*[a-f0-9]+: 90 nop
@@ -336,7 +336,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
-[ ]*[a-f0-9]+: 66 90 xchg %eax,%eax
+[ ]*[a-f0-9]+: 89 f6 mov %si,%si
0+260 <nop9>:
[ ]*[a-f0-9]+: 90 nop
@@ -387,7 +387,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
-[ ]*[a-f0-9]+: 66 90 xchg %eax,%eax
+[ ]*[a-f0-9]+: 89 f6 mov %si,%si
0+2a0 <nop5>:
[ ]*[a-f0-9]+: 90 nop
@@ -450,5 +450,5 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
-[ ]*[a-f0-9]+: 66 90 xchg %eax,%eax
+[ ]*[a-f0-9]+: 89 f6 mov %si,%si
#pass
--- a/gas/testsuite/gas/i386/x86-64-nop-2.d
+++ b/gas/testsuite/gas/i386/x86-64-nop-2.d
@@ -27,7 +27,7 @@ Disassembly of section .text:
+[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
+[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
+[a-f0-9]+: 8d b4 00 00 lea 0x0\(%si\),%si
- +[a-f0-9]+: 66 90 xchg %eax,%eax
+ +[a-f0-9]+: 89 f6 mov %si,%si
0+26 <pseudo_30>:
+[a-f0-9]+: eb 1c jmp 44 <pseudo_129>
next prev parent reply other threads:[~2023-09-27 15:49 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-27 15:46 [PATCH 00/11] x86: NOP emission adjustments Jan Beulich
2023-09-27 15:47 ` [PATCH 01/11] x86: record flag_code in tc_frag_data Jan Beulich
2023-09-27 15:48 ` [PATCH 02/11] x86: i386_generate_nops() may not derive decisions from global variables Jan Beulich
2023-09-27 15:48 ` [PATCH 03/11] x86: don't use 32-bit LEA as NOP surrogate in 64-bit code Jan Beulich
2023-09-27 15:49 ` Jan Beulich [this message]
2023-09-27 15:50 ` [PATCH 05/11] x86: respect ".arch nonop" when selecting which NOPs to emit Jan Beulich
2023-09-27 15:50 ` [PATCH 06/11] x86: i686 != PentiumPro Jan Beulich
2023-09-27 15:51 ` [PATCH 07/11] x86: don't record full i386_cpu_flags in struct i386_tc_frag_data Jan Beulich
2023-09-27 15:51 ` [PATCH 08/11] x86: add a few more NOP patterns Jan Beulich
2023-09-27 15:52 ` [PATCH 09/11] x86: fold a few of the "alternative" " Jan Beulich
2023-09-27 15:52 ` [PATCH 10/11] x86: fold NOP testcase expectations where possible Jan Beulich
2023-09-27 15:53 ` [PATCH 11/11] gas: make .nops output visible in listing Jan Beulich
2023-09-27 15:59 ` [PATCH 00/11] x86: NOP emission adjustments Jan Beulich
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