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* [PATCH 0/4] gas: further line number related adjustments
@ 2022-04-04 15:56 Jan Beulich
  2022-04-04 15:58 ` [PATCH 1/4] gas: further adjust file/line handling for .irp and alike Jan Beulich
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Jan Beulich @ 2022-04-04 15:56 UTC (permalink / raw)
  To: Binutils

The primary goal of this small series is to address fallout from
7992631e8c0b ("gas/Dwarf: improve debug info generation from .irp
and alike blocks"). In the course of dealing with this I noticed
some opportunity for cleanup, which the latter two patches carry
out.

1: further adjust file/line handling for .irp and alike
2: further adjust file/line handling for .macro
3: drop .appfile and .appline
4: new_logical_line{,_flags}() can return "void"

Jan


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/4] gas: further adjust file/line handling for .irp and alike
  2022-04-04 15:56 [PATCH 0/4] gas: further line number related adjustments Jan Beulich
@ 2022-04-04 15:58 ` Jan Beulich
  2022-04-04 15:59 ` [PATCH 2/4] gas: further adjust file/line handling for .macro Jan Beulich
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Jan Beulich @ 2022-04-04 15:58 UTC (permalink / raw)
  To: Binutils
  Cc: Nick Clifton, richard.earnshaw, Marcus Shawcroft,
	ramana.radhakrishnan, Hans-Peter Nilsson

Commit 7992631e8c0b ("gas/Dwarf: improve debug info generation from .irp
and alike blocks"), while dealing okay with actual assembly source files
not using .file/.line and alike outside but not inside of .irp et al,
has undue effects when the logical file/line pair was already
overridden: Line numbers would continuously increment upon every
iteration, thus potentially getting far off. Furthermore it left it to
the user to actually insert .file/.line inside such constructs. Note
though that before aforementioned change things weren't pretty either:
Diagnostics (and debug info) would be associated with the directive
terminating the iteration construct, rather than with the actual lines.

Handle this automatically by simply latching the present line and then
re-instating coordinates first thing on every iteration; note that the
file can't change from what was previously pushed on the scrubber's
state stack, and hence can be taken from there by using a new flavor of
.linefile (which is far better memory-footprint-wise than recording the
full path in the inserted directive). (This then leaves undisturbed any
file/line control occurring in the body of the construct, as these will
only be seen and processed afterwards.)
---
This likely needs committing together with "gas: further adjust
file/line handling for .macro" to avoid temporarily regressing a fair
number of further Arm (32- and 64-bit) testcases. I will admit that I
did large scope tests only with the entire series applied, not for
individual patches.

In an earlier form (with the full file name actually put in the
directive invocations) the i386/rept testcase failed with "string buffer
overflow" on 32-bit hosts. That testcase is fragile anyway, as it could
also simply fail for running out of memory (as I did observe with the
repeat count adjusted not quite enough yet). And it now takes a yet more
significant part of the overall running of the testsuite. I'm therefore
inclined to suggest to delete that test case.

.macro is similarly affected, but needs dealing with differently to
retain the PR gas/16908 workaround. That'll be the subject of a
subsequent patch. The respective parts of the new testcase's expectation
are therefore more relaxed than they should be; they will be tightened
once that other aspect was also taken care of.

--- a/gas/input-scrub.c
+++ b/gas/input-scrub.c
@@ -440,7 +440,8 @@ bump_line_counters (void)
    number.  If it is -2, we decrement the logical line number (this is
    to support the .appfile pseudo-op inserted into the stream by
    do_scrub_chars).
-   If the fname is NULL, we don't change the current logical file name.
+   If fname is NULL, we don't change the current logical file name, unless
+   bit 3 of flags is set.
    Returns nonzero if the filename actually changes.  */
 
 int
@@ -460,6 +461,14 @@ new_logical_line_flags (const char *fnam
     case 1 << 2:
       /* FIXME: we could check that include nesting is correct.  */
       break;
+    case 1 << 3:
+      if (line_number < 0 || fname != NULL || next_saved_file == NULL)
+	abort ();
+      if (next_saved_file->logical_input_file)
+	fname = next_saved_file->logical_input_file;
+      else
+	fname = next_saved_file->physical_input_file;
+      break;
     default:
       abort ();
     }
--- a/gas/macro.c
+++ b/gas/macro.c
@@ -126,6 +126,21 @@ buffer_and_nest (const char *from, const
   else
     from_len = strlen (from);
 
+  /* Except for macros record the present source position, such that
+     diagnostics and debug info will be properly associated with the
+     respective original lines, rather than with the line of the ending
+     directive (TO).  */
+  if (from == NULL || strcasecmp (from, "MACRO") != 0)
+    {
+      unsigned int line;
+      char *linefile;
+
+      as_where (&line);
+      linefile = xasprintf ("\t.linefile %u .\n", line);
+      sb_add_buffer (ptr, linefile, strlen (linefile));
+      xfree (linefile);
+    }
+
   while (more)
     {
       /* Try to find the first pseudo op on the line.  */
--- a/gas/read.c
+++ b/gas/read.c
@@ -2067,7 +2067,7 @@ void
 s_app_line (int appline)
 {
   char *file = NULL;
-  int linenum;
+  int linenum, flags = 0;
 
   /* The given number is that of the next line.  */
   if (appline)
@@ -2092,7 +2092,6 @@ s_app_line (int appline)
 	     linenum);
   else
     {
-      int flags = 0;
       int length = 0;
 
       if (!appline)
@@ -2101,6 +2100,12 @@ s_app_line (int appline)
 
 	  if (*input_line_pointer == '"')
 	    file = demand_copy_string (&length);
+	  else if (*input_line_pointer == '.')
+	    {
+	      /* buffer_and_nest() may insert this form.  */
+	      ++input_line_pointer;
+	      flags = 1 << 3;
+	    }
 
 	  if (file)
 	    {
@@ -2147,7 +2152,7 @@ s_app_line (int appline)
 	    }
 	}
 
-      if (appline || file)
+      if (appline || file || flags)
 	{
 	  linenum--;
 	  new_logical_line_flags (file, linenum, flags);
@@ -2157,7 +2162,7 @@ s_app_line (int appline)
 #endif
 	}
     }
-  if (appline || file)
+  if (appline || file || flags)
     demand_empty_rest_of_line ();
   else
     ignore_rest_of_line ();
--- a/gas/testsuite/gas/aarch64/illegal.l
+++ b/gas/testsuite/gas/aarch64/illegal.l
@@ -167,118 +167,118 @@
 [^:]*:235: Error: .*`msr SPSel,#2'
 [^:]*:237: Error: .*`tbl v0.16b,{v1.16b,v3.16b,v5.16b},v2.16b'
 [^:]*:238: Error: .*`tbx v0.8b,{v1.16b,v3.16b,v5.16b,v7.16b},v2.8b'
-[^:]*:264: Error: .*`ld2 {v0.8b,v2.8b},\[x0\],#16'
-[^:]*:264: Error: .*`ld2 {v0.8b,v1.8b,v2.8b,v3.8b},\[x0\],#32'
-[^:]*:264: Error: .*`ld2 {v0.8b,v2.8b},\[x0\],x7'
-[^:]*:264: Error: .*`ld2 {v0.8b,v1.8b,v2.8b,v3.8b},\[x0\],x7'
-[^:]*:264: Error: .*`ld2 {v0.4h,v2.4h},\[x0\],#16'
-[^:]*:264: Error: .*`ld2 {v0.4h,v1.4h,v2.4h,v3.4h},\[x0\],#32'
-[^:]*:264: Error: .*`ld2 {v0.4h,v2.4h},\[x0\],x7'
-[^:]*:264: Error: .*`ld2 {v0.4h,v1.4h,v2.4h,v3.4h},\[x0\],x7'
-[^:]*:264: Error: .*`ld2 {v0.2s,v2.2s},\[x0\],#16'
-[^:]*:264: Error: .*`ld2 {v0.2s,v1.2s,v2.2s,v3.2s},\[x0\],#32'
-[^:]*:264: Error: .*`ld2 {v0.2s,v2.2s},\[x0\],x7'
-[^:]*:264: Error: .*`ld2 {v0.2s,v1.2s,v2.2s,v3.2s},\[x0\],x7'
-[^:]*:264: Error: .*`st2 {v0.8b,v2.8b},\[x0\],#16'
-[^:]*:264: Error: .*`st2 {v0.8b,v1.8b,v2.8b,v3.8b},\[x0\],#32'
-[^:]*:264: Error: .*`st2 {v0.8b,v2.8b},\[x0\],x7'
-[^:]*:264: Error: .*`st2 {v0.8b,v1.8b,v2.8b,v3.8b},\[x0\],x7'
-[^:]*:264: Error: .*`st2 {v0.4h,v2.4h},\[x0\],#16'
-[^:]*:264: Error: .*`st2 {v0.4h,v1.4h,v2.4h,v3.4h},\[x0\],#32'
-[^:]*:264: Error: .*`st2 {v0.4h,v2.4h},\[x0\],x7'
-[^:]*:264: Error: .*`st2 {v0.4h,v1.4h,v2.4h,v3.4h},\[x0\],x7'
-[^:]*:264: Error: .*`st2 {v0.2s,v2.2s},\[x0\],#16'
-[^:]*:264: Error: .*`st2 {v0.2s,v1.2s,v2.2s,v3.2s},\[x0\],#32'
-[^:]*:264: Error: .*`st2 {v0.2s,v2.2s},\[x0\],x7'
-[^:]*:264: Error: .*`st2 {v0.2s,v1.2s,v2.2s,v3.2s},\[x0\],x7'
-[^:]*:270: Error: .*`ld2 {v0.16b,v2.16b},\[x0\],#32'
-[^:]*:270: Error: .*`ld2 {v0.16b,v1.16b,v2.16b,v3.16b},\[x0\],#64'
-[^:]*:270: Error: .*`ld2 {v0.16b,v2.16b},\[x0\],x7'
-[^:]*:270: Error: .*`ld2 {v0.16b,v1.16b,v2.16b,v3.16b},\[x0\],x7'
-[^:]*:270: Error: .*`ld2 {v0.8h,v2.8h},\[x0\],#32'
-[^:]*:270: Error: .*`ld2 {v0.8h,v1.8h,v2.8h,v3.8h},\[x0\],#64'
-[^:]*:270: Error: .*`ld2 {v0.8h,v2.8h},\[x0\],x7'
-[^:]*:270: Error: .*`ld2 {v0.8h,v1.8h,v2.8h,v3.8h},\[x0\],x7'
-[^:]*:270: Error: .*`ld2 {v0.4s,v2.4s},\[x0\],#32'
-[^:]*:270: Error: .*`ld2 {v0.4s,v1.4s,v2.4s,v3.4s},\[x0\],#64'
-[^:]*:270: Error: .*`ld2 {v0.4s,v2.4s},\[x0\],x7'
-[^:]*:270: Error: .*`ld2 {v0.4s,v1.4s,v2.4s,v3.4s},\[x0\],x7'
-[^:]*:270: Error: .*`ld2 {v0.2d,v2.2d},\[x0\],#32'
-[^:]*:270: Error: .*`ld2 {v0.2d,v1.2d,v2.2d,v3.2d},\[x0\],#64'
-[^:]*:270: Error: .*`ld2 {v0.2d,v2.2d},\[x0\],x7'
-[^:]*:270: Error: .*`ld2 {v0.2d,v1.2d,v2.2d,v3.2d},\[x0\],x7'
-[^:]*:270: Error: .*`st2 {v0.16b,v2.16b},\[x0\],#32'
-[^:]*:270: Error: .*`st2 {v0.16b,v1.16b,v2.16b,v3.16b},\[x0\],#64'
-[^:]*:270: Error: .*`st2 {v0.16b,v2.16b},\[x0\],x7'
-[^:]*:270: Error: .*`st2 {v0.16b,v1.16b,v2.16b,v3.16b},\[x0\],x7'
-[^:]*:270: Error: .*`st2 {v0.8h,v2.8h},\[x0\],#32'
-[^:]*:270: Error: .*`st2 {v0.8h,v1.8h,v2.8h,v3.8h},\[x0\],#64'
-[^:]*:270: Error: .*`st2 {v0.8h,v2.8h},\[x0\],x7'
-[^:]*:270: Error: .*`st2 {v0.8h,v1.8h,v2.8h,v3.8h},\[x0\],x7'
-[^:]*:270: Error: .*`st2 {v0.4s,v2.4s},\[x0\],#32'
-[^:]*:270: Error: .*`st2 {v0.4s,v1.4s,v2.4s,v3.4s},\[x0\],#64'
-[^:]*:270: Error: .*`st2 {v0.4s,v2.4s},\[x0\],x7'
-[^:]*:270: Error: .*`st2 {v0.4s,v1.4s,v2.4s,v3.4s},\[x0\],x7'
-[^:]*:270: Error: .*`st2 {v0.2d,v2.2d},\[x0\],#32'
-[^:]*:270: Error: .*`st2 {v0.2d,v1.2d,v2.2d,v3.2d},\[x0\],#64'
-[^:]*:270: Error: .*`st2 {v0.2d,v2.2d},\[x0\],x7'
-[^:]*:270: Error: .*`st2 {v0.2d,v1.2d,v2.2d,v3.2d},\[x0\],x7'
-[^:]*:290: Error: .*`ld3 {v0.8b,v2.8b,v4.8b},\[x0\],#24'
-[^:]*:290: Error: .*`ld4 {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],#32'
-[^:]*:290: Error: .*`ld3 {v0.8b,v2.8b,v4.8b},\[x0\],x7'
-[^:]*:290: Error: .*`ld4 {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],x7'
-[^:]*:290: Error: .*`ld3 {v0.4h,v2.4h,v4.4h},\[x0\],#24'
-[^:]*:290: Error: .*`ld4 {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],#32'
-[^:]*:290: Error: .*`ld3 {v0.4h,v2.4h,v4.4h},\[x0\],x7'
-[^:]*:290: Error: .*`ld4 {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],x7'
-[^:]*:290: Error: .*`ld3 {v0.2s,v2.2s,v4.2s},\[x0\],#24'
-[^:]*:290: Error: .*`ld4 {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],#32'
-[^:]*:290: Error: .*`ld3 {v0.2s,v2.2s,v4.2s},\[x0\],x7'
-[^:]*:290: Error: .*`ld4 {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],x7'
-[^:]*:290: Error: .*`st3 {v0.8b,v2.8b,v4.8b},\[x0\],#24'
-[^:]*:290: Error: .*`st4 {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],#32'
-[^:]*:290: Error: .*`st3 {v0.8b,v2.8b,v4.8b},\[x0\],x7'
-[^:]*:290: Error: .*`st4 {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],x7'
-[^:]*:290: Error: .*`st3 {v0.4h,v2.4h,v4.4h},\[x0\],#24'
-[^:]*:290: Error: .*`st4 {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],#32'
-[^:]*:290: Error: .*`st3 {v0.4h,v2.4h,v4.4h},\[x0\],x7'
-[^:]*:290: Error: .*`st4 {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],x7'
-[^:]*:290: Error: .*`st3 {v0.2s,v2.2s,v4.2s},\[x0\],#24'
-[^:]*:290: Error: .*`st4 {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],#32'
-[^:]*:290: Error: .*`st3 {v0.2s,v2.2s,v4.2s},\[x0\],x7'
-[^:]*:290: Error: .*`st4 {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],x7'
-[^:]*:296: Error: .*`ld3 {v0.16b,v2.16b,v4.16b},\[x0\],#48'
-[^:]*:296: Error: .*`ld4 {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],#64'
-[^:]*:296: Error: .*`ld3 {v0.16b,v2.16b,v4.16b},\[x0\],x7'
-[^:]*:296: Error: .*`ld4 {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],x7'
-[^:]*:296: Error: .*`ld3 {v0.8h,v2.8h,v4.8h},\[x0\],#48'
-[^:]*:296: Error: .*`ld4 {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],#64'
-[^:]*:296: Error: .*`ld3 {v0.8h,v2.8h,v4.8h},\[x0\],x7'
-[^:]*:296: Error: .*`ld4 {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],x7'
-[^:]*:296: Error: .*`ld3 {v0.4s,v2.4s,v4.4s},\[x0\],#48'
-[^:]*:296: Error: .*`ld4 {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],#64'
-[^:]*:296: Error: .*`ld3 {v0.4s,v2.4s,v4.4s},\[x0\],x7'
-[^:]*:296: Error: .*`ld4 {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],x7'
-[^:]*:296: Error: .*`ld3 {v0.2d,v2.2d,v4.2d},\[x0\],#48'
-[^:]*:296: Error: .*`ld4 {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],#64'
-[^:]*:296: Error: .*`ld3 {v0.2d,v2.2d,v4.2d},\[x0\],x7'
-[^:]*:296: Error: .*`ld4 {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],x7'
-[^:]*:296: Error: .*`st3 {v0.16b,v2.16b,v4.16b},\[x0\],#48'
-[^:]*:296: Error: .*`st4 {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],#64'
-[^:]*:296: Error: .*`st3 {v0.16b,v2.16b,v4.16b},\[x0\],x7'
-[^:]*:296: Error: .*`st4 {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],x7'
-[^:]*:296: Error: .*`st3 {v0.8h,v2.8h,v4.8h},\[x0\],#48'
-[^:]*:296: Error: .*`st4 {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],#64'
-[^:]*:296: Error: .*`st3 {v0.8h,v2.8h,v4.8h},\[x0\],x7'
-[^:]*:296: Error: .*`st4 {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],x7'
-[^:]*:296: Error: .*`st3 {v0.4s,v2.4s,v4.4s},\[x0\],#48'
-[^:]*:296: Error: .*`st4 {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],#64'
-[^:]*:296: Error: .*`st3 {v0.4s,v2.4s,v4.4s},\[x0\],x7'
-[^:]*:296: Error: .*`st4 {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],x7'
-[^:]*:296: Error: .*`st3 {v0.2d,v2.2d,v4.2d},\[x0\],#48'
-[^:]*:296: Error: .*`st4 {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],#64'
-[^:]*:296: Error: .*`st3 {v0.2d,v2.2d,v4.2d},\[x0\],x7'
-[^:]*:296: Error: .*`st4 {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],x7'
+[^:]*:262: Error: .*`ld2 {v0.8b,v2.8b},\[x0\],#16'
+[^:]*:262: Error: .*`ld2 {v0.8b,v1.8b,v2.8b,v3.8b},\[x0\],#32'
+[^:]*:262: Error: .*`ld2 {v0.8b,v2.8b},\[x0\],x7'
+[^:]*:262: Error: .*`ld2 {v0.8b,v1.8b,v2.8b,v3.8b},\[x0\],x7'
+[^:]*:262: Error: .*`ld2 {v0.4h,v2.4h},\[x0\],#16'
+[^:]*:262: Error: .*`ld2 {v0.4h,v1.4h,v2.4h,v3.4h},\[x0\],#32'
+[^:]*:262: Error: .*`ld2 {v0.4h,v2.4h},\[x0\],x7'
+[^:]*:262: Error: .*`ld2 {v0.4h,v1.4h,v2.4h,v3.4h},\[x0\],x7'
+[^:]*:262: Error: .*`ld2 {v0.2s,v2.2s},\[x0\],#16'
+[^:]*:262: Error: .*`ld2 {v0.2s,v1.2s,v2.2s,v3.2s},\[x0\],#32'
+[^:]*:262: Error: .*`ld2 {v0.2s,v2.2s},\[x0\],x7'
+[^:]*:262: Error: .*`ld2 {v0.2s,v1.2s,v2.2s,v3.2s},\[x0\],x7'
+[^:]*:262: Error: .*`st2 {v0.8b,v2.8b},\[x0\],#16'
+[^:]*:262: Error: .*`st2 {v0.8b,v1.8b,v2.8b,v3.8b},\[x0\],#32'
+[^:]*:262: Error: .*`st2 {v0.8b,v2.8b},\[x0\],x7'
+[^:]*:262: Error: .*`st2 {v0.8b,v1.8b,v2.8b,v3.8b},\[x0\],x7'
+[^:]*:262: Error: .*`st2 {v0.4h,v2.4h},\[x0\],#16'
+[^:]*:262: Error: .*`st2 {v0.4h,v1.4h,v2.4h,v3.4h},\[x0\],#32'
+[^:]*:262: Error: .*`st2 {v0.4h,v2.4h},\[x0\],x7'
+[^:]*:262: Error: .*`st2 {v0.4h,v1.4h,v2.4h,v3.4h},\[x0\],x7'
+[^:]*:262: Error: .*`st2 {v0.2s,v2.2s},\[x0\],#16'
+[^:]*:262: Error: .*`st2 {v0.2s,v1.2s,v2.2s,v3.2s},\[x0\],#32'
+[^:]*:262: Error: .*`st2 {v0.2s,v2.2s},\[x0\],x7'
+[^:]*:262: Error: .*`st2 {v0.2s,v1.2s,v2.2s,v3.2s},\[x0\],x7'
+[^:]*:268: Error: .*`ld2 {v0.16b,v2.16b},\[x0\],#32'
+[^:]*:268: Error: .*`ld2 {v0.16b,v1.16b,v2.16b,v3.16b},\[x0\],#64'
+[^:]*:268: Error: .*`ld2 {v0.16b,v2.16b},\[x0\],x7'
+[^:]*:268: Error: .*`ld2 {v0.16b,v1.16b,v2.16b,v3.16b},\[x0\],x7'
+[^:]*:268: Error: .*`ld2 {v0.8h,v2.8h},\[x0\],#32'
+[^:]*:268: Error: .*`ld2 {v0.8h,v1.8h,v2.8h,v3.8h},\[x0\],#64'
+[^:]*:268: Error: .*`ld2 {v0.8h,v2.8h},\[x0\],x7'
+[^:]*:268: Error: .*`ld2 {v0.8h,v1.8h,v2.8h,v3.8h},\[x0\],x7'
+[^:]*:268: Error: .*`ld2 {v0.4s,v2.4s},\[x0\],#32'
+[^:]*:268: Error: .*`ld2 {v0.4s,v1.4s,v2.4s,v3.4s},\[x0\],#64'
+[^:]*:268: Error: .*`ld2 {v0.4s,v2.4s},\[x0\],x7'
+[^:]*:268: Error: .*`ld2 {v0.4s,v1.4s,v2.4s,v3.4s},\[x0\],x7'
+[^:]*:268: Error: .*`ld2 {v0.2d,v2.2d},\[x0\],#32'
+[^:]*:268: Error: .*`ld2 {v0.2d,v1.2d,v2.2d,v3.2d},\[x0\],#64'
+[^:]*:268: Error: .*`ld2 {v0.2d,v2.2d},\[x0\],x7'
+[^:]*:268: Error: .*`ld2 {v0.2d,v1.2d,v2.2d,v3.2d},\[x0\],x7'
+[^:]*:268: Error: .*`st2 {v0.16b,v2.16b},\[x0\],#32'
+[^:]*:268: Error: .*`st2 {v0.16b,v1.16b,v2.16b,v3.16b},\[x0\],#64'
+[^:]*:268: Error: .*`st2 {v0.16b,v2.16b},\[x0\],x7'
+[^:]*:268: Error: .*`st2 {v0.16b,v1.16b,v2.16b,v3.16b},\[x0\],x7'
+[^:]*:268: Error: .*`st2 {v0.8h,v2.8h},\[x0\],#32'
+[^:]*:268: Error: .*`st2 {v0.8h,v1.8h,v2.8h,v3.8h},\[x0\],#64'
+[^:]*:268: Error: .*`st2 {v0.8h,v2.8h},\[x0\],x7'
+[^:]*:268: Error: .*`st2 {v0.8h,v1.8h,v2.8h,v3.8h},\[x0\],x7'
+[^:]*:268: Error: .*`st2 {v0.4s,v2.4s},\[x0\],#32'
+[^:]*:268: Error: .*`st2 {v0.4s,v1.4s,v2.4s,v3.4s},\[x0\],#64'
+[^:]*:268: Error: .*`st2 {v0.4s,v2.4s},\[x0\],x7'
+[^:]*:268: Error: .*`st2 {v0.4s,v1.4s,v2.4s,v3.4s},\[x0\],x7'
+[^:]*:268: Error: .*`st2 {v0.2d,v2.2d},\[x0\],#32'
+[^:]*:268: Error: .*`st2 {v0.2d,v1.2d,v2.2d,v3.2d},\[x0\],#64'
+[^:]*:268: Error: .*`st2 {v0.2d,v2.2d},\[x0\],x7'
+[^:]*:268: Error: .*`st2 {v0.2d,v1.2d,v2.2d,v3.2d},\[x0\],x7'
+[^:]*:288: Error: .*`ld3 {v0.8b,v2.8b,v4.8b},\[x0\],#24'
+[^:]*:288: Error: .*`ld4 {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],#32'
+[^:]*:288: Error: .*`ld3 {v0.8b,v2.8b,v4.8b},\[x0\],x7'
+[^:]*:288: Error: .*`ld4 {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],x7'
+[^:]*:288: Error: .*`ld3 {v0.4h,v2.4h,v4.4h},\[x0\],#24'
+[^:]*:288: Error: .*`ld4 {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],#32'
+[^:]*:288: Error: .*`ld3 {v0.4h,v2.4h,v4.4h},\[x0\],x7'
+[^:]*:288: Error: .*`ld4 {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],x7'
+[^:]*:288: Error: .*`ld3 {v0.2s,v2.2s,v4.2s},\[x0\],#24'
+[^:]*:288: Error: .*`ld4 {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],#32'
+[^:]*:288: Error: .*`ld3 {v0.2s,v2.2s,v4.2s},\[x0\],x7'
+[^:]*:288: Error: .*`ld4 {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],x7'
+[^:]*:288: Error: .*`st3 {v0.8b,v2.8b,v4.8b},\[x0\],#24'
+[^:]*:288: Error: .*`st4 {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],#32'
+[^:]*:288: Error: .*`st3 {v0.8b,v2.8b,v4.8b},\[x0\],x7'
+[^:]*:288: Error: .*`st4 {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],x7'
+[^:]*:288: Error: .*`st3 {v0.4h,v2.4h,v4.4h},\[x0\],#24'
+[^:]*:288: Error: .*`st4 {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],#32'
+[^:]*:288: Error: .*`st3 {v0.4h,v2.4h,v4.4h},\[x0\],x7'
+[^:]*:288: Error: .*`st4 {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],x7'
+[^:]*:288: Error: .*`st3 {v0.2s,v2.2s,v4.2s},\[x0\],#24'
+[^:]*:288: Error: .*`st4 {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],#32'
+[^:]*:288: Error: .*`st3 {v0.2s,v2.2s,v4.2s},\[x0\],x7'
+[^:]*:288: Error: .*`st4 {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],x7'
+[^:]*:294: Error: .*`ld3 {v0.16b,v2.16b,v4.16b},\[x0\],#48'
+[^:]*:294: Error: .*`ld4 {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],#64'
+[^:]*:294: Error: .*`ld3 {v0.16b,v2.16b,v4.16b},\[x0\],x7'
+[^:]*:294: Error: .*`ld4 {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],x7'
+[^:]*:294: Error: .*`ld3 {v0.8h,v2.8h,v4.8h},\[x0\],#48'
+[^:]*:294: Error: .*`ld4 {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],#64'
+[^:]*:294: Error: .*`ld3 {v0.8h,v2.8h,v4.8h},\[x0\],x7'
+[^:]*:294: Error: .*`ld4 {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],x7'
+[^:]*:294: Error: .*`ld3 {v0.4s,v2.4s,v4.4s},\[x0\],#48'
+[^:]*:294: Error: .*`ld4 {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],#64'
+[^:]*:294: Error: .*`ld3 {v0.4s,v2.4s,v4.4s},\[x0\],x7'
+[^:]*:294: Error: .*`ld4 {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],x7'
+[^:]*:294: Error: .*`ld3 {v0.2d,v2.2d,v4.2d},\[x0\],#48'
+[^:]*:294: Error: .*`ld4 {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],#64'
+[^:]*:294: Error: .*`ld3 {v0.2d,v2.2d,v4.2d},\[x0\],x7'
+[^:]*:294: Error: .*`ld4 {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],x7'
+[^:]*:294: Error: .*`st3 {v0.16b,v2.16b,v4.16b},\[x0\],#48'
+[^:]*:294: Error: .*`st4 {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],#64'
+[^:]*:294: Error: .*`st3 {v0.16b,v2.16b,v4.16b},\[x0\],x7'
+[^:]*:294: Error: .*`st4 {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],x7'
+[^:]*:294: Error: .*`st3 {v0.8h,v2.8h,v4.8h},\[x0\],#48'
+[^:]*:294: Error: .*`st4 {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],#64'
+[^:]*:294: Error: .*`st3 {v0.8h,v2.8h,v4.8h},\[x0\],x7'
+[^:]*:294: Error: .*`st4 {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],x7'
+[^:]*:294: Error: .*`st3 {v0.4s,v2.4s,v4.4s},\[x0\],#48'
+[^:]*:294: Error: .*`st4 {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],#64'
+[^:]*:294: Error: .*`st3 {v0.4s,v2.4s,v4.4s},\[x0\],x7'
+[^:]*:294: Error: .*`st4 {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],x7'
+[^:]*:294: Error: .*`st3 {v0.2d,v2.2d,v4.2d},\[x0\],#48'
+[^:]*:294: Error: .*`st4 {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],#64'
+[^:]*:294: Error: .*`st3 {v0.2d,v2.2d,v4.2d},\[x0\],x7'
+[^:]*:294: Error: .*`st4 {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],x7'
 [^:]*:300: Error: .*`ld1r {v0.8b,v1.8b},\[x0\],#1'
 [^:]*:301: Error: .*`ld1r {v0.16b,v1.16b},\[x0\],#1'
 [^:]*:302: Error: .*`ld1r {v0.4h,v1.4h},\[x0\],#2'
@@ -287,98 +287,98 @@
 [^:]*:305: Error: .*`ld1r {v0.4s,v1.4s},\[x0\],#4'
 [^:]*:306: Error: .*`ld1r {v0.1d,v1.1d},\[x0\],#8'
 [^:]*:307: Error: .*`ld1r {v0.2d,v1.2d},\[x0\],#8'
-[^:]*:322: Error: .*`ld2 {v0.h,v2.h}\[1\],\[x0\],#4'
-[^:]*:322: Error: .*`ld3 {v0.h,v2.h,v4.h}\[1\],\[x0\],#6'
-[^:]*:322: Error: .*`ld4 {v0.h,v2.h,v4.h,v6.h}\[1\],\[x0\],#8'
-[^:]*:322: Error: .*`ld2r {v0.4h,v2.4h},\[x0\],#4'
-[^:]*:322: Error: .*`ld3r {v0.4h,v2.4h,v4.4h},\[x0\],#6'
-[^:]*:322: Error: .*`ld4r {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],#8'
-[^:]*:322: Error: .*`ld2r {v0.8h,v2.8h},\[x0\],#4'
-[^:]*:322: Error: .*`ld3r {v0.8h,v2.8h,v4.8h},\[x0\],#6'
-[^:]*:322: Error: .*`ld4r {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],#8'
-[^:]*:322: Error: .*`st2 {v0.h,v2.h}\[1\],\[x0\],#4'
-[^:]*:322: Error: .*`st3 {v0.h,v2.h,v4.h}\[1\],\[x0\],#6'
-[^:]*:322: Error: .*`st4 {v0.h,v2.h,v4.h,v6.h}\[1\],\[x0\],#8'
-[^:]*:337: Error: .*`ld2 {v0.s,v2.s}\[1\],\[x0\],#8'
-[^:]*:337: Error: .*`ld3 {v0.s,v2.s,v4.s}\[1\],\[x0\],#12'
-[^:]*:337: Error: .*`ld4 {v0.s,v2.s,v4.s,v6.s}\[1\],\[x0\],#16'
-[^:]*:337: Error: .*`ld2r {v0.2s,v2.2s},\[x0\],#8'
-[^:]*:337: Error: .*`ld3r {v0.2s,v2.2s,v4.2s},\[x0\],#12'
-[^:]*:337: Error: .*`ld4r {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],#16'
-[^:]*:337: Error: .*`ld2r {v0.4s,v2.4s},\[x0\],#8'
-[^:]*:337: Error: .*`ld3r {v0.4s,v2.4s,v4.4s},\[x0\],#12'
-[^:]*:337: Error: .*`ld4r {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],#16'
-[^:]*:337: Error: .*`st2 {v0.s,v2.s}\[1\],\[x0\],#8'
-[^:]*:337: Error: .*`st3 {v0.s,v2.s,v4.s}\[1\],\[x0\],#12'
-[^:]*:337: Error: .*`st4 {v0.s,v2.s,v4.s,v6.s}\[1\],\[x0\],#16'
-[^:]*:352: Error: .*`ld2 {v0.d,v2.d}\[1\],\[x0\],#16'
-[^:]*:352: Error: .*`ld3 {v0.d,v2.d,v4.d}\[1\],\[x0\],#24'
-[^:]*:352: Error: .*`ld4 {v0.d,v2.d,v4.d,v6.d}\[1\],\[x0\],#32'
-[^:]*:352: Error: .*`ld2r {v0.1d,v2.1d},\[x0\],#16'
-[^:]*:352: Error: .*`ld3r {v0.1d,v2.1d,v4.1d},\[x0\],#24'
-[^:]*:352: Error: .*`ld4r {v0.1d,v2.1d,v4.1d,v6.1d},\[x0\],#32'
-[^:]*:352: Error: .*`ld2r {v0.2d,v2.2d},\[x0\],#16'
-[^:]*:352: Error: .*`ld3r {v0.2d,v2.2d,v4.2d},\[x0\],#24'
-[^:]*:352: Error: .*`ld4r {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],#32'
-[^:]*:352: Error: .*`st2 {v0.d,v2.d}\[1\],\[x0\],#16'
-[^:]*:352: Error: .*`st3 {v0.d,v2.d,v4.d}\[1\],\[x0\],#24'
-[^:]*:352: Error: .*`st4 {v0.d,v2.d,v4.d,v6.d}\[1\],\[x0\],#32'
-[^:]*:356: Error: .*`ld1r {v0.8b,v1.8b},\[x0\],x7'
-[^:]*:356: Error: .*`ld1r {v0.16b,v1.16b},\[x0\],x7'
-[^:]*:356: Error: .*`ld1r {v0.4h,v1.4h},\[x0\],x7'
-[^:]*:356: Error: .*`ld1r {v0.8h,v1.8h},\[x0\],x7'
-[^:]*:356: Error: .*`ld1r {v0.2s,v1.2s},\[x0\],x7'
-[^:]*:356: Error: .*`ld1r {v0.4s,v1.4s},\[x0\],x7'
-[^:]*:356: Error: .*`ld1r {v0.1d,v1.1d},\[x0\],x7'
-[^:]*:356: Error: .*`ld1r {v0.2d,v1.2d},\[x0\],x7'
-[^:]*:373: Error: .*`ld2 {v0.b,v2.b}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld3 {v0.b,v2.b,v4.b}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld4 {v0.b,v2.b,v4.b,v6.b}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld2 {v0.h,v2.h}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld3 {v0.h,v2.h,v4.h}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld4 {v0.h,v2.h,v4.h,v6.h}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld2 {v0.s,v2.s}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld3 {v0.s,v2.s,v4.s}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld4 {v0.s,v2.s,v4.s,v6.s}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld2 {v0.d,v2.d}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld3 {v0.d,v2.d,v4.d}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld4 {v0.d,v2.d,v4.d,v6.d}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`ld2r {v0.8b,v2.8b},\[x0\],x7'
-[^:]*:373: Error: .*`ld3r {v0.8b,v2.8b,v4.8b},\[x0\],x7'
-[^:]*:373: Error: .*`ld4r {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],x7'
-[^:]*:373: Error: .*`ld2r {v0.16b,v2.16b},\[x0\],x7'
-[^:]*:373: Error: .*`ld3r {v0.16b,v2.16b,v4.16b},\[x0\],x7'
-[^:]*:373: Error: .*`ld4r {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],x7'
-[^:]*:373: Error: .*`ld2r {v0.4h,v2.4h},\[x0\],x7'
-[^:]*:373: Error: .*`ld3r {v0.4h,v2.4h,v4.4h},\[x0\],x7'
-[^:]*:373: Error: .*`ld4r {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],x7'
-[^:]*:373: Error: .*`ld2r {v0.8h,v2.8h},\[x0\],x7'
-[^:]*:373: Error: .*`ld3r {v0.8h,v2.8h,v4.8h},\[x0\],x7'
-[^:]*:373: Error: .*`ld4r {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],x7'
-[^:]*:373: Error: .*`ld2r {v0.2s,v2.2s},\[x0\],x7'
-[^:]*:373: Error: .*`ld3r {v0.2s,v2.2s,v4.2s},\[x0\],x7'
-[^:]*:373: Error: .*`ld4r {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],x7'
-[^:]*:373: Error: .*`ld2r {v0.4s,v2.4s},\[x0\],x7'
-[^:]*:373: Error: .*`ld3r {v0.4s,v2.4s,v4.4s},\[x0\],x7'
-[^:]*:373: Error: .*`ld4r {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],x7'
-[^:]*:373: Error: .*`ld2r {v0.1d,v2.1d},\[x0\],x7'
-[^:]*:373: Error: .*`ld3r {v0.1d,v2.1d,v4.1d},\[x0\],x7'
-[^:]*:373: Error: .*`ld4r {v0.1d,v2.1d,v4.1d,v6.1d},\[x0\],x7'
-[^:]*:373: Error: .*`ld2r {v0.2d,v2.2d},\[x0\],x7'
-[^:]*:373: Error: .*`ld3r {v0.2d,v2.2d,v4.2d},\[x0\],x7'
-[^:]*:373: Error: .*`ld4r {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],x7'
-[^:]*:373: Error: .*`st2 {v0.b,v2.b}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st3 {v0.b,v2.b,v4.b}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st4 {v0.b,v2.b,v4.b,v6.b}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st2 {v0.h,v2.h}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st3 {v0.h,v2.h,v4.h}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st4 {v0.h,v2.h,v4.h,v6.h}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st2 {v0.s,v2.s}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st3 {v0.s,v2.s,v4.s}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st4 {v0.s,v2.s,v4.s,v6.s}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st2 {v0.d,v2.d}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st3 {v0.d,v2.d,v4.d}\[1\],\[x0\],x7'
-[^:]*:373: Error: .*`st4 {v0.d,v2.d,v4.d,v6.d}\[1\],\[x0\],x7'
+[^:]*:316: Error: .*`ld2 {v0.h,v2.h}\[1\],\[x0\],#4'
+[^:]*:316: Error: .*`ld3 {v0.h,v2.h,v4.h}\[1\],\[x0\],#6'
+[^:]*:316: Error: .*`ld4 {v0.h,v2.h,v4.h,v6.h}\[1\],\[x0\],#8'
+[^:]*:319: Error: .*`ld2r {v0.4h,v2.4h},\[x0\],#4'
+[^:]*:319: Error: .*`ld3r {v0.4h,v2.4h,v4.4h},\[x0\],#6'
+[^:]*:319: Error: .*`ld4r {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],#8'
+[^:]*:319: Error: .*`ld2r {v0.8h,v2.8h},\[x0\],#4'
+[^:]*:319: Error: .*`ld3r {v0.8h,v2.8h,v4.8h},\[x0\],#6'
+[^:]*:319: Error: .*`ld4r {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],#8'
+[^:]*:316: Error: .*`st2 {v0.h,v2.h}\[1\],\[x0\],#4'
+[^:]*:316: Error: .*`st3 {v0.h,v2.h,v4.h}\[1\],\[x0\],#6'
+[^:]*:316: Error: .*`st4 {v0.h,v2.h,v4.h,v6.h}\[1\],\[x0\],#8'
+[^:]*:331: Error: .*`ld2 {v0.s,v2.s}\[1\],\[x0\],#8'
+[^:]*:331: Error: .*`ld3 {v0.s,v2.s,v4.s}\[1\],\[x0\],#12'
+[^:]*:331: Error: .*`ld4 {v0.s,v2.s,v4.s,v6.s}\[1\],\[x0\],#16'
+[^:]*:334: Error: .*`ld2r {v0.2s,v2.2s},\[x0\],#8'
+[^:]*:334: Error: .*`ld3r {v0.2s,v2.2s,v4.2s},\[x0\],#12'
+[^:]*:334: Error: .*`ld4r {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],#16'
+[^:]*:334: Error: .*`ld2r {v0.4s,v2.4s},\[x0\],#8'
+[^:]*:334: Error: .*`ld3r {v0.4s,v2.4s,v4.4s},\[x0\],#12'
+[^:]*:334: Error: .*`ld4r {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],#16'
+[^:]*:331: Error: .*`st2 {v0.s,v2.s}\[1\],\[x0\],#8'
+[^:]*:331: Error: .*`st3 {v0.s,v2.s,v4.s}\[1\],\[x0\],#12'
+[^:]*:331: Error: .*`st4 {v0.s,v2.s,v4.s,v6.s}\[1\],\[x0\],#16'
+[^:]*:346: Error: .*`ld2 {v0.d,v2.d}\[1\],\[x0\],#16'
+[^:]*:346: Error: .*`ld3 {v0.d,v2.d,v4.d}\[1\],\[x0\],#24'
+[^:]*:346: Error: .*`ld4 {v0.d,v2.d,v4.d,v6.d}\[1\],\[x0\],#32'
+[^:]*:349: Error: .*`ld2r {v0.1d,v2.1d},\[x0\],#16'
+[^:]*:349: Error: .*`ld3r {v0.1d,v2.1d,v4.1d},\[x0\],#24'
+[^:]*:349: Error: .*`ld4r {v0.1d,v2.1d,v4.1d,v6.1d},\[x0\],#32'
+[^:]*:349: Error: .*`ld2r {v0.2d,v2.2d},\[x0\],#16'
+[^:]*:349: Error: .*`ld3r {v0.2d,v2.2d,v4.2d},\[x0\],#24'
+[^:]*:349: Error: .*`ld4r {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],#32'
+[^:]*:346: Error: .*`st2 {v0.d,v2.d}\[1\],\[x0\],#16'
+[^:]*:346: Error: .*`st3 {v0.d,v2.d,v4.d}\[1\],\[x0\],#24'
+[^:]*:346: Error: .*`st4 {v0.d,v2.d,v4.d,v6.d}\[1\],\[x0\],#32'
+[^:]*:355: Error: .*`ld1r {v0.8b,v1.8b},\[x0\],x7'
+[^:]*:355: Error: .*`ld1r {v0.16b,v1.16b},\[x0\],x7'
+[^:]*:355: Error: .*`ld1r {v0.4h,v1.4h},\[x0\],x7'
+[^:]*:355: Error: .*`ld1r {v0.8h,v1.8h},\[x0\],x7'
+[^:]*:355: Error: .*`ld1r {v0.2s,v1.2s},\[x0\],x7'
+[^:]*:355: Error: .*`ld1r {v0.4s,v1.4s},\[x0\],x7'
+[^:]*:355: Error: .*`ld1r {v0.1d,v1.1d},\[x0\],x7'
+[^:]*:355: Error: .*`ld1r {v0.2d,v1.2d},\[x0\],x7'
+[^:]*:366: Error: .*`ld2 {v0.b,v2.b}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld3 {v0.b,v2.b,v4.b}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld4 {v0.b,v2.b,v4.b,v6.b}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld2 {v0.h,v2.h}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld3 {v0.h,v2.h,v4.h}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld4 {v0.h,v2.h,v4.h,v6.h}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld2 {v0.s,v2.s}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld3 {v0.s,v2.s,v4.s}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld4 {v0.s,v2.s,v4.s,v6.s}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld2 {v0.d,v2.d}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld3 {v0.d,v2.d,v4.d}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`ld4 {v0.d,v2.d,v4.d,v6.d}\[1\],\[x0\],x7'
+[^:]*:370: Error: .*`ld2r {v0.8b,v2.8b},\[x0\],x7'
+[^:]*:370: Error: .*`ld3r {v0.8b,v2.8b,v4.8b},\[x0\],x7'
+[^:]*:370: Error: .*`ld4r {v0.8b,v2.8b,v4.8b,v6.8b},\[x0\],x7'
+[^:]*:370: Error: .*`ld2r {v0.16b,v2.16b},\[x0\],x7'
+[^:]*:370: Error: .*`ld3r {v0.16b,v2.16b,v4.16b},\[x0\],x7'
+[^:]*:370: Error: .*`ld4r {v0.16b,v2.16b,v4.16b,v6.16b},\[x0\],x7'
+[^:]*:370: Error: .*`ld2r {v0.4h,v2.4h},\[x0\],x7'
+[^:]*:370: Error: .*`ld3r {v0.4h,v2.4h,v4.4h},\[x0\],x7'
+[^:]*:370: Error: .*`ld4r {v0.4h,v2.4h,v4.4h,v6.4h},\[x0\],x7'
+[^:]*:370: Error: .*`ld2r {v0.8h,v2.8h},\[x0\],x7'
+[^:]*:370: Error: .*`ld3r {v0.8h,v2.8h,v4.8h},\[x0\],x7'
+[^:]*:370: Error: .*`ld4r {v0.8h,v2.8h,v4.8h,v6.8h},\[x0\],x7'
+[^:]*:370: Error: .*`ld2r {v0.2s,v2.2s},\[x0\],x7'
+[^:]*:370: Error: .*`ld3r {v0.2s,v2.2s,v4.2s},\[x0\],x7'
+[^:]*:370: Error: .*`ld4r {v0.2s,v2.2s,v4.2s,v6.2s},\[x0\],x7'
+[^:]*:370: Error: .*`ld2r {v0.4s,v2.4s},\[x0\],x7'
+[^:]*:370: Error: .*`ld3r {v0.4s,v2.4s,v4.4s},\[x0\],x7'
+[^:]*:370: Error: .*`ld4r {v0.4s,v2.4s,v4.4s,v6.4s},\[x0\],x7'
+[^:]*:370: Error: .*`ld2r {v0.1d,v2.1d},\[x0\],x7'
+[^:]*:370: Error: .*`ld3r {v0.1d,v2.1d,v4.1d},\[x0\],x7'
+[^:]*:370: Error: .*`ld4r {v0.1d,v2.1d,v4.1d,v6.1d},\[x0\],x7'
+[^:]*:370: Error: .*`ld2r {v0.2d,v2.2d},\[x0\],x7'
+[^:]*:370: Error: .*`ld3r {v0.2d,v2.2d,v4.2d},\[x0\],x7'
+[^:]*:370: Error: .*`ld4r {v0.2d,v2.2d,v4.2d,v6.2d},\[x0\],x7'
+[^:]*:366: Error: .*`st2 {v0.b,v2.b}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st3 {v0.b,v2.b,v4.b}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st4 {v0.b,v2.b,v4.b,v6.b}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st2 {v0.h,v2.h}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st3 {v0.h,v2.h,v4.h}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st4 {v0.h,v2.h,v4.h,v6.h}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st2 {v0.s,v2.s}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st3 {v0.s,v2.s,v4.s}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st4 {v0.s,v2.s,v4.s,v6.s}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st2 {v0.d,v2.d}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st3 {v0.d,v2.d,v4.d}\[1\],\[x0\],x7'
+[^:]*:366: Error: .*`st4 {v0.d,v2.d,v4.d,v6.d}\[1\],\[x0\],x7'
 [^:]*:396: Error: .*`ld2 {v0.8B,v2.8B},\[x0\]'
 [^:]*:396: Error: .*`ld3 {v0.8B,v2.8B,v4.8B},\[x0\]'
 [^:]*:396: Error: .*`ld4 {v0.8B,v2.8B,v4.8B,v6.8B},\[x0\]'
@@ -485,22 +485,22 @@
 [^:]*:452: Error: .*`ld4r {v0.2D,v2.2D,v4.2D,v6.2D},\[x0\]'
 [^:]*:454: Error: .*`pmull v0.1q,v1.1d,v2.1d'
 [^:]*:455: Error: .*`pmull2 v0.1q,v1.2d,v2.2d'
-[^:]*:463: Error: .*`scvtf d0,w1,33'
-[^:]*:463: Error: .*`scvtf s0,w0,33'
-[^:]*:463: Error: .*`scvtf d0,x1,65'
-[^:]*:463: Error: .*`scvtf s0,x1,65'
-[^:]*:463: Error: .*`ucvtf d0,w1,33'
-[^:]*:463: Error: .*`ucvtf s0,w0,33'
-[^:]*:463: Error: .*`ucvtf d0,x1,65'
-[^:]*:463: Error: .*`ucvtf s0,x1,65'
-[^:]*:469: Error: .*`fcvtzs w1,d0,33'
-[^:]*:469: Error: .*`fcvtzs w0,s0,33'
-[^:]*:469: Error: .*`fcvtzs x1,d0,65'
-[^:]*:469: Error: .*`fcvtzs x1,s0,65'
-[^:]*:469: Error: .*`fcvtzu w1,d0,33'
-[^:]*:469: Error: .*`fcvtzu w0,s0,33'
-[^:]*:469: Error: .*`fcvtzu x1,d0,65'
-[^:]*:469: Error: .*`fcvtzu x1,s0,65'
+[^:]*:459: Error: .*`scvtf d0,w1,33'
+[^:]*:460: Error: .*`scvtf s0,w0,33'
+[^:]*:461: Error: .*`scvtf d0,x1,65'
+[^:]*:462: Error: .*`scvtf s0,x1,65'
+[^:]*:459: Error: .*`ucvtf d0,w1,33'
+[^:]*:460: Error: .*`ucvtf s0,w0,33'
+[^:]*:461: Error: .*`ucvtf d0,x1,65'
+[^:]*:462: Error: .*`ucvtf s0,x1,65'
+[^:]*:465: Error: .*`fcvtzs w1,d0,33'
+[^:]*:466: Error: .*`fcvtzs w0,s0,33'
+[^:]*:467: Error: .*`fcvtzs x1,d0,65'
+[^:]*:468: Error: .*`fcvtzs x1,s0,65'
+[^:]*:465: Error: .*`fcvtzu w1,d0,33'
+[^:]*:466: Error: .*`fcvtzu w0,s0,33'
+[^:]*:467: Error: .*`fcvtzu x1,d0,65'
+[^:]*:468: Error: .*`fcvtzu x1,s0,65'
 [^:]*:472: Error: .*
 [^:]*:475: Error: .*`ldrh w0,\[x1,x2,lsr#1\]'
 [^:]*:477: Error: .*`add w0,w1,w2,ror#1'
--- a/gas/testsuite/gas/aarch64/illegal-ldapr.l
+++ b/gas/testsuite/gas/aarch64/illegal-ldapr.l
@@ -2,15 +2,15 @@
 [^:]+:18: Error: operand mismatch -- `ldaprb x0,\[x1\]'
 [^:]+:19: Error: operand mismatch -- `ldaprh x0,\[x1\]'
 [^:]+:20: Error: the optional immediate offset can only be 0 at operand 2 -- `ldapr x0,\[x1,#8\]'
-[^:]+:24: Error: 64-bit integer or SP register expected at operand 2 -- `ldaprb w1,\[xz\]'
-[^:]+:24: Error: the optional immediate offset can only be 0 at operand 2 -- `ldaprb w1,\[x7,#8\]'
-[^:]+:24: Error: invalid addressing mode at operand 2 -- `ldaprb w1,\[x7,#8\]!'
-[^:]+:24: Error: invalid addressing mode at operand 2 -- `ldaprb w1,\[x7\],#8'
-[^:]+:24: Error: 64-bit integer or SP register expected at operand 2 -- `ldaprh w1,\[xz\]'
-[^:]+:24: Error: the optional immediate offset can only be 0 at operand 2 -- `ldaprh w1,\[x7,#8\]'
-[^:]+:24: Error: invalid addressing mode at operand 2 -- `ldaprh w1,\[x7,#8\]!'
-[^:]+:24: Error: invalid addressing mode at operand 2 -- `ldaprh w1,\[x7\],#8'
-[^:]+:24: Error: 64-bit integer or SP register expected at operand 2 -- `ldapr w1,\[xz\]'
-[^:]+:24: Error: the optional immediate offset can only be 0 at operand 2 -- `ldapr w1,\[x7,#8\]'
-[^:]+:24: Error: invalid addressing mode at operand 2 -- `ldapr w1,\[x7,#8\]!'
-[^:]+:24: Error: invalid addressing mode at operand 2 -- `ldapr w1,\[x7\],#8'
+[^:]+:23: Error: 64-bit integer or SP register expected at operand 2 -- `ldaprb w1,\[xz\]'
+[^:]+:23: Error: the optional immediate offset can only be 0 at operand 2 -- `ldaprb w1,\[x7,#8\]'
+[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldaprb w1,\[x7,#8\]!'
+[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldaprb w1,\[x7\],#8'
+[^:]+:23: Error: 64-bit integer or SP register expected at operand 2 -- `ldaprh w1,\[xz\]'
+[^:]+:23: Error: the optional immediate offset can only be 0 at operand 2 -- `ldaprh w1,\[x7,#8\]'
+[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldaprh w1,\[x7,#8\]!'
+[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldaprh w1,\[x7\],#8'
+[^:]+:23: Error: 64-bit integer or SP register expected at operand 2 -- `ldapr w1,\[xz\]'
+[^:]+:23: Error: the optional immediate offset can only be 0 at operand 2 -- `ldapr w1,\[x7,#8\]'
+[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldapr w1,\[x7,#8\]!'
+[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldapr w1,\[x7\],#8'
--- a/gas/testsuite/gas/arm/mve-vctp-bad.l
+++ b/gas/testsuite/gas/arm/mve-vctp-bad.l
@@ -1,36 +1,36 @@
 [^:]*: Assembler messages:
-[^:]*:8: Error: Type is not allowed for this instruction -- `vctp.s8 r13'
-[^:]*:8: Error: Type is not allowed for this instruction -- `vctp.u16 r13'
-[^:]*:8: Error: Type is not allowed for this instruction -- `vctp.f32 r13'
-[^:]*:8: Error: r15 not allowed here -- `vctp.8 r15'
-[^:]*:8: Error: r15 not allowed here -- `vctp.16 r15'
-[^:]*:8: Error: r15 not allowed here -- `vctp.32 r15'
-[^:]*:8: Error: r15 not allowed here -- `vctp.64 r15'
-[^:]*:8: Error: r15 not allowed here -- `vctp.s8 r15'
-[^:]*:8: Error: r15 not allowed here -- `vctp.u16 r15'
-[^:]*:8: Error: r15 not allowed here -- `vctp.f32 r15'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r0'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r0'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r0'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r0'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r0'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r1'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r1'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r1'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r1'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r1'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r2'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r2'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r2'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r2'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r2'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r4'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r4'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r4'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r4'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r4'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r8'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r8'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r8'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r8'
-[^:]*:14: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r8'
+[^:]*:6: Error: Type is not allowed for this instruction -- `vctp.s8 r13'
+[^:]*:6: Error: Type is not allowed for this instruction -- `vctp.u16 r13'
+[^:]*:6: Error: Type is not allowed for this instruction -- `vctp.f32 r13'
+[^:]*:6: Error: r15 not allowed here -- `vctp.8 r15'
+[^:]*:6: Error: r15 not allowed here -- `vctp.16 r15'
+[^:]*:6: Error: r15 not allowed here -- `vctp.32 r15'
+[^:]*:6: Error: r15 not allowed here -- `vctp.64 r15'
+[^:]*:6: Error: r15 not allowed here -- `vctp.s8 r15'
+[^:]*:6: Error: r15 not allowed here -- `vctp.u16 r15'
+[^:]*:6: Error: r15 not allowed here -- `vctp.f32 r15'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r0'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r0'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r0'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r0'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r0'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r1'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r1'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r1'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r1'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r1'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r2'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r2'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r2'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r2'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r2'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r4'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r4'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r4'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r4'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r4'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.8 r8'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.16 r8'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.32 r8'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.64 r8'
+[^:]*:12: Error: vector predicated instruction should be in VPT/VPST block -- `vctpt.f32 r8'
--- a/gas/testsuite/gas/arm/mve-vldr-bad-3.l
+++ b/gas/testsuite/gas/arm/mve-vldr-bad-3.l
@@ -133,37 +133,37 @@
 [^:]*:134: Error: syntax error -- `vldrweq.32 q0,\[r0\]'
 [^:]*:135: Error: vector predicated instruction should be in VPT/VPST block -- `vldrwt.32 q0,\[r0\]'
 [^:]*:137: Error: instruction missing MVE vector predication code -- `vldrw.32 q0,\[r0\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.16 q0,\[r2,q3\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.32 q0,\[r2,q3\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.64 q0,\[r2,q3\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.f16 q0,\[r2,q3\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.f32 q0,\[r2,q3\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.f64 q0,\[r2,q3\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.p16 q0,\[r2,q3\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.p32 q0,\[r2,q3\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.p64 q0,\[r2,q3\]'
-[^:]*:140: Error: bad element type for instruction -- `vldrb.s8 q0,\[r2,q3\]'
-[^:]*:143: Error: bad element type for instruction -- `vldrh.8 q0,\[r2,q3,uxtw#1\]'
-[^:]*:143: Error: bad element type for instruction -- `vldrh.32 q0,\[r2,q3,uxtw#1\]'
-[^:]*:143: Error: bad element type for instruction -- `vldrh.64 q0,\[r2,q3,uxtw#1\]'
-[^:]*:143: Error: bad element type for instruction -- `vldrh.f32 q0,\[r2,q3,uxtw#1\]'
-[^:]*:143: Error: bad element type for instruction -- `vldrh.f64 q0,\[r2,q3,uxtw#1\]'
-[^:]*:143: Error: bad element type for instruction -- `vldrh.p32 q0,\[r2,q3,uxtw#1\]'
-[^:]*:143: Error: bad element type for instruction -- `vldrh.p64 q0,\[r2,q3,uxtw#1\]'
-[^:]*:143: Error: bad element type for instruction -- `vldrh.s16 q0,\[r2,q3,uxtw#1\]'
-[^:]*:146: Error: bad element type for instruction -- `vldrw.8 q0,\[r2,q3,uxtw#2\]'
-[^:]*:146: Error: bad element type for instruction -- `vldrw.16 q0,\[r2,q3,uxtw#2\]'
-[^:]*:146: Error: bad element type for instruction -- `vldrw.64 q0,\[r2,q3,uxtw#2\]'
-[^:]*:146: Error: bad element type for instruction -- `vldrw.f16 q0,\[r2,q3,uxtw#2\]'
-[^:]*:146: Error: bad element type for instruction -- `vldrw.f64 q0,\[r2,q3,uxtw#2\]'
-[^:]*:146: Error: bad element type for instruction -- `vldrw.p16 q0,\[r2,q3,uxtw#2\]'
-[^:]*:146: Error: bad element type for instruction -- `vldrw.p64 q0,\[r2,q3,uxtw#2\]'
-[^:]*:146: Error: bad element type for instruction -- `vldrw.s32 q0,\[r2,q3,uxtw#2\]'
-[^:]*:149: Error: bad element type for instruction -- `vldrd.8 q0,\[r2,q3,uxtw#3\]'
-[^:]*:149: Error: bad element type for instruction -- `vldrd.16 q0,\[r2,q3,uxtw#3\]'
-[^:]*:149: Error: bad element type for instruction -- `vldrd.32 q0,\[r2,q3,uxtw#3\]'
-[^:]*:149: Error: bad element type for instruction -- `vldrd.f16 q0,\[r2,q3,uxtw#3\]'
-[^:]*:149: Error: bad element type for instruction -- `vldrd.f32 q0,\[r2,q3,uxtw#3\]'
-[^:]*:149: Error: bad element type for instruction -- `vldrd.p16 q0,\[r2,q3,uxtw#3\]'
-[^:]*:149: Error: bad element type for instruction -- `vldrd.p32 q0,\[r2,q3,uxtw#3\]'
-[^:]*:149: Error: bad element type for instruction -- `vldrd.s64 q0,\[r2,q3,uxtw#3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.16 q0,\[r2,q3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.32 q0,\[r2,q3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.64 q0,\[r2,q3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.f16 q0,\[r2,q3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.f32 q0,\[r2,q3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.f64 q0,\[r2,q3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.p16 q0,\[r2,q3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.p32 q0,\[r2,q3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.p64 q0,\[r2,q3\]'
+[^:]*:139: Error: bad element type for instruction -- `vldrb.s8 q0,\[r2,q3\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.8 q0,\[r2,q3,uxtw#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.32 q0,\[r2,q3,uxtw#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.64 q0,\[r2,q3,uxtw#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.f32 q0,\[r2,q3,uxtw#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.f64 q0,\[r2,q3,uxtw#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.p32 q0,\[r2,q3,uxtw#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.p64 q0,\[r2,q3,uxtw#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.s16 q0,\[r2,q3,uxtw#1\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.8 q0,\[r2,q3,uxtw#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.16 q0,\[r2,q3,uxtw#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.64 q0,\[r2,q3,uxtw#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.f16 q0,\[r2,q3,uxtw#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.f64 q0,\[r2,q3,uxtw#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.p16 q0,\[r2,q3,uxtw#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.p64 q0,\[r2,q3,uxtw#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.s32 q0,\[r2,q3,uxtw#2\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.8 q0,\[r2,q3,uxtw#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.16 q0,\[r2,q3,uxtw#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.32 q0,\[r2,q3,uxtw#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.f16 q0,\[r2,q3,uxtw#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.f32 q0,\[r2,q3,uxtw#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.p16 q0,\[r2,q3,uxtw#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.p32 q0,\[r2,q3,uxtw#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.s64 q0,\[r2,q3,uxtw#3\]'
--- a/gas/testsuite/gas/arm/mve-vldr-vstr-bad.l
+++ b/gas/testsuite/gas/arm/mve-vldr-vstr-bad.l
@@ -1,811 +1,811 @@
 [^:]*: Assembler messages:
-[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r0'
-[^:]*:12: Error: syntax error -- `vstrb.8 q0,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r1'
-[^:]*:12: Error: syntax error -- `vstrb.8 q0,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r2'
-[^:]*:12: Error: syntax error -- `vstrb.8 q0,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r4'
-[^:]*:12: Error: syntax error -- `vstrb.8 q0,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r7'
-[^:]*:12: Error: syntax error -- `vstrb.8 q0,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r8'
-[^:]*:12: Error: syntax error -- `vstrb.8 q0,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r10'
-[^:]*:12: Error: syntax error -- `vstrb.8 q0,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r12'
-[^:]*:12: Error: syntax error -- `vstrb.8 q0,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q0,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q0,r14'
-[^:]*:12: Error: syntax error -- `vstrb.8 q0,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r0'
-[^:]*:12: Error: syntax error -- `vstrb.8 q1,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r1'
-[^:]*:12: Error: syntax error -- `vstrb.8 q1,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r2'
-[^:]*:12: Error: syntax error -- `vstrb.8 q1,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r4'
-[^:]*:12: Error: syntax error -- `vstrb.8 q1,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r7'
-[^:]*:12: Error: syntax error -- `vstrb.8 q1,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r8'
-[^:]*:12: Error: syntax error -- `vstrb.8 q1,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r10'
-[^:]*:12: Error: syntax error -- `vstrb.8 q1,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r12'
-[^:]*:12: Error: syntax error -- `vstrb.8 q1,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q1,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q1,r14'
-[^:]*:12: Error: syntax error -- `vstrb.8 q1,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r0'
-[^:]*:12: Error: syntax error -- `vstrb.8 q2,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r1'
-[^:]*:12: Error: syntax error -- `vstrb.8 q2,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r2'
-[^:]*:12: Error: syntax error -- `vstrb.8 q2,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r4'
-[^:]*:12: Error: syntax error -- `vstrb.8 q2,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r7'
-[^:]*:12: Error: syntax error -- `vstrb.8 q2,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r8'
-[^:]*:12: Error: syntax error -- `vstrb.8 q2,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r10'
-[^:]*:12: Error: syntax error -- `vstrb.8 q2,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r12'
-[^:]*:12: Error: syntax error -- `vstrb.8 q2,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q2,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q2,r14'
-[^:]*:12: Error: syntax error -- `vstrb.8 q2,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r0'
-[^:]*:12: Error: syntax error -- `vstrb.8 q4,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r1'
-[^:]*:12: Error: syntax error -- `vstrb.8 q4,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r2'
-[^:]*:12: Error: syntax error -- `vstrb.8 q4,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r4'
-[^:]*:12: Error: syntax error -- `vstrb.8 q4,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r7'
-[^:]*:12: Error: syntax error -- `vstrb.8 q4,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r8'
-[^:]*:12: Error: syntax error -- `vstrb.8 q4,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r10'
-[^:]*:12: Error: syntax error -- `vstrb.8 q4,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r12'
-[^:]*:12: Error: syntax error -- `vstrb.8 q4,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q4,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q4,r14'
-[^:]*:12: Error: syntax error -- `vstrb.8 q4,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r0'
-[^:]*:12: Error: syntax error -- `vstrb.8 q7,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r1'
-[^:]*:12: Error: syntax error -- `vstrb.8 q7,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r2'
-[^:]*:12: Error: syntax error -- `vstrb.8 q7,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r4'
-[^:]*:12: Error: syntax error -- `vstrb.8 q7,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r7'
-[^:]*:12: Error: syntax error -- `vstrb.8 q7,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r8'
-[^:]*:12: Error: syntax error -- `vstrb.8 q7,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r10'
-[^:]*:12: Error: syntax error -- `vstrb.8 q7,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r12'
-[^:]*:12: Error: syntax error -- `vstrb.8 q7,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s8 q7,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u8 q7,r14'
-[^:]*:12: Error: syntax error -- `vstrb.8 q7,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r0'
-[^:]*:12: Error: syntax error -- `vstrb.16 q0,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r1'
-[^:]*:12: Error: syntax error -- `vstrb.16 q0,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r2'
-[^:]*:12: Error: syntax error -- `vstrb.16 q0,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r4'
-[^:]*:12: Error: syntax error -- `vstrb.16 q0,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r7'
-[^:]*:12: Error: syntax error -- `vstrb.16 q0,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r8'
-[^:]*:12: Error: syntax error -- `vstrb.16 q0,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r10'
-[^:]*:12: Error: syntax error -- `vstrb.16 q0,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r12'
-[^:]*:12: Error: syntax error -- `vstrb.16 q0,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q0,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q0,r14'
-[^:]*:12: Error: syntax error -- `vstrb.16 q0,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r0'
-[^:]*:12: Error: syntax error -- `vstrb.16 q1,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r1'
-[^:]*:12: Error: syntax error -- `vstrb.16 q1,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r2'
-[^:]*:12: Error: syntax error -- `vstrb.16 q1,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r4'
-[^:]*:12: Error: syntax error -- `vstrb.16 q1,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r7'
-[^:]*:12: Error: syntax error -- `vstrb.16 q1,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r8'
-[^:]*:12: Error: syntax error -- `vstrb.16 q1,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r10'
-[^:]*:12: Error: syntax error -- `vstrb.16 q1,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r12'
-[^:]*:12: Error: syntax error -- `vstrb.16 q1,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q1,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q1,r14'
-[^:]*:12: Error: syntax error -- `vstrb.16 q1,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r0'
-[^:]*:12: Error: syntax error -- `vstrb.16 q2,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r1'
-[^:]*:12: Error: syntax error -- `vstrb.16 q2,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r2'
-[^:]*:12: Error: syntax error -- `vstrb.16 q2,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r4'
-[^:]*:12: Error: syntax error -- `vstrb.16 q2,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r7'
-[^:]*:12: Error: syntax error -- `vstrb.16 q2,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r8'
-[^:]*:12: Error: syntax error -- `vstrb.16 q2,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r10'
-[^:]*:12: Error: syntax error -- `vstrb.16 q2,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r12'
-[^:]*:12: Error: syntax error -- `vstrb.16 q2,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q2,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q2,r14'
-[^:]*:12: Error: syntax error -- `vstrb.16 q2,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r0'
-[^:]*:12: Error: syntax error -- `vstrb.16 q4,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r1'
-[^:]*:12: Error: syntax error -- `vstrb.16 q4,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r2'
-[^:]*:12: Error: syntax error -- `vstrb.16 q4,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r4'
-[^:]*:12: Error: syntax error -- `vstrb.16 q4,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r7'
-[^:]*:12: Error: syntax error -- `vstrb.16 q4,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r8'
-[^:]*:12: Error: syntax error -- `vstrb.16 q4,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r10'
-[^:]*:12: Error: syntax error -- `vstrb.16 q4,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r12'
-[^:]*:12: Error: syntax error -- `vstrb.16 q4,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q4,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q4,r14'
-[^:]*:12: Error: syntax error -- `vstrb.16 q4,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r0'
-[^:]*:12: Error: syntax error -- `vstrb.16 q7,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r1'
-[^:]*:12: Error: syntax error -- `vstrb.16 q7,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r2'
-[^:]*:12: Error: syntax error -- `vstrb.16 q7,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r4'
-[^:]*:12: Error: syntax error -- `vstrb.16 q7,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r7'
-[^:]*:12: Error: syntax error -- `vstrb.16 q7,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r8'
-[^:]*:12: Error: syntax error -- `vstrb.16 q7,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r10'
-[^:]*:12: Error: syntax error -- `vstrb.16 q7,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r12'
-[^:]*:12: Error: syntax error -- `vstrb.16 q7,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s16 q7,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u16 q7,r14'
-[^:]*:12: Error: syntax error -- `vstrb.16 q7,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r0'
-[^:]*:12: Error: syntax error -- `vstrb.32 q0,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r1'
-[^:]*:12: Error: syntax error -- `vstrb.32 q0,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r2'
-[^:]*:12: Error: syntax error -- `vstrb.32 q0,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r4'
-[^:]*:12: Error: syntax error -- `vstrb.32 q0,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r7'
-[^:]*:12: Error: syntax error -- `vstrb.32 q0,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r8'
-[^:]*:12: Error: syntax error -- `vstrb.32 q0,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r10'
-[^:]*:12: Error: syntax error -- `vstrb.32 q0,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r12'
-[^:]*:12: Error: syntax error -- `vstrb.32 q0,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q0,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q0,r14'
-[^:]*:12: Error: syntax error -- `vstrb.32 q0,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r0'
-[^:]*:12: Error: syntax error -- `vstrb.32 q1,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r1'
-[^:]*:12: Error: syntax error -- `vstrb.32 q1,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r2'
-[^:]*:12: Error: syntax error -- `vstrb.32 q1,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r4'
-[^:]*:12: Error: syntax error -- `vstrb.32 q1,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r7'
-[^:]*:12: Error: syntax error -- `vstrb.32 q1,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r8'
-[^:]*:12: Error: syntax error -- `vstrb.32 q1,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r10'
-[^:]*:12: Error: syntax error -- `vstrb.32 q1,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r12'
-[^:]*:12: Error: syntax error -- `vstrb.32 q1,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q1,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q1,r14'
-[^:]*:12: Error: syntax error -- `vstrb.32 q1,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r0'
-[^:]*:12: Error: syntax error -- `vstrb.32 q2,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r1'
-[^:]*:12: Error: syntax error -- `vstrb.32 q2,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r2'
-[^:]*:12: Error: syntax error -- `vstrb.32 q2,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r4'
-[^:]*:12: Error: syntax error -- `vstrb.32 q2,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r7'
-[^:]*:12: Error: syntax error -- `vstrb.32 q2,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r8'
-[^:]*:12: Error: syntax error -- `vstrb.32 q2,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r10'
-[^:]*:12: Error: syntax error -- `vstrb.32 q2,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r12'
-[^:]*:12: Error: syntax error -- `vstrb.32 q2,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q2,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q2,r14'
-[^:]*:12: Error: syntax error -- `vstrb.32 q2,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r0'
-[^:]*:12: Error: syntax error -- `vstrb.32 q4,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r1'
-[^:]*:12: Error: syntax error -- `vstrb.32 q4,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r2'
-[^:]*:12: Error: syntax error -- `vstrb.32 q4,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r4'
-[^:]*:12: Error: syntax error -- `vstrb.32 q4,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r7'
-[^:]*:12: Error: syntax error -- `vstrb.32 q4,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r8'
-[^:]*:12: Error: syntax error -- `vstrb.32 q4,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r10'
-[^:]*:12: Error: syntax error -- `vstrb.32 q4,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r12'
-[^:]*:12: Error: syntax error -- `vstrb.32 q4,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q4,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q4,r14'
-[^:]*:12: Error: syntax error -- `vstrb.32 q4,r14'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r0'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r0'
-[^:]*:12: Error: syntax error -- `vstrb.32 q7,r0'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r1'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r1'
-[^:]*:12: Error: syntax error -- `vstrb.32 q7,r1'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r2'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r2'
-[^:]*:12: Error: syntax error -- `vstrb.32 q7,r2'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r4'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r4'
-[^:]*:12: Error: syntax error -- `vstrb.32 q7,r4'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r7'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r7'
-[^:]*:12: Error: syntax error -- `vstrb.32 q7,r7'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r8'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r8'
-[^:]*:12: Error: syntax error -- `vstrb.32 q7,r8'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r10'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r10'
-[^:]*:12: Error: syntax error -- `vstrb.32 q7,r10'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r12'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r12'
-[^:]*:12: Error: syntax error -- `vstrb.32 q7,r12'
-[^:]*:12: Error: syntax error -- `vldrb.s32 q7,r14'
-[^:]*:12: Error: syntax error -- `vldrb.u32 q7,r14'
-[^:]*:12: Error: syntax error -- `vstrb.32 q7,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r0'
-[^:]*:22: Error: syntax error -- `vstrh.16 q0,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r1'
-[^:]*:22: Error: syntax error -- `vstrh.16 q0,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r2'
-[^:]*:22: Error: syntax error -- `vstrh.16 q0,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r4'
-[^:]*:22: Error: syntax error -- `vstrh.16 q0,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r7'
-[^:]*:22: Error: syntax error -- `vstrh.16 q0,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r8'
-[^:]*:22: Error: syntax error -- `vstrh.16 q0,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r10'
-[^:]*:22: Error: syntax error -- `vstrh.16 q0,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r12'
-[^:]*:22: Error: syntax error -- `vstrh.16 q0,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q0,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q0,r14'
-[^:]*:22: Error: syntax error -- `vstrh.16 q0,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r0'
-[^:]*:22: Error: syntax error -- `vstrh.16 q1,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r1'
-[^:]*:22: Error: syntax error -- `vstrh.16 q1,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r2'
-[^:]*:22: Error: syntax error -- `vstrh.16 q1,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r4'
-[^:]*:22: Error: syntax error -- `vstrh.16 q1,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r7'
-[^:]*:22: Error: syntax error -- `vstrh.16 q1,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r8'
-[^:]*:22: Error: syntax error -- `vstrh.16 q1,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r10'
-[^:]*:22: Error: syntax error -- `vstrh.16 q1,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r12'
-[^:]*:22: Error: syntax error -- `vstrh.16 q1,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q1,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q1,r14'
-[^:]*:22: Error: syntax error -- `vstrh.16 q1,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r0'
-[^:]*:22: Error: syntax error -- `vstrh.16 q2,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r1'
-[^:]*:22: Error: syntax error -- `vstrh.16 q2,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r2'
-[^:]*:22: Error: syntax error -- `vstrh.16 q2,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r4'
-[^:]*:22: Error: syntax error -- `vstrh.16 q2,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r7'
-[^:]*:22: Error: syntax error -- `vstrh.16 q2,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r8'
-[^:]*:22: Error: syntax error -- `vstrh.16 q2,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r10'
-[^:]*:22: Error: syntax error -- `vstrh.16 q2,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r12'
-[^:]*:22: Error: syntax error -- `vstrh.16 q2,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q2,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q2,r14'
-[^:]*:22: Error: syntax error -- `vstrh.16 q2,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r0'
-[^:]*:22: Error: syntax error -- `vstrh.16 q4,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r1'
-[^:]*:22: Error: syntax error -- `vstrh.16 q4,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r2'
-[^:]*:22: Error: syntax error -- `vstrh.16 q4,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r4'
-[^:]*:22: Error: syntax error -- `vstrh.16 q4,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r7'
-[^:]*:22: Error: syntax error -- `vstrh.16 q4,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r8'
-[^:]*:22: Error: syntax error -- `vstrh.16 q4,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r10'
-[^:]*:22: Error: syntax error -- `vstrh.16 q4,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r12'
-[^:]*:22: Error: syntax error -- `vstrh.16 q4,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q4,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q4,r14'
-[^:]*:22: Error: syntax error -- `vstrh.16 q4,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r0'
-[^:]*:22: Error: syntax error -- `vstrh.16 q7,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r1'
-[^:]*:22: Error: syntax error -- `vstrh.16 q7,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r2'
-[^:]*:22: Error: syntax error -- `vstrh.16 q7,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r4'
-[^:]*:22: Error: syntax error -- `vstrh.16 q7,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r7'
-[^:]*:22: Error: syntax error -- `vstrh.16 q7,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r8'
-[^:]*:22: Error: syntax error -- `vstrh.16 q7,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r10'
-[^:]*:22: Error: syntax error -- `vstrh.16 q7,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r12'
-[^:]*:22: Error: syntax error -- `vstrh.16 q7,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s16 q7,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u16 q7,r14'
-[^:]*:22: Error: syntax error -- `vstrh.16 q7,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r0'
-[^:]*:22: Error: syntax error -- `vstrh.32 q0,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r1'
-[^:]*:22: Error: syntax error -- `vstrh.32 q0,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r2'
-[^:]*:22: Error: syntax error -- `vstrh.32 q0,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r4'
-[^:]*:22: Error: syntax error -- `vstrh.32 q0,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r7'
-[^:]*:22: Error: syntax error -- `vstrh.32 q0,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r8'
-[^:]*:22: Error: syntax error -- `vstrh.32 q0,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r10'
-[^:]*:22: Error: syntax error -- `vstrh.32 q0,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r12'
-[^:]*:22: Error: syntax error -- `vstrh.32 q0,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q0,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q0,r14'
-[^:]*:22: Error: syntax error -- `vstrh.32 q0,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r0'
-[^:]*:22: Error: syntax error -- `vstrh.32 q1,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r1'
-[^:]*:22: Error: syntax error -- `vstrh.32 q1,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r2'
-[^:]*:22: Error: syntax error -- `vstrh.32 q1,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r4'
-[^:]*:22: Error: syntax error -- `vstrh.32 q1,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r7'
-[^:]*:22: Error: syntax error -- `vstrh.32 q1,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r8'
-[^:]*:22: Error: syntax error -- `vstrh.32 q1,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r10'
-[^:]*:22: Error: syntax error -- `vstrh.32 q1,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r12'
-[^:]*:22: Error: syntax error -- `vstrh.32 q1,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q1,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q1,r14'
-[^:]*:22: Error: syntax error -- `vstrh.32 q1,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r0'
-[^:]*:22: Error: syntax error -- `vstrh.32 q2,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r1'
-[^:]*:22: Error: syntax error -- `vstrh.32 q2,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r2'
-[^:]*:22: Error: syntax error -- `vstrh.32 q2,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r4'
-[^:]*:22: Error: syntax error -- `vstrh.32 q2,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r7'
-[^:]*:22: Error: syntax error -- `vstrh.32 q2,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r8'
-[^:]*:22: Error: syntax error -- `vstrh.32 q2,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r10'
-[^:]*:22: Error: syntax error -- `vstrh.32 q2,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r12'
-[^:]*:22: Error: syntax error -- `vstrh.32 q2,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q2,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q2,r14'
-[^:]*:22: Error: syntax error -- `vstrh.32 q2,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r0'
-[^:]*:22: Error: syntax error -- `vstrh.32 q4,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r1'
-[^:]*:22: Error: syntax error -- `vstrh.32 q4,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r2'
-[^:]*:22: Error: syntax error -- `vstrh.32 q4,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r4'
-[^:]*:22: Error: syntax error -- `vstrh.32 q4,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r7'
-[^:]*:22: Error: syntax error -- `vstrh.32 q4,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r8'
-[^:]*:22: Error: syntax error -- `vstrh.32 q4,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r10'
-[^:]*:22: Error: syntax error -- `vstrh.32 q4,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r12'
-[^:]*:22: Error: syntax error -- `vstrh.32 q4,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q4,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q4,r14'
-[^:]*:22: Error: syntax error -- `vstrh.32 q4,r14'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r0'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r0'
-[^:]*:22: Error: syntax error -- `vstrh.32 q7,r0'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r1'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r1'
-[^:]*:22: Error: syntax error -- `vstrh.32 q7,r1'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r2'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r2'
-[^:]*:22: Error: syntax error -- `vstrh.32 q7,r2'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r4'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r4'
-[^:]*:22: Error: syntax error -- `vstrh.32 q7,r4'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r7'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r7'
-[^:]*:22: Error: syntax error -- `vstrh.32 q7,r7'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r8'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r8'
-[^:]*:22: Error: syntax error -- `vstrh.32 q7,r8'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r10'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r10'
-[^:]*:22: Error: syntax error -- `vstrh.32 q7,r10'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r12'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r12'
-[^:]*:22: Error: syntax error -- `vstrh.32 q7,r12'
-[^:]*:22: Error: syntax error -- `vldrh.s32 q7,r14'
-[^:]*:22: Error: syntax error -- `vldrh.u32 q7,r14'
-[^:]*:22: Error: syntax error -- `vstrh.32 q7,r14'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r0'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r0'
-[^:]*:30: Error: syntax error -- `vstrw.32 q0,r0'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r1'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r1'
-[^:]*:30: Error: syntax error -- `vstrw.32 q0,r1'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r2'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r2'
-[^:]*:30: Error: syntax error -- `vstrw.32 q0,r2'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r4'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r4'
-[^:]*:30: Error: syntax error -- `vstrw.32 q0,r4'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r7'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r7'
-[^:]*:30: Error: syntax error -- `vstrw.32 q0,r7'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r8'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r8'
-[^:]*:30: Error: syntax error -- `vstrw.32 q0,r8'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r10'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r10'
-[^:]*:30: Error: syntax error -- `vstrw.32 q0,r10'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r12'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r12'
-[^:]*:30: Error: syntax error -- `vstrw.32 q0,r12'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q0,r14'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q0,r14'
-[^:]*:30: Error: syntax error -- `vstrw.32 q0,r14'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r0'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r0'
-[^:]*:30: Error: syntax error -- `vstrw.32 q1,r0'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r1'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r1'
-[^:]*:30: Error: syntax error -- `vstrw.32 q1,r1'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r2'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r2'
-[^:]*:30: Error: syntax error -- `vstrw.32 q1,r2'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r4'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r4'
-[^:]*:30: Error: syntax error -- `vstrw.32 q1,r4'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r7'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r7'
-[^:]*:30: Error: syntax error -- `vstrw.32 q1,r7'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r8'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r8'
-[^:]*:30: Error: syntax error -- `vstrw.32 q1,r8'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r10'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r10'
-[^:]*:30: Error: syntax error -- `vstrw.32 q1,r10'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r12'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r12'
-[^:]*:30: Error: syntax error -- `vstrw.32 q1,r12'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q1,r14'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q1,r14'
-[^:]*:30: Error: syntax error -- `vstrw.32 q1,r14'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r0'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r0'
-[^:]*:30: Error: syntax error -- `vstrw.32 q2,r0'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r1'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r1'
-[^:]*:30: Error: syntax error -- `vstrw.32 q2,r1'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r2'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r2'
-[^:]*:30: Error: syntax error -- `vstrw.32 q2,r2'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r4'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r4'
-[^:]*:30: Error: syntax error -- `vstrw.32 q2,r4'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r7'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r7'
-[^:]*:30: Error: syntax error -- `vstrw.32 q2,r7'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r8'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r8'
-[^:]*:30: Error: syntax error -- `vstrw.32 q2,r8'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r10'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r10'
-[^:]*:30: Error: syntax error -- `vstrw.32 q2,r10'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r12'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r12'
-[^:]*:30: Error: syntax error -- `vstrw.32 q2,r12'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q2,r14'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q2,r14'
-[^:]*:30: Error: syntax error -- `vstrw.32 q2,r14'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r0'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r0'
-[^:]*:30: Error: syntax error -- `vstrw.32 q4,r0'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r1'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r1'
-[^:]*:30: Error: syntax error -- `vstrw.32 q4,r1'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r2'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r2'
-[^:]*:30: Error: syntax error -- `vstrw.32 q4,r2'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r4'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r4'
-[^:]*:30: Error: syntax error -- `vstrw.32 q4,r4'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r7'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r7'
-[^:]*:30: Error: syntax error -- `vstrw.32 q4,r7'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r8'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r8'
-[^:]*:30: Error: syntax error -- `vstrw.32 q4,r8'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r10'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r10'
-[^:]*:30: Error: syntax error -- `vstrw.32 q4,r10'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r12'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r12'
-[^:]*:30: Error: syntax error -- `vstrw.32 q4,r12'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q4,r14'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q4,r14'
-[^:]*:30: Error: syntax error -- `vstrw.32 q4,r14'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r0'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r0'
-[^:]*:30: Error: syntax error -- `vstrw.32 q7,r0'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r1'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r1'
-[^:]*:30: Error: syntax error -- `vstrw.32 q7,r1'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r2'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r2'
-[^:]*:30: Error: syntax error -- `vstrw.32 q7,r2'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r4'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r4'
-[^:]*:30: Error: syntax error -- `vstrw.32 q7,r4'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r7'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r7'
-[^:]*:30: Error: syntax error -- `vstrw.32 q7,r7'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r8'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r8'
-[^:]*:30: Error: syntax error -- `vstrw.32 q7,r8'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r10'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r10'
-[^:]*:30: Error: syntax error -- `vstrw.32 q7,r10'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r12'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r12'
-[^:]*:30: Error: syntax error -- `vstrw.32 q7,r12'
-[^:]*:30: Error: syntax error -- `vldrw.s32 q7,r14'
-[^:]*:30: Error: syntax error -- `vldrw.u32 q7,r14'
-[^:]*:30: Error: syntax error -- `vstrw.32 q7,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q0,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q0,r0'
+[^:]*:9: Error: syntax error -- `vstrb.8 q0,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q0,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q0,r1'
+[^:]*:9: Error: syntax error -- `vstrb.8 q0,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q0,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q0,r2'
+[^:]*:9: Error: syntax error -- `vstrb.8 q0,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q0,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q0,r4'
+[^:]*:9: Error: syntax error -- `vstrb.8 q0,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q0,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q0,r7'
+[^:]*:9: Error: syntax error -- `vstrb.8 q0,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q0,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q0,r8'
+[^:]*:9: Error: syntax error -- `vstrb.8 q0,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q0,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q0,r10'
+[^:]*:9: Error: syntax error -- `vstrb.8 q0,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q0,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q0,r12'
+[^:]*:9: Error: syntax error -- `vstrb.8 q0,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q0,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q0,r14'
+[^:]*:9: Error: syntax error -- `vstrb.8 q0,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q1,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q1,r0'
+[^:]*:9: Error: syntax error -- `vstrb.8 q1,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q1,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q1,r1'
+[^:]*:9: Error: syntax error -- `vstrb.8 q1,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q1,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q1,r2'
+[^:]*:9: Error: syntax error -- `vstrb.8 q1,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q1,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q1,r4'
+[^:]*:9: Error: syntax error -- `vstrb.8 q1,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q1,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q1,r7'
+[^:]*:9: Error: syntax error -- `vstrb.8 q1,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q1,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q1,r8'
+[^:]*:9: Error: syntax error -- `vstrb.8 q1,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q1,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q1,r10'
+[^:]*:9: Error: syntax error -- `vstrb.8 q1,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q1,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q1,r12'
+[^:]*:9: Error: syntax error -- `vstrb.8 q1,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q1,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q1,r14'
+[^:]*:9: Error: syntax error -- `vstrb.8 q1,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q2,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q2,r0'
+[^:]*:9: Error: syntax error -- `vstrb.8 q2,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q2,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q2,r1'
+[^:]*:9: Error: syntax error -- `vstrb.8 q2,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q2,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q2,r2'
+[^:]*:9: Error: syntax error -- `vstrb.8 q2,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q2,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q2,r4'
+[^:]*:9: Error: syntax error -- `vstrb.8 q2,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q2,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q2,r7'
+[^:]*:9: Error: syntax error -- `vstrb.8 q2,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q2,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q2,r8'
+[^:]*:9: Error: syntax error -- `vstrb.8 q2,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q2,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q2,r10'
+[^:]*:9: Error: syntax error -- `vstrb.8 q2,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q2,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q2,r12'
+[^:]*:9: Error: syntax error -- `vstrb.8 q2,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q2,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q2,r14'
+[^:]*:9: Error: syntax error -- `vstrb.8 q2,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q4,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q4,r0'
+[^:]*:9: Error: syntax error -- `vstrb.8 q4,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q4,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q4,r1'
+[^:]*:9: Error: syntax error -- `vstrb.8 q4,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q4,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q4,r2'
+[^:]*:9: Error: syntax error -- `vstrb.8 q4,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q4,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q4,r4'
+[^:]*:9: Error: syntax error -- `vstrb.8 q4,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q4,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q4,r7'
+[^:]*:9: Error: syntax error -- `vstrb.8 q4,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q4,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q4,r8'
+[^:]*:9: Error: syntax error -- `vstrb.8 q4,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q4,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q4,r10'
+[^:]*:9: Error: syntax error -- `vstrb.8 q4,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q4,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q4,r12'
+[^:]*:9: Error: syntax error -- `vstrb.8 q4,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q4,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q4,r14'
+[^:]*:9: Error: syntax error -- `vstrb.8 q4,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q7,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q7,r0'
+[^:]*:9: Error: syntax error -- `vstrb.8 q7,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q7,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q7,r1'
+[^:]*:9: Error: syntax error -- `vstrb.8 q7,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q7,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q7,r2'
+[^:]*:9: Error: syntax error -- `vstrb.8 q7,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q7,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q7,r4'
+[^:]*:9: Error: syntax error -- `vstrb.8 q7,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q7,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q7,r7'
+[^:]*:9: Error: syntax error -- `vstrb.8 q7,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q7,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q7,r8'
+[^:]*:9: Error: syntax error -- `vstrb.8 q7,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q7,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q7,r10'
+[^:]*:9: Error: syntax error -- `vstrb.8 q7,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q7,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q7,r12'
+[^:]*:9: Error: syntax error -- `vstrb.8 q7,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s8 q7,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u8 q7,r14'
+[^:]*:9: Error: syntax error -- `vstrb.8 q7,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q0,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q0,r0'
+[^:]*:9: Error: syntax error -- `vstrb.16 q0,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q0,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q0,r1'
+[^:]*:9: Error: syntax error -- `vstrb.16 q0,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q0,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q0,r2'
+[^:]*:9: Error: syntax error -- `vstrb.16 q0,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q0,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q0,r4'
+[^:]*:9: Error: syntax error -- `vstrb.16 q0,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q0,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q0,r7'
+[^:]*:9: Error: syntax error -- `vstrb.16 q0,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q0,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q0,r8'
+[^:]*:9: Error: syntax error -- `vstrb.16 q0,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q0,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q0,r10'
+[^:]*:9: Error: syntax error -- `vstrb.16 q0,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q0,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q0,r12'
+[^:]*:9: Error: syntax error -- `vstrb.16 q0,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q0,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q0,r14'
+[^:]*:9: Error: syntax error -- `vstrb.16 q0,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q1,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q1,r0'
+[^:]*:9: Error: syntax error -- `vstrb.16 q1,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q1,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q1,r1'
+[^:]*:9: Error: syntax error -- `vstrb.16 q1,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q1,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q1,r2'
+[^:]*:9: Error: syntax error -- `vstrb.16 q1,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q1,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q1,r4'
+[^:]*:9: Error: syntax error -- `vstrb.16 q1,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q1,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q1,r7'
+[^:]*:9: Error: syntax error -- `vstrb.16 q1,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q1,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q1,r8'
+[^:]*:9: Error: syntax error -- `vstrb.16 q1,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q1,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q1,r10'
+[^:]*:9: Error: syntax error -- `vstrb.16 q1,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q1,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q1,r12'
+[^:]*:9: Error: syntax error -- `vstrb.16 q1,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q1,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q1,r14'
+[^:]*:9: Error: syntax error -- `vstrb.16 q1,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q2,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q2,r0'
+[^:]*:9: Error: syntax error -- `vstrb.16 q2,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q2,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q2,r1'
+[^:]*:9: Error: syntax error -- `vstrb.16 q2,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q2,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q2,r2'
+[^:]*:9: Error: syntax error -- `vstrb.16 q2,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q2,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q2,r4'
+[^:]*:9: Error: syntax error -- `vstrb.16 q2,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q2,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q2,r7'
+[^:]*:9: Error: syntax error -- `vstrb.16 q2,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q2,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q2,r8'
+[^:]*:9: Error: syntax error -- `vstrb.16 q2,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q2,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q2,r10'
+[^:]*:9: Error: syntax error -- `vstrb.16 q2,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q2,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q2,r12'
+[^:]*:9: Error: syntax error -- `vstrb.16 q2,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q2,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q2,r14'
+[^:]*:9: Error: syntax error -- `vstrb.16 q2,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q4,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q4,r0'
+[^:]*:9: Error: syntax error -- `vstrb.16 q4,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q4,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q4,r1'
+[^:]*:9: Error: syntax error -- `vstrb.16 q4,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q4,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q4,r2'
+[^:]*:9: Error: syntax error -- `vstrb.16 q4,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q4,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q4,r4'
+[^:]*:9: Error: syntax error -- `vstrb.16 q4,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q4,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q4,r7'
+[^:]*:9: Error: syntax error -- `vstrb.16 q4,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q4,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q4,r8'
+[^:]*:9: Error: syntax error -- `vstrb.16 q4,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q4,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q4,r10'
+[^:]*:9: Error: syntax error -- `vstrb.16 q4,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q4,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q4,r12'
+[^:]*:9: Error: syntax error -- `vstrb.16 q4,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q4,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q4,r14'
+[^:]*:9: Error: syntax error -- `vstrb.16 q4,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q7,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q7,r0'
+[^:]*:9: Error: syntax error -- `vstrb.16 q7,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q7,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q7,r1'
+[^:]*:9: Error: syntax error -- `vstrb.16 q7,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q7,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q7,r2'
+[^:]*:9: Error: syntax error -- `vstrb.16 q7,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q7,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q7,r4'
+[^:]*:9: Error: syntax error -- `vstrb.16 q7,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q7,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q7,r7'
+[^:]*:9: Error: syntax error -- `vstrb.16 q7,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q7,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q7,r8'
+[^:]*:9: Error: syntax error -- `vstrb.16 q7,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q7,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q7,r10'
+[^:]*:9: Error: syntax error -- `vstrb.16 q7,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q7,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q7,r12'
+[^:]*:9: Error: syntax error -- `vstrb.16 q7,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s16 q7,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u16 q7,r14'
+[^:]*:9: Error: syntax error -- `vstrb.16 q7,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q0,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q0,r0'
+[^:]*:9: Error: syntax error -- `vstrb.32 q0,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q0,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q0,r1'
+[^:]*:9: Error: syntax error -- `vstrb.32 q0,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q0,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q0,r2'
+[^:]*:9: Error: syntax error -- `vstrb.32 q0,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q0,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q0,r4'
+[^:]*:9: Error: syntax error -- `vstrb.32 q0,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q0,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q0,r7'
+[^:]*:9: Error: syntax error -- `vstrb.32 q0,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q0,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q0,r8'
+[^:]*:9: Error: syntax error -- `vstrb.32 q0,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q0,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q0,r10'
+[^:]*:9: Error: syntax error -- `vstrb.32 q0,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q0,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q0,r12'
+[^:]*:9: Error: syntax error -- `vstrb.32 q0,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q0,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q0,r14'
+[^:]*:9: Error: syntax error -- `vstrb.32 q0,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q1,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q1,r0'
+[^:]*:9: Error: syntax error -- `vstrb.32 q1,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q1,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q1,r1'
+[^:]*:9: Error: syntax error -- `vstrb.32 q1,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q1,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q1,r2'
+[^:]*:9: Error: syntax error -- `vstrb.32 q1,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q1,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q1,r4'
+[^:]*:9: Error: syntax error -- `vstrb.32 q1,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q1,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q1,r7'
+[^:]*:9: Error: syntax error -- `vstrb.32 q1,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q1,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q1,r8'
+[^:]*:9: Error: syntax error -- `vstrb.32 q1,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q1,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q1,r10'
+[^:]*:9: Error: syntax error -- `vstrb.32 q1,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q1,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q1,r12'
+[^:]*:9: Error: syntax error -- `vstrb.32 q1,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q1,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q1,r14'
+[^:]*:9: Error: syntax error -- `vstrb.32 q1,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q2,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q2,r0'
+[^:]*:9: Error: syntax error -- `vstrb.32 q2,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q2,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q2,r1'
+[^:]*:9: Error: syntax error -- `vstrb.32 q2,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q2,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q2,r2'
+[^:]*:9: Error: syntax error -- `vstrb.32 q2,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q2,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q2,r4'
+[^:]*:9: Error: syntax error -- `vstrb.32 q2,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q2,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q2,r7'
+[^:]*:9: Error: syntax error -- `vstrb.32 q2,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q2,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q2,r8'
+[^:]*:9: Error: syntax error -- `vstrb.32 q2,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q2,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q2,r10'
+[^:]*:9: Error: syntax error -- `vstrb.32 q2,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q2,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q2,r12'
+[^:]*:9: Error: syntax error -- `vstrb.32 q2,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q2,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q2,r14'
+[^:]*:9: Error: syntax error -- `vstrb.32 q2,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q4,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q4,r0'
+[^:]*:9: Error: syntax error -- `vstrb.32 q4,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q4,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q4,r1'
+[^:]*:9: Error: syntax error -- `vstrb.32 q4,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q4,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q4,r2'
+[^:]*:9: Error: syntax error -- `vstrb.32 q4,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q4,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q4,r4'
+[^:]*:9: Error: syntax error -- `vstrb.32 q4,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q4,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q4,r7'
+[^:]*:9: Error: syntax error -- `vstrb.32 q4,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q4,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q4,r8'
+[^:]*:9: Error: syntax error -- `vstrb.32 q4,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q4,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q4,r10'
+[^:]*:9: Error: syntax error -- `vstrb.32 q4,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q4,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q4,r12'
+[^:]*:9: Error: syntax error -- `vstrb.32 q4,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q4,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q4,r14'
+[^:]*:9: Error: syntax error -- `vstrb.32 q4,r14'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q7,r0'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q7,r0'
+[^:]*:9: Error: syntax error -- `vstrb.32 q7,r0'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q7,r1'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q7,r1'
+[^:]*:9: Error: syntax error -- `vstrb.32 q7,r1'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q7,r2'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q7,r2'
+[^:]*:9: Error: syntax error -- `vstrb.32 q7,r2'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q7,r4'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q7,r4'
+[^:]*:9: Error: syntax error -- `vstrb.32 q7,r4'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q7,r7'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q7,r7'
+[^:]*:9: Error: syntax error -- `vstrb.32 q7,r7'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q7,r8'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q7,r8'
+[^:]*:9: Error: syntax error -- `vstrb.32 q7,r8'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q7,r10'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q7,r10'
+[^:]*:9: Error: syntax error -- `vstrb.32 q7,r10'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q7,r12'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q7,r12'
+[^:]*:9: Error: syntax error -- `vstrb.32 q7,r12'
+[^:]*:7: Error: syntax error -- `vldrb.s32 q7,r14'
+[^:]*:8: Error: syntax error -- `vldrb.u32 q7,r14'
+[^:]*:9: Error: syntax error -- `vstrb.32 q7,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q0,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q0,r0'
+[^:]*:19: Error: syntax error -- `vstrh.16 q0,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q0,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q0,r1'
+[^:]*:19: Error: syntax error -- `vstrh.16 q0,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q0,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q0,r2'
+[^:]*:19: Error: syntax error -- `vstrh.16 q0,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q0,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q0,r4'
+[^:]*:19: Error: syntax error -- `vstrh.16 q0,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q0,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q0,r7'
+[^:]*:19: Error: syntax error -- `vstrh.16 q0,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q0,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q0,r8'
+[^:]*:19: Error: syntax error -- `vstrh.16 q0,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q0,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q0,r10'
+[^:]*:19: Error: syntax error -- `vstrh.16 q0,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q0,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q0,r12'
+[^:]*:19: Error: syntax error -- `vstrh.16 q0,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q0,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q0,r14'
+[^:]*:19: Error: syntax error -- `vstrh.16 q0,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q1,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q1,r0'
+[^:]*:19: Error: syntax error -- `vstrh.16 q1,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q1,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q1,r1'
+[^:]*:19: Error: syntax error -- `vstrh.16 q1,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q1,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q1,r2'
+[^:]*:19: Error: syntax error -- `vstrh.16 q1,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q1,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q1,r4'
+[^:]*:19: Error: syntax error -- `vstrh.16 q1,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q1,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q1,r7'
+[^:]*:19: Error: syntax error -- `vstrh.16 q1,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q1,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q1,r8'
+[^:]*:19: Error: syntax error -- `vstrh.16 q1,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q1,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q1,r10'
+[^:]*:19: Error: syntax error -- `vstrh.16 q1,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q1,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q1,r12'
+[^:]*:19: Error: syntax error -- `vstrh.16 q1,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q1,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q1,r14'
+[^:]*:19: Error: syntax error -- `vstrh.16 q1,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q2,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q2,r0'
+[^:]*:19: Error: syntax error -- `vstrh.16 q2,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q2,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q2,r1'
+[^:]*:19: Error: syntax error -- `vstrh.16 q2,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q2,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q2,r2'
+[^:]*:19: Error: syntax error -- `vstrh.16 q2,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q2,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q2,r4'
+[^:]*:19: Error: syntax error -- `vstrh.16 q2,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q2,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q2,r7'
+[^:]*:19: Error: syntax error -- `vstrh.16 q2,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q2,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q2,r8'
+[^:]*:19: Error: syntax error -- `vstrh.16 q2,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q2,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q2,r10'
+[^:]*:19: Error: syntax error -- `vstrh.16 q2,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q2,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q2,r12'
+[^:]*:19: Error: syntax error -- `vstrh.16 q2,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q2,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q2,r14'
+[^:]*:19: Error: syntax error -- `vstrh.16 q2,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q4,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q4,r0'
+[^:]*:19: Error: syntax error -- `vstrh.16 q4,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q4,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q4,r1'
+[^:]*:19: Error: syntax error -- `vstrh.16 q4,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q4,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q4,r2'
+[^:]*:19: Error: syntax error -- `vstrh.16 q4,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q4,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q4,r4'
+[^:]*:19: Error: syntax error -- `vstrh.16 q4,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q4,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q4,r7'
+[^:]*:19: Error: syntax error -- `vstrh.16 q4,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q4,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q4,r8'
+[^:]*:19: Error: syntax error -- `vstrh.16 q4,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q4,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q4,r10'
+[^:]*:19: Error: syntax error -- `vstrh.16 q4,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q4,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q4,r12'
+[^:]*:19: Error: syntax error -- `vstrh.16 q4,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q4,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q4,r14'
+[^:]*:19: Error: syntax error -- `vstrh.16 q4,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q7,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q7,r0'
+[^:]*:19: Error: syntax error -- `vstrh.16 q7,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q7,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q7,r1'
+[^:]*:19: Error: syntax error -- `vstrh.16 q7,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q7,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q7,r2'
+[^:]*:19: Error: syntax error -- `vstrh.16 q7,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q7,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q7,r4'
+[^:]*:19: Error: syntax error -- `vstrh.16 q7,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q7,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q7,r7'
+[^:]*:19: Error: syntax error -- `vstrh.16 q7,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q7,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q7,r8'
+[^:]*:19: Error: syntax error -- `vstrh.16 q7,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q7,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q7,r10'
+[^:]*:19: Error: syntax error -- `vstrh.16 q7,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q7,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q7,r12'
+[^:]*:19: Error: syntax error -- `vstrh.16 q7,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s16 q7,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u16 q7,r14'
+[^:]*:19: Error: syntax error -- `vstrh.16 q7,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q0,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q0,r0'
+[^:]*:19: Error: syntax error -- `vstrh.32 q0,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q0,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q0,r1'
+[^:]*:19: Error: syntax error -- `vstrh.32 q0,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q0,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q0,r2'
+[^:]*:19: Error: syntax error -- `vstrh.32 q0,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q0,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q0,r4'
+[^:]*:19: Error: syntax error -- `vstrh.32 q0,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q0,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q0,r7'
+[^:]*:19: Error: syntax error -- `vstrh.32 q0,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q0,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q0,r8'
+[^:]*:19: Error: syntax error -- `vstrh.32 q0,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q0,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q0,r10'
+[^:]*:19: Error: syntax error -- `vstrh.32 q0,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q0,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q0,r12'
+[^:]*:19: Error: syntax error -- `vstrh.32 q0,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q0,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q0,r14'
+[^:]*:19: Error: syntax error -- `vstrh.32 q0,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q1,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q1,r0'
+[^:]*:19: Error: syntax error -- `vstrh.32 q1,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q1,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q1,r1'
+[^:]*:19: Error: syntax error -- `vstrh.32 q1,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q1,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q1,r2'
+[^:]*:19: Error: syntax error -- `vstrh.32 q1,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q1,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q1,r4'
+[^:]*:19: Error: syntax error -- `vstrh.32 q1,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q1,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q1,r7'
+[^:]*:19: Error: syntax error -- `vstrh.32 q1,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q1,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q1,r8'
+[^:]*:19: Error: syntax error -- `vstrh.32 q1,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q1,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q1,r10'
+[^:]*:19: Error: syntax error -- `vstrh.32 q1,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q1,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q1,r12'
+[^:]*:19: Error: syntax error -- `vstrh.32 q1,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q1,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q1,r14'
+[^:]*:19: Error: syntax error -- `vstrh.32 q1,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q2,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q2,r0'
+[^:]*:19: Error: syntax error -- `vstrh.32 q2,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q2,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q2,r1'
+[^:]*:19: Error: syntax error -- `vstrh.32 q2,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q2,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q2,r2'
+[^:]*:19: Error: syntax error -- `vstrh.32 q2,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q2,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q2,r4'
+[^:]*:19: Error: syntax error -- `vstrh.32 q2,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q2,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q2,r7'
+[^:]*:19: Error: syntax error -- `vstrh.32 q2,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q2,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q2,r8'
+[^:]*:19: Error: syntax error -- `vstrh.32 q2,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q2,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q2,r10'
+[^:]*:19: Error: syntax error -- `vstrh.32 q2,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q2,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q2,r12'
+[^:]*:19: Error: syntax error -- `vstrh.32 q2,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q2,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q2,r14'
+[^:]*:19: Error: syntax error -- `vstrh.32 q2,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q4,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q4,r0'
+[^:]*:19: Error: syntax error -- `vstrh.32 q4,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q4,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q4,r1'
+[^:]*:19: Error: syntax error -- `vstrh.32 q4,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q4,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q4,r2'
+[^:]*:19: Error: syntax error -- `vstrh.32 q4,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q4,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q4,r4'
+[^:]*:19: Error: syntax error -- `vstrh.32 q4,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q4,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q4,r7'
+[^:]*:19: Error: syntax error -- `vstrh.32 q4,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q4,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q4,r8'
+[^:]*:19: Error: syntax error -- `vstrh.32 q4,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q4,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q4,r10'
+[^:]*:19: Error: syntax error -- `vstrh.32 q4,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q4,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q4,r12'
+[^:]*:19: Error: syntax error -- `vstrh.32 q4,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q4,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q4,r14'
+[^:]*:19: Error: syntax error -- `vstrh.32 q4,r14'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q7,r0'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q7,r0'
+[^:]*:19: Error: syntax error -- `vstrh.32 q7,r0'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q7,r1'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q7,r1'
+[^:]*:19: Error: syntax error -- `vstrh.32 q7,r1'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q7,r2'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q7,r2'
+[^:]*:19: Error: syntax error -- `vstrh.32 q7,r2'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q7,r4'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q7,r4'
+[^:]*:19: Error: syntax error -- `vstrh.32 q7,r4'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q7,r7'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q7,r7'
+[^:]*:19: Error: syntax error -- `vstrh.32 q7,r7'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q7,r8'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q7,r8'
+[^:]*:19: Error: syntax error -- `vstrh.32 q7,r8'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q7,r10'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q7,r10'
+[^:]*:19: Error: syntax error -- `vstrh.32 q7,r10'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q7,r12'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q7,r12'
+[^:]*:19: Error: syntax error -- `vstrh.32 q7,r12'
+[^:]*:17: Error: syntax error -- `vldrh.s32 q7,r14'
+[^:]*:18: Error: syntax error -- `vldrh.u32 q7,r14'
+[^:]*:19: Error: syntax error -- `vstrh.32 q7,r14'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q0,r0'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q0,r0'
+[^:]*:28: Error: syntax error -- `vstrw.32 q0,r0'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q0,r1'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q0,r1'
+[^:]*:28: Error: syntax error -- `vstrw.32 q0,r1'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q0,r2'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q0,r2'
+[^:]*:28: Error: syntax error -- `vstrw.32 q0,r2'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q0,r4'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q0,r4'
+[^:]*:28: Error: syntax error -- `vstrw.32 q0,r4'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q0,r7'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q0,r7'
+[^:]*:28: Error: syntax error -- `vstrw.32 q0,r7'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q0,r8'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q0,r8'
+[^:]*:28: Error: syntax error -- `vstrw.32 q0,r8'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q0,r10'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q0,r10'
+[^:]*:28: Error: syntax error -- `vstrw.32 q0,r10'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q0,r12'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q0,r12'
+[^:]*:28: Error: syntax error -- `vstrw.32 q0,r12'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q0,r14'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q0,r14'
+[^:]*:28: Error: syntax error -- `vstrw.32 q0,r14'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q1,r0'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q1,r0'
+[^:]*:28: Error: syntax error -- `vstrw.32 q1,r0'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q1,r1'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q1,r1'
+[^:]*:28: Error: syntax error -- `vstrw.32 q1,r1'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q1,r2'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q1,r2'
+[^:]*:28: Error: syntax error -- `vstrw.32 q1,r2'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q1,r4'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q1,r4'
+[^:]*:28: Error: syntax error -- `vstrw.32 q1,r4'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q1,r7'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q1,r7'
+[^:]*:28: Error: syntax error -- `vstrw.32 q1,r7'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q1,r8'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q1,r8'
+[^:]*:28: Error: syntax error -- `vstrw.32 q1,r8'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q1,r10'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q1,r10'
+[^:]*:28: Error: syntax error -- `vstrw.32 q1,r10'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q1,r12'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q1,r12'
+[^:]*:28: Error: syntax error -- `vstrw.32 q1,r12'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q1,r14'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q1,r14'
+[^:]*:28: Error: syntax error -- `vstrw.32 q1,r14'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q2,r0'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q2,r0'
+[^:]*:28: Error: syntax error -- `vstrw.32 q2,r0'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q2,r1'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q2,r1'
+[^:]*:28: Error: syntax error -- `vstrw.32 q2,r1'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q2,r2'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q2,r2'
+[^:]*:28: Error: syntax error -- `vstrw.32 q2,r2'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q2,r4'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q2,r4'
+[^:]*:28: Error: syntax error -- `vstrw.32 q2,r4'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q2,r7'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q2,r7'
+[^:]*:28: Error: syntax error -- `vstrw.32 q2,r7'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q2,r8'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q2,r8'
+[^:]*:28: Error: syntax error -- `vstrw.32 q2,r8'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q2,r10'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q2,r10'
+[^:]*:28: Error: syntax error -- `vstrw.32 q2,r10'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q2,r12'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q2,r12'
+[^:]*:28: Error: syntax error -- `vstrw.32 q2,r12'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q2,r14'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q2,r14'
+[^:]*:28: Error: syntax error -- `vstrw.32 q2,r14'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q4,r0'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q4,r0'
+[^:]*:28: Error: syntax error -- `vstrw.32 q4,r0'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q4,r1'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q4,r1'
+[^:]*:28: Error: syntax error -- `vstrw.32 q4,r1'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q4,r2'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q4,r2'
+[^:]*:28: Error: syntax error -- `vstrw.32 q4,r2'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q4,r4'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q4,r4'
+[^:]*:28: Error: syntax error -- `vstrw.32 q4,r4'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q4,r7'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q4,r7'
+[^:]*:28: Error: syntax error -- `vstrw.32 q4,r7'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q4,r8'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q4,r8'
+[^:]*:28: Error: syntax error -- `vstrw.32 q4,r8'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q4,r10'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q4,r10'
+[^:]*:28: Error: syntax error -- `vstrw.32 q4,r10'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q4,r12'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q4,r12'
+[^:]*:28: Error: syntax error -- `vstrw.32 q4,r12'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q4,r14'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q4,r14'
+[^:]*:28: Error: syntax error -- `vstrw.32 q4,r14'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q7,r0'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q7,r0'
+[^:]*:28: Error: syntax error -- `vstrw.32 q7,r0'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q7,r1'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q7,r1'
+[^:]*:28: Error: syntax error -- `vstrw.32 q7,r1'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q7,r2'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q7,r2'
+[^:]*:28: Error: syntax error -- `vstrw.32 q7,r2'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q7,r4'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q7,r4'
+[^:]*:28: Error: syntax error -- `vstrw.32 q7,r4'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q7,r7'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q7,r7'
+[^:]*:28: Error: syntax error -- `vstrw.32 q7,r7'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q7,r8'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q7,r8'
+[^:]*:28: Error: syntax error -- `vstrw.32 q7,r8'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q7,r10'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q7,r10'
+[^:]*:28: Error: syntax error -- `vstrw.32 q7,r10'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q7,r12'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q7,r12'
+[^:]*:28: Error: syntax error -- `vstrw.32 q7,r12'
+[^:]*:26: Error: syntax error -- `vldrw.s32 q7,r14'
+[^:]*:27: Error: syntax error -- `vldrw.u32 q7,r14'
+[^:]*:28: Error: syntax error -- `vstrw.32 q7,r14'
--- a/gas/testsuite/gas/arm/mve-vqdmlah-bad.l
+++ b/gas/testsuite/gas/arm/mve-vqdmlah-bad.l
@@ -1,7 +1,7 @@
 [^:]*: Assembler messages:
-[^:]*:4: Error: bad type in SIMD instruction -- `vqdmlah.u8 q1,q2,r0'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqrdmlah.u8 q3,q4,r5'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqdmlah.u16 q1,q2,r0'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqrdmlah.u16 q3,q4,r5'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqdmlah.u32 q1,q2,r0'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqrdmlah.u32 q3,q4,r5'
+[^:]*:2: Error: bad type in SIMD instruction -- `vqdmlah.u8 q1,q2,r0'
+[^:]*:3: Error: bad type in SIMD instruction -- `vqrdmlah.u8 q3,q4,r5'
+[^:]*:2: Error: bad type in SIMD instruction -- `vqdmlah.u16 q1,q2,r0'
+[^:]*:3: Error: bad type in SIMD instruction -- `vqrdmlah.u16 q3,q4,r5'
+[^:]*:2: Error: bad type in SIMD instruction -- `vqdmlah.u32 q1,q2,r0'
+[^:]*:3: Error: bad type in SIMD instruction -- `vqrdmlah.u32 q3,q4,r5'
--- a/gas/testsuite/gas/arm/mve-vqdmlash-bad.l
+++ b/gas/testsuite/gas/arm/mve-vqdmlash-bad.l
@@ -1,7 +1,7 @@
 [^:]*: Assembler messages:
-[^:]*:4: Error: bad type in SIMD instruction -- `vqdmlash.u8 q0,q2,r0'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqrdmlash.u8 q1,q3,r1'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqdmlash.u16 q0,q2,r0'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqrdmlash.u16 q1,q3,r1'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqdmlash.u32 q0,q2,r0'
-[^:]*:4: Error: bad type in SIMD instruction -- `vqrdmlash.u32 q1,q3,r1'
+[^:]*:2: Error: bad type in SIMD instruction -- `vqdmlash.u8 q0,q2,r0'
+[^:]*:3: Error: bad type in SIMD instruction -- `vqrdmlash.u8 q1,q3,r1'
+[^:]*:2: Error: bad type in SIMD instruction -- `vqdmlash.u16 q0,q2,r0'
+[^:]*:3: Error: bad type in SIMD instruction -- `vqrdmlash.u16 q1,q3,r1'
+[^:]*:2: Error: bad type in SIMD instruction -- `vqdmlash.u32 q0,q2,r0'
+[^:]*:3: Error: bad type in SIMD instruction -- `vqrdmlash.u32 q1,q3,r1'
--- a/gas/testsuite/gas/arm/mve-vrint-bad.l
+++ b/gas/testsuite/gas/arm/mve-vrint-bad.l
@@ -1,80 +1,80 @@
 [^:]*: Assembler messages:
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintn.i16 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintn.f64 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintx.i16 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintx.f64 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrinta.i16 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrinta.f64 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintz.i16 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintz.f64 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintm.i16 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintm.f64 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintp.i16 q0,q1'
-[^:]*:13: Error: bad type in SIMD instruction -- `vrintp.f64 q0,q1'
+[^:]*:11: Error: bad type in SIMD instruction -- `vrintn.i16 q0,q1'
+[^:]*:12: Error: bad type in SIMD instruction -- `vrintn.f64 q0,q1'
+[^:]*:11: Error: bad type in SIMD instruction -- `vrintx.i16 q0,q1'
+[^:]*:12: Error: bad type in SIMD instruction -- `vrintx.f64 q0,q1'
+[^:]*:11: Error: bad type in SIMD instruction -- `vrinta.i16 q0,q1'
+[^:]*:12: Error: bad type in SIMD instruction -- `vrinta.f64 q0,q1'
+[^:]*:11: Error: bad type in SIMD instruction -- `vrintz.i16 q0,q1'
+[^:]*:12: Error: bad type in SIMD instruction -- `vrintz.f64 q0,q1'
+[^:]*:11: Error: bad type in SIMD instruction -- `vrintm.i16 q0,q1'
+[^:]*:12: Error: bad type in SIMD instruction -- `vrintm.f64 q0,q1'
+[^:]*:11: Error: bad type in SIMD instruction -- `vrintp.i16 q0,q1'
+[^:]*:12: Error: bad type in SIMD instruction -- `vrintp.f64 q0,q1'
 [^:]*:14: Error: VFP single, double or Neon quad precision register expected -- `vrintr.f16 q0,q1'
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Error: syntax error -- `vrintneq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintneq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintneq.f16 q0,q1'
-[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintnt.f16 q0,q1'
-[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintn.f16 q0,q1'
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Error: syntax error -- `vrintxeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintxeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintxeq.f16 q0,q1'
-[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintxt.f16 q0,q1'
-[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintx.f16 q0,q1'
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Error: syntax error -- `vrintaeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintaeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintaeq.f16 q0,q1'
-[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintat.f16 q0,q1'
-[^:]*:25: Error: instruction missing MVE vector predication code -- `vrinta.f16 q0,q1'
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Error: syntax error -- `vrintzeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintzeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintzeq.f16 q0,q1'
-[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintzt.f16 q0,q1'
-[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintz.f16 q0,q1'
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Error: syntax error -- `vrintmeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintmeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintmeq.f16 q0,q1'
-[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintmt.f16 q0,q1'
-[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintm.f16 q0,q1'
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
-[^:]*:25: Error: syntax error -- `vrintpeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintpeq.f16 q0,q1'
-[^:]*:25: Error: syntax error -- `vrintpeq.f16 q0,q1'
-[^:]*:25: Error: vector predicated instruction should be in VPT/VPST block -- `vrintpt.f16 q0,q1'
-[^:]*:25: Error: instruction missing MVE vector predication code -- `vrintp.f16 q0,q1'
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:18: Error: syntax error -- `vrintneq.f16 q0,q1'
+[^:]*:19: Error: syntax error -- `vrintneq.f16 q0,q1'
+[^:]*:21: Error: syntax error -- `vrintneq.f16 q0,q1'
+[^:]*:22: Error: vector predicated instruction should be in VPT/VPST block -- `vrintnt.f16 q0,q1'
+[^:]*:24: Error: instruction missing MVE vector predication code -- `vrintn.f16 q0,q1'
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:18: Error: syntax error -- `vrintxeq.f16 q0,q1'
+[^:]*:19: Error: syntax error -- `vrintxeq.f16 q0,q1'
+[^:]*:21: Error: syntax error -- `vrintxeq.f16 q0,q1'
+[^:]*:22: Error: vector predicated instruction should be in VPT/VPST block -- `vrintxt.f16 q0,q1'
+[^:]*:24: Error: instruction missing MVE vector predication code -- `vrintx.f16 q0,q1'
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:18: Error: syntax error -- `vrintaeq.f16 q0,q1'
+[^:]*:19: Error: syntax error -- `vrintaeq.f16 q0,q1'
+[^:]*:21: Error: syntax error -- `vrintaeq.f16 q0,q1'
+[^:]*:22: Error: vector predicated instruction should be in VPT/VPST block -- `vrintat.f16 q0,q1'
+[^:]*:24: Error: instruction missing MVE vector predication code -- `vrinta.f16 q0,q1'
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:18: Error: syntax error -- `vrintzeq.f16 q0,q1'
+[^:]*:19: Error: syntax error -- `vrintzeq.f16 q0,q1'
+[^:]*:21: Error: syntax error -- `vrintzeq.f16 q0,q1'
+[^:]*:22: Error: vector predicated instruction should be in VPT/VPST block -- `vrintzt.f16 q0,q1'
+[^:]*:24: Error: instruction missing MVE vector predication code -- `vrintz.f16 q0,q1'
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:18: Error: syntax error -- `vrintmeq.f16 q0,q1'
+[^:]*:19: Error: syntax error -- `vrintmeq.f16 q0,q1'
+[^:]*:21: Error: syntax error -- `vrintmeq.f16 q0,q1'
+[^:]*:22: Error: vector predicated instruction should be in VPT/VPST block -- `vrintmt.f16 q0,q1'
+[^:]*:24: Error: instruction missing MVE vector predication code -- `vrintm.f16 q0,q1'
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:16: Warning: instruction is UNPREDICTABLE in an IT block
+[^:]*:18: Error: syntax error -- `vrintpeq.f16 q0,q1'
+[^:]*:19: Error: syntax error -- `vrintpeq.f16 q0,q1'
+[^:]*:21: Error: syntax error -- `vrintpeq.f16 q0,q1'
+[^:]*:22: Error: vector predicated instruction should be in VPT/VPST block -- `vrintpt.f16 q0,q1'
+[^:]*:24: Error: instruction missing MVE vector predication code -- `vrintp.f16 q0,q1'
--- a/gas/testsuite/gas/elf/dwarf-5-irp.d
+++ b/gas/testsuite/gas/elf/dwarf-5-irp.d
@@ -68,6 +68,20 @@ Raw dump of debug contents .*
 .*Advance PC by .*
 .*Extended opcode 1: End of Sequence
 
+.*Extended opcode 2: .*
+.*Advance Line by 41 to 42
+.*Copy
+.*Special opcode .* and Line by 1 to 43
+.*Advance PC by .*
+.*Extended opcode 1: End of Sequence
+
+.*Extended opcode 2: .*
+.*Advance Line by 41 to 42
+.*Copy
+.*Special opcode .* and Line by 1 to 43
+.*Advance PC by .*
+.*Extended opcode 1: End of Sequence
+
 
 Contents of the \.debug_aranges section:
 
@@ -84,6 +98,8 @@ Contents of the \.debug_aranges section:
     0+ [0-9a-f]+ ?
     0+ [0-9a-f]+ ?
     0+ [0-9a-f]+ ?
+    0+ [0-9a-f]+ ?
+    0+ [0-9a-f]+ ?
     0+ 0+ ?
 
 Contents of the \.debug_rnglists section:
@@ -92,6 +108,8 @@ Contents of the \.debug_rnglists section
     [0-9a-f]+ 0+ [0-9a-f]+ ?
     [0-9a-f]+ 0+ [0-9a-f]+ ?
     [0-9a-f]+ 0+ [0-9a-f]+ ?
+    [0-9a-f]+ 0+ [0-9a-f]+ ?
+    [0-9a-f]+ 0+ [0-9a-f]+ ?
     [0-9a-f]+ 0+ [0-9a-f]+ ?
     [0-9a-f]+ 0+ [0-9a-f]+ ?
     [0-9a-f]+ 0+ [0-9a-f]+ ?
--- a/gas/testsuite/gas/elf/dwarf-5-irp.s
+++ b/gas/testsuite/gas/elf/dwarf-5-irp.s
@@ -36,3 +36,9 @@ _start:
 	.nop
 	.nop
 	.endr
+
+	.irp n, ef, kl
+	.section .text.\n, "ax"
+	.nop
+	.nop
+	.endr
--- a/gas/testsuite/gas/elf/elf.exp
+++ b/gas/testsuite/gas/elf/elf.exp
@@ -311,6 +311,16 @@ if { [is_elf_format] } then {
     run_dump_test "dwarf-5-func" $dump_opts
     run_dump_test "dwarf-5-func-global" $dump_opts
     run_dump_test "dwarf-5-func-local" $dump_opts
+
+    # Exclude targets defining ONLY_STANDARD_ESCAPES. It's not clear how these
+    # are supposed to reference macro arguments in double-quoted strings.
+    if { ![istarget "avr-*-*"]
+	 && ![istarget "cris*-*-*"]
+	 && ![istarget "msp430-*-*"]
+	 && ![istarget "z80-*-*"] } then {
+	run_list_test line
+    }
+
     run_dump_test "pr25917"
     run_dump_test "bss"
     run_dump_test "bad-bss"
--- /dev/null
+++ b/gas/testsuite/gas/elf/line.l
@@ -0,0 +1,30 @@
+# This should match the warnings when assembling line.s.
+
+.*: Assembler messages:
+line\.s:[0-9]*18: Warning: \.warning .*
+line\.s:[0-9]*: Warning: m1/1: 123
+line\.s:[0-9]*: Warning: m1/2: 123
+line\.s:[0-9]*: Warning: m1/1: abc
+line\.s:[0-9]*: Warning: m1/2: abc
+line\.s:[0-9]*: Warning: m1/1: XYZ
+line\.s:[0-9]*: Warning: m1/2: XYZ
+line\.s:[0-9]*24: Warning: \.warning .*
+Line\.s:10: Warning: m2/1: 987
+Line\.s:12: Warning: m2/2: 987
+Line\.s:10: Warning: m2/1: zyx
+Line\.s:12: Warning: m2/2: zyx
+Line\.s:10: Warning: m2/1: CBA
+Line\.s:12: Warning: m2/2: CBA
+line\.s:[0-9]*29: Warning: \.warning .*
+line\.s:[0-9]*35: Warning: irp/1: 123
+line\.s:[0-9]*37: Warning: irp/2: 123
+line\.s:[0-9]*35: Warning: irp/1: 456
+line\.s:[0-9]*37: Warning: irp/2: 456
+line\.s:[0-9]*39: Warning: \.warning .*
+line\.s:[0-9]*45: Warning: rept/1
+line\.s:[0-9]*47: Warning: rept/2
+line\.s:[0-9]*45: Warning: rept/1
+line\.s:[0-9]*47: Warning: rept/2
+line\.s:[0-9]*45: Warning: rept/1
+line\.s:[0-9]*47: Warning: rept/2
+line\.s:[0-9]*49: Warning: \.warning .*
--- /dev/null
+++ b/gas/testsuite/gas/elf/line.s
@@ -0,0 +1,49 @@
+	.macro m1 args:vararg
+	.warning "m1/1: \args"
+	.nop
+	.warning "m1/2: \args"
+	.endm
+
+	.macro m2 args:vararg
+	.file "Line.s"
+	.line 9
+	.warning "m2/1: \args"
+	.nop
+	.warning "m2/2: \args"
+	.endm
+
+	.text
+
+# 10018 "line.s"
+	.warning
+
+macro:
+	m1 123
+	m1 abc
+	m1 XYZ
+	.warning
+
+	m2 987
+	m2 zyx
+	m2 CBA
+	.warning
+
+# 20032 "line.s"
+
+irp:
+	.irp arg, 123, 456
+	.warning "irp/1: \arg"
+	.nop
+	.warning "irp/2: \arg"
+	.endr
+	.warning
+
+# 30042 "line.s"
+
+rept:
+	.rept 3
+	.warning "rept/1"
+	.nop
+	.warning "rept/2"
+	.endr
+	.warning
--- a/gas/testsuite/gas/mmix/err-greg1.s
+++ b/gas/testsuite/gas/mmix/err-greg1.s
@@ -6,5 +6,5 @@
 
 Main SWYM 0
 	.rept 223
-	GREG
-	.endr	% { dg-error "too many GREG registers allocated" "" }
+	GREG	% { dg-error "too many GREG registers allocated" "" }
+	.endr


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 2/4] gas: further adjust file/line handling for .macro
  2022-04-04 15:56 [PATCH 0/4] gas: further line number related adjustments Jan Beulich
  2022-04-04 15:58 ` [PATCH 1/4] gas: further adjust file/line handling for .irp and alike Jan Beulich
@ 2022-04-04 15:59 ` Jan Beulich
  2022-04-04 16:01 ` [PATCH 3/4] gas: drop .appfile and .appline Jan Beulich
  2022-04-04 16:02 ` [PATCH 4/4] gas: new_logical_line{,_flags}() can return "void" Jan Beulich
  3 siblings, 0 replies; 5+ messages in thread
From: Jan Beulich @ 2022-04-04 15:59 UTC (permalink / raw)
  To: Binutils

Commit 7992631e8c0b ("gas/Dwarf: improve debug info generation from .irp
and alike blocks"), while dealing okay with actual assembly source files
not using .file/.line and alike outside but not inside of .macro, has
undue effects when the logical file/line pair was already overridden:
Line numbers would continuously increment while processing the expanded
macro, while the goal of the PR gas/16908 workaround is to keep the
expansion associated with the line invoking the macro. However, as soon
as enough state was overridden _inside_ the macro to cause as_where() to
no longer fall back top as_where_physical(), honor this by resuming the
bumping of the logical line number.

Note that from_sb_is_expansion's initializer was 1 for an unknown
reason. While renaming the variable and changing its type, also change
the initializer to "expanding_none", which would have been "0" in the
original code. Originally the initializer value itself wasn't ever used
anyway (requiring sb_index != -1), as it necessarily had changed in
input_scrub_include_sb() alongside setting sb_index to other than -1.

Strictly speaking input_scrub_insert_line() perhaps shouldn't use
expanding_none, yet none of the other enumerators fit there either. And
then strictly speaking that function probably shouldn't exist in the
first place. It's used only by tic54x.

--- a/gas/input-scrub.c
+++ b/gas/input-scrub.c
@@ -80,7 +80,7 @@ static size_t sb_index = -1;
 static sb from_sb;
 
 /* Should we do a conditional check on from_sb? */
-static int from_sb_is_expansion = 1;
+static enum expansion from_sb_expansion = expanding_none;
 
 /* The number of nested sb structures we have included.  */
 int macro_nest;
@@ -117,7 +117,7 @@ struct input_save {
   unsigned int        logical_input_line;
   size_t              sb_index;
   sb                  from_sb;
-  int                 from_sb_is_expansion; /* Should we do a conditional check?  */
+  enum expansion      from_sb_expansion; /* Should we do a conditional check?  */
   struct input_save * next_saved_file;	/* Chain of input_saves.  */
   char *              input_file_save;	/* Saved state of input routines.  */
   char *              saved_position;	/* Caller's saved position in buf.  */
@@ -167,7 +167,7 @@ input_scrub_push (char *saved_position)
   saved->logical_input_line = logical_input_line;
   saved->sb_index = sb_index;
   saved->from_sb = from_sb;
-  saved->from_sb_is_expansion = from_sb_is_expansion;
+  saved->from_sb_expansion = from_sb_expansion;
   memcpy (saved->save_source, save_source, sizeof (save_source));
   saved->next_saved_file = next_saved_file;
   saved->input_file_save = input_file_push ();
@@ -196,7 +196,7 @@ input_scrub_pop (struct input_save *save
   logical_input_line = saved->logical_input_line;
   sb_index = saved->sb_index;
   from_sb = saved->from_sb;
-  from_sb_is_expansion = saved->from_sb_is_expansion;
+  from_sb_expansion = saved->from_sb_expansion;
   partial_where = saved->partial_where;
   partial_size = saved->partial_size;
   next_saved_file = saved->next_saved_file;
@@ -252,6 +252,7 @@ char *
 input_scrub_include_file (const char *filename, char *position)
 {
   next_saved_file = input_scrub_push (position);
+  from_sb_expansion = expanding_none;
   return input_scrub_new_file (filename);
 }
 
@@ -259,7 +260,7 @@ input_scrub_include_file (const char *fi
    expanding a macro.  */
 
 void
-input_scrub_include_sb (sb *from, char *position, int is_expansion)
+input_scrub_include_sb (sb *from, char *position, enum expansion expansion)
 {
   int newline;
 
@@ -267,8 +268,10 @@ input_scrub_include_sb (sb *from, char *
     as_fatal (_("macros nested too deeply"));
   ++macro_nest;
 
+  gas_assert (expansion < expanding_nested);
+
 #ifdef md_macro_start
-  if (is_expansion)
+  if (expansion == expanding_macro)
     {
       md_macro_start ();
     }
@@ -279,7 +282,9 @@ input_scrub_include_sb (sb *from, char *
   /* Allocate sufficient space: from->len + optional newline.  */
   newline = from->len >= 1 && from->ptr[0] != '\n';
   sb_build (&from_sb, from->len + newline);
-  from_sb_is_expansion = is_expansion;
+  if (expansion == expanding_repeat && from_sb_expansion >= expanding_macro)
+    expansion = expanding_nested;
+  from_sb_expansion = expansion;
   if (newline)
     {
       /* Add the sentinel required by read.c.  */
@@ -317,7 +322,7 @@ input_scrub_next_buffer (char **bufp)
       if (sb_index >= from_sb.len)
 	{
 	  sb_kill (&from_sb);
-	  if (from_sb_is_expansion)
+	  if (from_sb_expansion == expanding_macro)
 	    {
 	      cond_finish_check (macro_nest);
 #ifdef md_macro_end
@@ -431,7 +436,10 @@ bump_line_counters (void)
   if (sb_index == (size_t) -1)
     ++physical_input_line;
 
-  if (logical_input_line != -1u)
+  /* PR gas/16908 workaround: Don't bump logical line numbers while
+     expanding macros, unless file (and maybe line; see as_where()) are
+     used inside the macro.  */
+  if (logical_input_line != -1u && from_sb_expansion < expanding_macro)
     ++logical_input_line;
 }
 \f
@@ -464,6 +472,10 @@ new_logical_line_flags (const char *fnam
     case 1 << 3:
       if (line_number < 0 || fname != NULL || next_saved_file == NULL)
 	abort ();
+      /* PR gas/16908 workaround: Ignore updates when nested inside a macro
+	 expansion.  */
+      if (from_sb_expansion == expanding_nested)
+	return 0;
       if (next_saved_file->logical_input_file)
 	fname = next_saved_file->logical_input_file;
       else
@@ -482,6 +494,15 @@ new_logical_line_flags (const char *fnam
       fname = NULL;
     }
 
+  /* When encountering file or line changes inside a macro, arrange for
+     bump_line_counters() to henceforth increment the logical line number
+     again, just like it does when expanding repeats.  See as_where() for
+     why changing file or line alone doesn't alter expansion mode.  */
+  if (from_sb_expansion == expanding_macro
+      && (logical_input_file != NULL || fname != NULL)
+      && logical_input_line != -1u)
+    from_sb_expansion = expanding_repeat;
+
   if (fname
       && (logical_input_file == NULL
 	  || filename_cmp (logical_input_file, fname)))
--- a/gas/read.c
+++ b/gas/read.c
@@ -658,7 +658,7 @@ try_macro (char term, const char *line)
 	as_bad ("%s", err);
       *input_line_pointer++ = term;
       input_scrub_include_sb (&out,
-			      input_line_pointer, 1);
+			      input_line_pointer, expanding_macro);
       sb_kill (&out);
       buffer_limit =
 	input_scrub_next_buffer (&input_line_pointer);
@@ -1411,7 +1411,7 @@ read_a_source_file (const char *name)
 		 numbers and possibly file names will be incorrect.  */
 	      sb_build (&sbuf, new_length);
 	      sb_add_buffer (&sbuf, new_buf, new_length);
-	      input_scrub_include_sb (&sbuf, input_line_pointer, 0);
+	      input_scrub_include_sb (&sbuf, input_line_pointer, expanding_none);
 	      sb_kill (&sbuf);
 	      buffer_limit = input_scrub_next_buffer (&input_line_pointer);
 	      free (new_buf);
@@ -2439,7 +2439,7 @@ s_irp (int irpc)
 
   sb_kill (&s);
 
-  input_scrub_include_sb (&out, input_line_pointer, 1);
+  input_scrub_include_sb (&out, input_line_pointer, expanding_repeat);
   sb_kill (&out);
   buffer_limit = input_scrub_next_buffer (&input_line_pointer);
 }
@@ -3140,7 +3140,7 @@ do_repeat (size_t count, const char *sta
 
   sb_kill (&one);
 
-  input_scrub_include_sb (&many, input_line_pointer, 1);
+  input_scrub_include_sb (&many, input_line_pointer, expanding_repeat);
   sb_kill (&many);
   buffer_limit = input_scrub_next_buffer (&input_line_pointer);
 }
@@ -3198,7 +3198,7 @@ do_repeat_with_expander (size_t count,
 
   sb_kill (&one);
 
-  input_scrub_include_sb (&many, input_line_pointer, 1);
+  input_scrub_include_sb (&many, input_line_pointer, expanding_repeat);
   sb_kill (&many);
   buffer_limit = input_scrub_next_buffer (&input_line_pointer);
 }
@@ -6311,7 +6311,7 @@ input_scrub_insert_line (const char *lin
   size_t len = strlen (line);
   sb_build (&newline, len);
   sb_add_buffer (&newline, line, len);
-  input_scrub_include_sb (&newline, input_line_pointer, 0);
+  input_scrub_include_sb (&newline, input_line_pointer, expanding_none);
   sb_kill (&newline);
   buffer_limit = input_scrub_next_buffer (&input_line_pointer);
 }
--- a/gas/sb.h
+++ b/gas/sb.h
@@ -65,6 +65,13 @@ extern size_t sb_skip_white (size_t, sb
 extern size_t sb_skip_comma (size_t, sb *);
 
 /* Actually in input-scrub.c.  */
-extern void input_scrub_include_sb (sb *, char *, int);
+enum expansion {
+  /* Note: Order matters!  */
+  expanding_none,
+  expanding_repeat,
+  expanding_macro,
+  expanding_nested, /* Only for internal use of input-scrub.c.  */
+};
+extern void input_scrub_include_sb (sb *, char *, enum expansion);
 
 #endif /* SB_H */
--- a/gas/testsuite/gas/elf/line.l
+++ b/gas/testsuite/gas/elf/line.l
@@ -2,12 +2,12 @@
 
 .*: Assembler messages:
 line\.s:[0-9]*18: Warning: \.warning .*
-line\.s:[0-9]*: Warning: m1/1: 123
-line\.s:[0-9]*: Warning: m1/2: 123
-line\.s:[0-9]*: Warning: m1/1: abc
-line\.s:[0-9]*: Warning: m1/2: abc
-line\.s:[0-9]*: Warning: m1/1: XYZ
-line\.s:[0-9]*: Warning: m1/2: XYZ
+line\.s:[0-9]*21: Warning: m1/1: 123
+line\.s:[0-9]*21: Warning: m1/2: 123
+line\.s:[0-9]*22: Warning: m1/1: abc
+line\.s:[0-9]*22: Warning: m1/2: abc
+line\.s:[0-9]*23: Warning: m1/1: XYZ
+line\.s:[0-9]*23: Warning: m1/2: XYZ
 line\.s:[0-9]*24: Warning: \.warning .*
 Line\.s:10: Warning: m2/1: 987
 Line\.s:12: Warning: m2/2: 987


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 3/4] gas: drop .appfile and .appline
  2022-04-04 15:56 [PATCH 0/4] gas: further line number related adjustments Jan Beulich
  2022-04-04 15:58 ` [PATCH 1/4] gas: further adjust file/line handling for .irp and alike Jan Beulich
  2022-04-04 15:59 ` [PATCH 2/4] gas: further adjust file/line handling for .macro Jan Beulich
@ 2022-04-04 16:01 ` Jan Beulich
  2022-04-04 16:02 ` [PATCH 4/4] gas: new_logical_line{,_flags}() can return "void" Jan Beulich
  3 siblings, 0 replies; 5+ messages in thread
From: Jan Beulich @ 2022-04-04 16:01 UTC (permalink / raw)
  To: Binutils
  Cc: Chenghua Xu, Geoff Keating, Alan Modra, Peter Bergner,
	Timothy Wall, Christian Groessler

These were used originally to represent "# <line> <file>" constructs
inserted by (typically) compilers when pre-processing. Quite some time
ago they were replaced by .linefile though. Since the original
directives were never documented, we ought to be able to remove support
for them. As a result in a number of case function parameter aren't used
anymore and can hence be dropped.
---
In this context I'd like to note that, unlike documented in
internals.texi, obj_app_file() hasn't been invoked for .linefile, which
feels like a regression from the switching from .appfile / .appline to
.linefile. Since it's been this way for many years, I guess trying to
correct this (if it wasn't intentional in the first place) would be at
risk of causing regressions.

--- a/gas/config/obj-coff.c
+++ b/gas/config/obj-coff.c
@@ -316,7 +316,7 @@ c_symbol_merge (symbolS *debug, symbolS
 }
 
 void
-c_dot_file_symbol (const char *filename, int appfile ATTRIBUTE_UNUSED)
+c_dot_file_symbol (const char *filename)
 {
   symbolS *symbolP;
 
@@ -447,11 +447,11 @@ coff_add_linesym (symbolS *sym)
 }
 
 static void
-obj_coff_ln (int appline)
+obj_coff_ln (int ignore ATTRIBUTE_UNUSED)
 {
   int l;
 
-  if (! appline && def_symbol_in_progress != NULL)
+  if (def_symbol_in_progress != NULL)
     {
       as_warn (_(".ln pseudo-op inside .def/.endef: ignored."));
       demand_empty_rest_of_line ();
@@ -460,9 +460,9 @@ obj_coff_ln (int appline)
 
   l = get_absolute_expression ();
 
-  /* If there is no lineno symbol, treat a .ln
-     directive as if it were a .appline directive.  */
-  if (appline || current_lineno_sym == NULL)
+  /* If there is no lineno symbol, treat a .ln directive
+     as if it were a (no longer existing) .appline one.  */
+  if (current_lineno_sym == NULL)
     new_logical_line ((char *) NULL, l - 1);
   else
     add_lineno (frag_now, frag_now_fix (), l);
@@ -473,8 +473,7 @@ obj_coff_ln (int appline)
 
     if (listing)
       {
-	if (! appline)
-	  l += coff_line_base - 1;
+	l += coff_line_base - 1;
 	listing_source_line (l);
       }
   }
@@ -1705,7 +1704,7 @@ coff_adjust_symtab (void)
 {
   if (symbol_rootP == NULL
       || S_GET_STORAGE_CLASS (symbol_rootP) != C_FILE)
-    c_dot_file_symbol ("fake", 0);
+    c_dot_file_symbol ("fake");
 }
 
 void
@@ -1849,7 +1848,6 @@ symbol_dump (void)
 const pseudo_typeS coff_pseudo_table[] =
 {
   {"ABORT", s_abort, 0},
-  {"appline", obj_coff_ln, 1},
   /* We accept the .bss directive for backward compatibility with
      earlier versions of gas.  */
   {"bss", obj_coff_bss, 0},
--- a/gas/config/obj-coff.h
+++ b/gas/config/obj-coff.h
@@ -249,7 +249,7 @@ extern int coff_n_line_nos;
 extern symbolS *coff_last_function;
 
 #define obj_emit_lineno(WHERE, LINE, FILE_START)	abort ()
-#define obj_app_file(name, app)      c_dot_file_symbol (name, app)
+#define obj_app_file(name)           c_dot_file_symbol (name)
 #define obj_frob_symbol(S,P) 	     coff_frob_symbol (S, & P)
 #define obj_frob_section(S)	     coff_frob_section (S)
 #define obj_frob_file_after_relocs() coff_frob_file_after_relocs ()
@@ -315,14 +315,12 @@ extern const pseudo_typeS coff_pseudo_ta
   SA_SET_SCN_NRELOC (section_symbol (sec), n)
 #endif
 
-#define obj_app_file(name, app) c_dot_file_symbol (name, app)
-
 extern int  S_SET_DATA_TYPE              (symbolS *, int);
 extern int  S_SET_STORAGE_CLASS          (symbolS *, int);
 extern int  S_GET_STORAGE_CLASS          (symbolS *);
 extern void SA_SET_SYM_ENDNDX            (symbolS *, symbolS *);
 extern void coff_add_linesym             (symbolS *);
-extern void c_dot_file_symbol            (const char *, int);
+extern void c_dot_file_symbol            (const char *);
 extern void coff_frob_symbol             (symbolS *, int *);
 extern void coff_adjust_symtab           (void);
 extern void coff_frob_section            (segT);
@@ -338,7 +336,6 @@ extern void pecoff_obj_clear_weak_hook
 extern void obj_coff_section             (int);
 extern segT obj_coff_add_segment         (const char *);
 extern void obj_coff_section             (int);
-extern void c_dot_file_symbol            (const char *, int);
 extern segT s_get_segment                (symbolS *);
 #ifndef tc_coff_symbol_emit_hook
 extern void tc_coff_symbol_emit_hook     (symbolS *);
--- a/gas/config/obj-ecoff.h
+++ b/gas/config/obj-ecoff.h
@@ -61,7 +61,7 @@ struct ecoff_sy_obj
 #define obj_symbol_clone_hook ecoff_symbol_clone_hook
 
 /* Record file switches in the ECOFF symbol table.  */
-#define obj_app_file(name, app) ecoff_new_file (name, app)
+#define obj_app_file(name) ecoff_new_file (name)
 
 /* At the moment we don't want to do any stabs processing in read.c.  */
 #define OBJ_PROCESS_STAB(seg, what, string, type, other, desc) \
--- a/gas/config/obj-elf.c
+++ b/gas/config/obj-elf.c
@@ -258,46 +258,36 @@ elf_sec_sym_ok_for_reloc (asection *sec)
 }
 
 void
-elf_file_symbol (const char *s, int appfile)
+elf_file_symbol (const char *s)
 {
   asymbol *bsym;
+  symbolS *sym = symbol_new (s, absolute_section, &zero_address_frag, 0);
+  size_t name_length = strlen (s);
 
-  if (!appfile
-      || symbol_rootP == NULL
-      || (bsym = symbol_get_bfdsym (symbol_rootP)) == NULL
-      || (bsym->flags & BSF_FILE) == 0)
+  if (name_length > strlen (S_GET_NAME (sym)))
     {
-      symbolS *sym;
-      size_t name_length;
+      obstack_grow (&notes, s, name_length + 1);
+      S_SET_NAME (sym, (const char *) obstack_finish (&notes));
+    }
+  else
+    strcpy ((char *) S_GET_NAME (sym), s);
 
-      sym = symbol_new (s, absolute_section, &zero_address_frag, 0);
+  symbol_get_bfdsym (sym)->flags |= BSF_FILE;
 
-      name_length = strlen (s);
-      if (name_length > strlen (S_GET_NAME (sym)))
-	{
-	  obstack_grow (&notes, s, name_length + 1);
-	  S_SET_NAME (sym, (const char *) obstack_finish (&notes));
-	}
-      else
-	strcpy ((char *) S_GET_NAME (sym), s);
-
-      symbol_get_bfdsym (sym)->flags |= BSF_FILE;
-
-      if (symbol_rootP != sym
-	  && ((bsym = symbol_get_bfdsym (symbol_rootP)) == NULL
-	      || (bsym->flags & BSF_FILE) == 0))
-	{
-	  symbol_remove (sym, &symbol_rootP, &symbol_lastP);
-	  symbol_insert (sym, symbol_rootP, &symbol_rootP, &symbol_lastP);
-	}
+  if (symbol_rootP != sym
+      && ((bsym = symbol_get_bfdsym (symbol_rootP)) == NULL
+	  || (bsym->flags & BSF_FILE) == 0))
+    {
+      symbol_remove (sym, &symbol_rootP, &symbol_lastP);
+      symbol_insert (sym, symbol_rootP, &symbol_rootP, &symbol_lastP);
+    }
 
 #ifdef DEBUG
-      verify_symbol_chain (symbol_rootP, symbol_lastP);
+  verify_symbol_chain (symbol_rootP, symbol_lastP);
 #endif
-    }
 
 #ifdef NEED_ECOFF_DEBUG
-  ecoff_new_file (s, appfile);
+  ecoff_new_file (s);
 #endif
 }
 
--- a/gas/config/obj-elf.h
+++ b/gas/config/obj-elf.h
@@ -180,7 +180,7 @@ extern void elf_frob_file_after_relocs (
 #ifndef obj_app_file
 #define obj_app_file elf_file_symbol
 #endif
-extern void elf_file_symbol (const char *, int);
+extern void elf_file_symbol (const char *);
 
 extern void obj_elf_section_change_hook (void);
 
--- a/gas/config/obj-multi.h
+++ b/gas/config/obj-multi.h
@@ -36,9 +36,9 @@
 	 ? (*this_format->begin) ()			\
 	 : (void) 0)
 
-#define obj_app_file(NAME, APPFILE)			\
+#define obj_app_file(NAME)				\
 	(this_format->app_file				\
-	 ? (*this_format->app_file) (NAME, APPFILE)	\
+	 ? (*this_format->app_file) (NAME)		\
 	 : (void) 0)
 
 #define obj_frob_symbol(S,P)				\
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -19723,7 +19723,7 @@ s_mips_file (int x ATTRIBUTE_UNUSED)
   if (ECOFF_DEBUGGING)
     {
       get_number ();
-      s_app_file (0);
+      s_file (0);
     }
   else
     {
@@ -19738,7 +19738,7 @@ s_mips_file (int x ATTRIBUTE_UNUSED)
       if (filename != NULL && ! first_file_directive)
 	{
 	  (void) new_logical_line (filename, -1);
-	  s_app_file_string (filename, 0);
+	  s_file_string (filename);
 	}
       first_file_directive = 1;
     }
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -5194,7 +5194,7 @@ ppc_file (int ignore ATTRIBUTE_UNUSED)
 	}
 
       /* Use coff dot_file creation and adjust auxiliary entries.  */
-      c_dot_file_symbol (sfname, 0);
+      c_dot_file_symbol (sfname);
       S_SET_NUMBER_AUXILIARY (symbol_rootP, auxnb);
       coffsym = coffsymbol (symbol_get_bfdsym (symbol_rootP));
       coffsym->native[1].u.auxent.x_file.x_ftype = XFT_FN;
--- a/gas/config/tc-tic54x.c
+++ b/gas/config/tc-tic54x.c
@@ -4966,7 +4966,7 @@ tic54x_adjust_symtab (void)
     {
       unsigned lineno;
       const char * filename = as_where (&lineno);
-      c_dot_file_symbol (filename, 0);
+      c_dot_file_symbol (filename);
     }
 }
 
--- a/gas/config/tc-z8k.c
+++ b/gas/config/tc-z8k.c
@@ -116,7 +116,7 @@ const pseudo_typeS md_pseudo_table[] = {
   {"segm"   , s_segm          , 1},
   {"unsegm" , s_segm          , 0},
   {"unseg"  , s_segm          , 0},
-  {"name"   , s_app_file      , 0},
+  {"name"   , s_file          , 0},
   {"global" , s_globl         , 0},
   {"wval"   , cons            , 2},
   {"lval"   , cons            , 4},
--- a/gas/dwarf2dbg.c
+++ b/gas/dwarf2dbg.c
@@ -1128,7 +1128,7 @@ dwarf2_emit_label (symbolS *label)
 }
 
 /* Handle two forms of .file directive:
-   - Pass .file "source.c" to s_app_file
+   - Pass .file "source.c" to s_file
    - Handle .file 1 "source.c" by adding an entry to the DWARF-2 file table
 
    If an entry is added to the file table, return a pointer to the filename.  */
@@ -1146,7 +1146,7 @@ dwarf2_directive_filename (void)
   SKIP_WHITESPACE ();
   if (*input_line_pointer == '"')
     {
-      s_app_file (0);
+      s_file (0);
       return NULL;
     }
 
--- a/gas/ecoff.c
+++ b/gas/ecoff.c
@@ -2312,7 +2312,7 @@ add_file (const char *file_name, int ind
    compiler output, only in hand coded assembler.  */
 
 void
-ecoff_new_file (const char *name, int appfile ATTRIBUTE_UNUSED)
+ecoff_new_file (const char *name)
 {
   if (cur_file_ptr != NULL && filename_cmp (cur_file_ptr->name, name) == 0)
     return;
--- a/gas/ecoff.h
+++ b/gas/ecoff.h
@@ -37,7 +37,7 @@ extern void ecoff_read_begin_hook (void)
 
 /* This function should be called when the assembler switches to a new
    file.  */
-extern void ecoff_new_file (const char *, int);
+extern void ecoff_new_file (const char *);
 
 /* This function should be called when a new symbol is created, by
    obj_symbol_new_hook.  */
--- a/gas/input-scrub.c
+++ b/gas/input-scrub.c
@@ -445,9 +445,7 @@ bump_line_counters (void)
 \f
 /* Tells us what the new logical line number and file are.
    If the line_number is -1, we don't change the current logical line
-   number.  If it is -2, we decrement the logical line number (this is
-   to support the .appfile pseudo-op inserted into the stream by
-   do_scrub_chars).
+   number.
    If fname is NULL, we don't change the current logical file name, unless
    bit 3 of flags is set.
    Returns nonzero if the filename actually changes.  */
--- a/gas/macro.c
+++ b/gas/macro.c
@@ -256,7 +256,7 @@ buffer_and_nest (const char *from, const
 
 	      ptr->ptr[ptr->len] = '\0';
 	      temp_ilp (ptr->ptr + i + 8);
-	      s_app_line (0);
+	      s_linefile (0);
 	      restore_ilp ();
 	      ptr->ptr[ptr->len] = saved_eol_char;
 	      ptr->len = line_start;
--- a/gas/obj.h
+++ b/gas/obj.h
@@ -42,7 +42,7 @@ struct format_ops {
   unsigned dfl_leading_underscore : 1;
   unsigned emit_section_symbols : 1;
   void (*begin) (void);
-  void (*app_file) (const char *, int);
+  void (*app_file) (const char *);
   void (*frob_symbol) (symbolS *, int *);
   void (*frob_file) (void);
   void (*frob_file_before_adjust) (void);
--- a/gas/read.c
+++ b/gas/read.c
@@ -412,10 +412,8 @@ static const pseudo_typeS potable[] = {
   {"exitm", s_mexit, 0},
 /* extend  */
   {"extern", s_ignore, 0},	/* We treat all undef as ext.  */
-  {"appfile", s_app_file, 1},
-  {"appline", s_app_line, 1},
   {"fail", s_fail, 0},
-  {"file", s_app_file, 0},
+  {"file", s_file, 0},
   {"fill", s_fill, 0},
   {"float", float_cons, 'f'},
   {"format", s_ignore, 0},
@@ -448,7 +446,7 @@ static const pseudo_typeS potable[] = {
   {"irepc", s_irp, 1},
   {"lcomm", s_lcomm, 0},
   {"lflags", s_ignore, 0},	/* Listing flags.  */
-  {"linefile", s_app_line, 0},
+  {"linefile", s_linefile, 0},
   {"linkonce", s_linkonce, 0},
   {"list", listing_list, 1},	/* Turn listing on.  */
   {"llen", listing_psize, 1},
@@ -2000,15 +1998,11 @@ s_data (int ignore ATTRIBUTE_UNUSED)
   demand_empty_rest_of_line ();
 }
 
-/* Handle the .appfile pseudo-op.  This is automatically generated by
-   do_scrub_chars when a preprocessor # line comment is seen with a
-   file name.  This default definition may be overridden by the object
-   or CPU specific pseudo-ops.  This function is also the default
-   definition for .file; the APPFILE argument is 1 for .appfile, 0 for
-   .file.  */
+/* Handle the .file pseudo-op.  This default definition may be overridden by
+   the object or CPU specific pseudo-ops.  */
 
 void
-s_app_file_string (char *file, int appfile ATTRIBUTE_UNUSED)
+s_file_string (char *file)
 {
 #ifdef LISTING
   if (listing)
@@ -2016,12 +2010,12 @@ s_app_file_string (char *file, int appfi
 #endif
   register_dependency (file);
 #ifdef obj_app_file
-  obj_app_file (file, appfile);
+  obj_app_file (file);
 #endif
 }
 
 void
-s_app_file (int appfile)
+s_file (int ignore ATTRIBUTE_UNUSED)
 {
   char *s;
   int length;
@@ -2029,8 +2023,7 @@ s_app_file (int appfile)
   /* Some assemblers tolerate immediately following '"'.  */
   if ((s = demand_copy_string (&length)) != 0)
     {
-      int may_omit
-	= (!new_logical_line_flags (s, -1, 1) && appfile);
+      new_logical_line_flags (s, -1, 1);
 
       /* In MRI mode, the preprocessor may have inserted an extraneous
 	 backquote.  */
@@ -2040,8 +2033,7 @@ s_app_file (int appfile)
 	++input_line_pointer;
 
       demand_empty_rest_of_line ();
-      if (!may_omit)
-	s_app_file_string (s, appfile);
+      s_file_string (s);
     }
 }
 
@@ -2058,21 +2050,19 @@ get_linefile_number (int *flag)
   return 1;
 }
 
-/* Handle the .appline pseudo-op.  This is automatically generated by
+/* Handle the .linefile pseudo-op.  This is automatically generated by
    do_scrub_chars when a preprocessor # line comment is seen.  This
    default definition may be overridden by the object or CPU specific
    pseudo-ops.  */
 
 void
-s_app_line (int appline)
+s_linefile (int ignore ATTRIBUTE_UNUSED)
 {
   char *file = NULL;
   int linenum, flags = 0;
 
   /* The given number is that of the next line.  */
-  if (appline)
-    linenum = get_absolute_expression ();
-  else if (!get_linefile_number (&linenum))
+  if (!get_linefile_number (&linenum))
     {
       ignore_rest_of_line ();
       return;
@@ -2094,65 +2084,60 @@ s_app_line (int appline)
     {
       int length = 0;
 
-      if (!appline)
-	{
-	  SKIP_WHITESPACE ();
-
-	  if (*input_line_pointer == '"')
-	    file = demand_copy_string (&length);
-	  else if (*input_line_pointer == '.')
-	    {
-	      /* buffer_and_nest() may insert this form.  */
-	      ++input_line_pointer;
-	      flags = 1 << 3;
-	    }
+      SKIP_WHITESPACE ();
 
-	  if (file)
-	    {
-	      int this_flag;
+      if (*input_line_pointer == '"')
+	file = demand_copy_string (&length);
+      else if (*input_line_pointer == '.')
+	{
+	  /* buffer_and_nest() may insert this form.  */
+	  ++input_line_pointer;
+	  flags = 1 << 3;
+	}
 
-	      while (get_linefile_number (&this_flag))
-		switch (this_flag)
-		  {
-		    /* From GCC's cpp documentation:
-		       1: start of a new file.
-		       2: returning to a file after having included
-			  another file.
-		       3: following text comes from a system header file.
-		       4: following text should be treated as extern "C".
-
-		       4 is nonsensical for the assembler; 3, we don't
-		       care about, so we ignore it just in case a
-		       system header file is included while
-		       preprocessing assembly.  So 1 and 2 are all we
-		       care about, and they are mutually incompatible.
-		       new_logical_line_flags() demands this.  */
-		  case 1:
-		  case 2:
-		    if (flags && flags != (1 << this_flag))
-		      as_warn (_("incompatible flag %i in line directive"),
-			       this_flag);
-		    else
-		      flags |= 1 << this_flag;
-		    break;
-
-		  case 3:
-		  case 4:
-		    /* We ignore these.  */
-		    break;
-
-		  default:
-		    as_warn (_("unsupported flag %i in line directive"),
-			     this_flag);
-		    break;
-		  }
+      if (file)
+	{
+	  int this_flag;
 
-	      if (!is_end_of_line[(unsigned char)*input_line_pointer])
-		file = 0;
-	    }
-	}
+	  while (get_linefile_number (&this_flag))
+	    switch (this_flag)
+	      {
+		/* From GCC's cpp documentation:
+		   1: start of a new file.
+		   2: returning to a file after having included another file.
+		   3: following text comes from a system header file.
+		   4: following text should be treated as extern "C".
+
+		   4 is nonsensical for the assembler; 3, we don't care about,
+		   so we ignore it just in case a system header file is
+		   included while preprocessing assembly.  So 1 and 2 are all
+		   we care about, and they are mutually incompatible.
+		   new_logical_line_flags() demands this.  */
+	      case 1:
+	      case 2:
+		if (flags && flags != (1 << this_flag))
+		  as_warn (_("incompatible flag %i in line directive"),
+			   this_flag);
+		else
+		  flags |= 1 << this_flag;
+		break;
+
+	      case 3:
+	      case 4:
+		/* We ignore these.  */
+		break;
+
+	      default:
+		as_warn (_("unsupported flag %i in line directive"),
+			 this_flag);
+		break;
+	      }
+
+	  if (!is_end_of_line[(unsigned char)*input_line_pointer])
+	    file = NULL;
+        }
 
-      if (appline || file || flags)
+      if (file || flags)
 	{
 	  linenum--;
 	  new_logical_line_flags (file, linenum, flags);
@@ -2162,7 +2147,7 @@ s_app_line (int appline)
 #endif
 	}
     }
-  if (appline || file || flags)
+  if (file || flags)
     demand_empty_rest_of_line ();
   else
     ignore_rest_of_line ();
--- a/gas/read.h
+++ b/gas/read.h
@@ -164,9 +164,9 @@ extern void bss_alloc (symbolS *, addres
 extern offsetT parse_align (int);
 extern symbolS *s_comm_internal (int, symbolS *(*) (int, symbolS *, addressT));
 extern symbolS *s_lcomm_internal (int, symbolS *, addressT);
-extern void s_app_file_string (char *, int);
-extern void s_app_file (int);
-extern void s_app_line (int);
+extern void s_file_string (char *);
+extern void s_file (int);
+extern void s_linefile (int);
 extern void s_bundle_align_mode (int);
 extern void s_bundle_lock (int);
 extern void s_bundle_unlock (int);


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 4/4] gas: new_logical_line{,_flags}() can return "void"
  2022-04-04 15:56 [PATCH 0/4] gas: further line number related adjustments Jan Beulich
                   ` (2 preceding siblings ...)
  2022-04-04 16:01 ` [PATCH 3/4] gas: drop .appfile and .appline Jan Beulich
@ 2022-04-04 16:02 ` Jan Beulich
  3 siblings, 0 replies; 5+ messages in thread
From: Jan Beulich @ 2022-04-04 16:02 UTC (permalink / raw)
  To: Binutils

With the sole user of the return value gone, convert the return type to
void. This in turn allows simplifying another construct, by moving it
slightly later in the function.

--- a/gas/as.h
+++ b/gas/as.h
@@ -473,8 +473,8 @@ void   do_scrub_begin (int);
 void   input_scrub_begin (void);
 void   input_scrub_close (void);
 void   input_scrub_end (void);
-int    new_logical_line (const char *, int);
-int    new_logical_line_flags (const char *, int, int);
+void   new_logical_line (const char *, int);
+void   new_logical_line_flags (const char *, int, int);
 void   subsegs_begin (void);
 void   subseg_change (segT, int);
 segT   subseg_new (const char *, subsegT);
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -19737,7 +19737,7 @@ s_mips_file (int x ATTRIBUTE_UNUSED)
          after 3.1 in order to support DWARF-2 on MIPS.  */
       if (filename != NULL && ! first_file_directive)
 	{
-	  (void) new_logical_line (filename, -1);
+	  new_logical_line (filename, -1);
 	  s_file_string (filename);
 	}
       first_file_directive = 1;
--- a/gas/input-scrub.c
+++ b/gas/input-scrub.c
@@ -450,7 +450,7 @@ bump_line_counters (void)
    bit 3 of flags is set.
    Returns nonzero if the filename actually changes.  */
 
-int
+void
 new_logical_line_flags (const char *fname, /* DON'T destroy it!  We point to it!  */
 			int line_number,
 			int flags)
@@ -473,7 +473,7 @@ new_logical_line_flags (const char *fnam
       /* PR gas/16908 workaround: Ignore updates when nested inside a macro
 	 expansion.  */
       if (from_sb_expansion == expanding_nested)
-	return 0;
+	return;
       if (next_saved_file->logical_input_file)
 	fname = next_saved_file->logical_input_file;
       else
@@ -492,30 +492,25 @@ new_logical_line_flags (const char *fnam
       fname = NULL;
     }
 
+  if (fname
+      && (logical_input_file == NULL
+	  || filename_cmp (logical_input_file, fname)))
+    logical_input_file = fname;
+
   /* When encountering file or line changes inside a macro, arrange for
      bump_line_counters() to henceforth increment the logical line number
      again, just like it does when expanding repeats.  See as_where() for
      why changing file or line alone doesn't alter expansion mode.  */
   if (from_sb_expansion == expanding_macro
-      && (logical_input_file != NULL || fname != NULL)
+      && logical_input_file != NULL
       && logical_input_line != -1u)
     from_sb_expansion = expanding_repeat;
-
-  if (fname
-      && (logical_input_file == NULL
-	  || filename_cmp (logical_input_file, fname)))
-    {
-      logical_input_file = fname;
-      return 1;
-    }
-  else
-    return 0;
 }
 
-int
+void
 new_logical_line (const char *fname, int line_number)
 {
-  return new_logical_line_flags (fname, line_number, 0);
+  new_logical_line_flags (fname, line_number, 0);
 }
 
 \f


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2022-04-04 16:02 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-04 15:56 [PATCH 0/4] gas: further line number related adjustments Jan Beulich
2022-04-04 15:58 ` [PATCH 1/4] gas: further adjust file/line handling for .irp and alike Jan Beulich
2022-04-04 15:59 ` [PATCH 2/4] gas: further adjust file/line handling for .macro Jan Beulich
2022-04-04 16:01 ` [PATCH 3/4] gas: drop .appfile and .appline Jan Beulich
2022-04-04 16:02 ` [PATCH 4/4] gas: new_logical_line{,_flags}() can return "void" Jan Beulich

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