Re: [PATCH] Support {evex} pseudo prefix for decode evex promoted insns without egpr32.

[Jan Beulich <jbeulich@suse.com>]

On 20.03.2024 14:12, Cui, Lili wrote:
>> On 06.03.2024 10:58, Cui, Lili wrote:
>>> --- /dev/null
>>> +++ b/gas/testsuite/gas/i386/noreg64-evex.s
>>
>> This separate test, not directly fitting with the patch title, wants mentioning in
>> the patch description.
>>
> 
> Ok.
> 
>>> @@ -0,0 +1,67 @@
>>> +# Check 64-bit insns not sizeable through register operands with evex
>>> +	.text
>>> +	{evex} adc	$1, (%rax)
>>> +	{evex} adc	$0x89, (%rax)
>>> +	{evex} adc	$0x1234, (%rax)
>>> +	{evex} adc	$0x12345678, (%rax)
>>> +	{evex} add	$1, (%rax)
>>> +	{evex} add	$0x89, (%rax)
>>> +	{evex} add	$0x1234, (%rax)
>>> +	{evex} add	$0x12345678, (%rax)
>>> +	{evex} and	$1, (%rax)
>>> +	{evex} and	$0x89, (%rax)
>>> +	{evex} and	$0x1234, (%rax)
>>> +	{evex} and	$0x12345678, (%rax)
>>> +	{evex} crc32	(%rax), %eax
>>
>> noreg64.s tests %rax as a destination separately, for a reason.
> 
> I don't know the reason why noreg64.s uses %rax, so it just follows the previous style. Do you know why? Is it not necessary to keep using %rax in the current test file?

It's unclear whether your question is specific to this one line/insn or more
generic. Since my remark was specific to CRC32, I'll assume your question is,
too. In which case: The non-64-bit and 64-bit forms of CRC32 use distinct
insn templates. Both want testing. Hence why two insn forms are needed here.

>>> --- /dev/null
>>> +++ b/gas/testsuite/gas/i386/x86-64-apx_f-evex.s
>>> @@ -0,0 +1,1192 @@
>>> +# Check 64bit APX_F instructions with evex pseudo prefix
>>> +
>>> +	{evex}	imul	%r15
>>> +	{evex}	imul	%r15,%r15
>>> +	{evex}	imul	%r15d
>>> +	{evex}	imul	%r15d,%edx
>>> +	{evex}	imul	%r15w
>>> +	{evex}	imul	%r15w,%ax
>>> +	{evex}	imul	%r8b
>>> +	{evex}	imulb	0x123(%r8,%rax,4)
>>> +	{evex}	imulw	0x123(%r8,%rax,4)
>>> +	{evex}	imull	0x123(%r8,%rax,4)
>>> +	{evex}	imul	0x123(%r8,%rax,4),%r15
>>> +	{evex}	imul	0x123(%r8,%rax,4),%r15d
>>> +	{evex}	imul	0x123(%r8,%rax,4),%r15w
>>> +	{evex}	imulq	0x123(%r8,%rax,4)
>>> +	{evex}	imul	$0x7b, %dx, %ax
>>> +	{evex}	imul	$0x7b, %ecx, %edx
>>> +	{evex}	imul	$0x7b, %r9, %r15
>>> +	{evex}	imul	$0x7b, 291(%r8, %rax, 4), %dx
>>> +	{evex}	imul	$0x7b, 291(%r8, %rax, 4), %ecx
>>> +	{evex}	imul	$0x7b, 291(%r8, %rax, 4), %r9
>>> +	{evex}	imul	$0xff90, %dx, %ax
>>> +	{evex}	imul	$0xff90, %ecx, %edx
>>> +	{evex}	imul	$0xff90, %r9, %r15
>>> +	{evex}	imul	$0xff90, 291(%r8, %rax, 4), %dx
>>> +	{evex}	imul	$0xff90, 291(%r8, %rax, 4), %ecx
>>> +	{evex}	imul	$0xff90, 291(%r8, %rax, 4), %r9
>>
>> Also covering the 2-operand forms of these (srcreg == dstreg) would seem
>> desirable.
> 
> I'm a little confused here, do you suggest adding such a testcase?
> 
> {evex}	imul	$0x7b, %r9, %r9

That's still 3 operands. What I mean is

    {evex} imul $0x7b, %r9

, again for the reason of that being covered by a separate insn template.

Jan