RE: [PATCH] Support {evex} pseudo prefix for decode evex promoted insns without egpr32.

["Cui, Lili" <lili.cui@intel.com>]

> >>> --- /dev/null
> >>> +++ b/gas/testsuite/gas/i386/x86-64-apx_f-evex.s
> >>> @@ -0,0 +1,1192 @@
> >>> +# Check 64bit APX_F instructions with evex pseudo prefix
> >>> +
> >>> +	{evex}	imul	%r15
> >>> +	{evex}	imul	%r15,%r15
> >>> +	{evex}	imul	%r15d
> >>> +	{evex}	imul	%r15d,%edx
> >>> +	{evex}	imul	%r15w
> >>> +	{evex}	imul	%r15w,%ax
> >>> +	{evex}	imul	%r8b
> >>> +	{evex}	imulb	0x123(%r8,%rax,4)
> >>> +	{evex}	imulw	0x123(%r8,%rax,4)
> >>> +	{evex}	imull	0x123(%r8,%rax,4)
> >>> +	{evex}	imul	0x123(%r8,%rax,4),%r15
> >>> +	{evex}	imul	0x123(%r8,%rax,4),%r15d
> >>> +	{evex}	imul	0x123(%r8,%rax,4),%r15w
> >>> +	{evex}	imulq	0x123(%r8,%rax,4)
> >>> +	{evex}	imul	$0x7b, %dx, %ax
> >>> +	{evex}	imul	$0x7b, %ecx, %edx
> >>> +	{evex}	imul	$0x7b, %r9, %r15
> >>> +	{evex}	imul	$0x7b, 291(%r8, %rax, 4), %dx
> >>> +	{evex}	imul	$0x7b, 291(%r8, %rax, 4), %ecx
> >>> +	{evex}	imul	$0x7b, 291(%r8, %rax, 4), %r9
> >>> +	{evex}	imul	$0xff90, %dx, %ax
> >>> +	{evex}	imul	$0xff90, %ecx, %edx
> >>> +	{evex}	imul	$0xff90, %r9, %r15
> >>> +	{evex}	imul	$0xff90, 291(%r8, %rax, 4), %dx
> >>> +	{evex}	imul	$0xff90, 291(%r8, %rax, 4), %ecx
> >>> +	{evex}	imul	$0xff90, 291(%r8, %rax, 4), %r9
> >>
> >> Also covering the 2-operand forms of these (srcreg == dstreg) would
> >> seem desirable.
> >
> > I'm a little confused here, do you suggest adding such a testcase?
> >
> > {evex}	imul	$0x7b, %r9, %r9
> 
> That's still 3 operands. What I mean is
> 
>     {evex} imul $0x7b, %r9
> 
> , again for the reason of that being covered by a separate insn template.
> 
> Jan

Oh, I see why, I didn't promote the 2-operand form of imul in the nf patch, which means we also need to enable ZU for them as well.

// imul with 2 operands mimics imul with 3 by putting the register in
// both i.rm.reg & i.rm.regmem fields.  RegKludge enables this
// transformation.
imul, 0x6b, i186, Modrm|No_bSuf|No_sSuf|RegKludge, { Imm8S, Reg16|Reg32|Reg64 }
imul, 0x69, i186, Modrm|No_bSuf|No_sSuf|RegKludge, { Imm16|Imm32|Imm32S, Reg16|Reg32|Reg64 }


Thanks,
Lili.