Re: [RFC PATCH] ld/emulparams: elf32lriscv-defs: Add support tune the text segment start address

[Andrew Waterman <andrew@sifive.com>]

I would like to clarify for the record that the purpose of this patch
has little to do with tuning, as that suggests a performance matter
rather than a functional one.  This is a workaround for incompliant
behavior in a processor on the chip that Lad mentioned.

I have no technical objections to this patch, but I think it's
important that we be forthright about our intent.


On Fri, Dec 16, 2022 at 1:43 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@bp.renesas.com> wrote:
>
> On the RISC-V architecture the TEXT_START_ADDR defaults to 0x10000. On
> some RISC-V platforms we want to set this offset to something else. So
> this patch provides a way to tune the text segment start address.
> elf32lriscv-defs.sh now checks for DEFAULT_TEXT_START_ADDR variable and
> if being set it overrides TEXT_START_ADDR to the value set by
> DEFAULT_TEXT_START_ADDR or else defaults to 0x10000.
>
> Renesas RZ/Five RISC-V SoC has Instruction local memory and Data local
> memory (ILM & DLM) which maps between region 0x30000 - 0x4FFFF. When the
> virtual address falls in this range the MMU doesn't trigger a page
> fault and assumes the virtual address as physical address and causes
> undesired behaviours of statically applications/libraries. Hence introduce
> an option to tune the TEXT_START_ADDR.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> Hi All,
>
> This patch is inspired from the current ld/emulparams/nds32elf_linux.sh file
> where similar approach is being used and DEFAULT_TEXT_START_ADDR variable is
> checked to adjust the TEXT_START_ADDR for the platform.
>
> I am not sure if this is the right approach the above issue has been discussed
> on the ML [0].
>
> [0] https://sourceware.org/pipermail/binutils/2022-November/124813.html
>
> Cheers,
> Prabhakar
> ---
>  ld/emulparams/elf32lriscv-defs.sh | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/ld/emulparams/elf32lriscv-defs.sh b/ld/emulparams/elf32lriscv-defs.sh
> index b823cedacab..026aef4714b 100644
> --- a/ld/emulparams/elf32lriscv-defs.sh
> +++ b/ld/emulparams/elf32lriscv-defs.sh
> @@ -27,7 +27,11 @@ case "$target" in
>  esac
>
>  IREL_IN_PLT=
> -TEXT_START_ADDR=0x10000
> +if [ -z ${DEFAULT_TEXT_START_ADDR+x} ]; then
> +    TEXT_START_ADDR=0x10000
> +else
> +    TEXT_START_ADDR=$DEFAULT_TEXT_START_ADDR
> +fi
>  MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
>  COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
>
> --
> 2.17.1
>