* [PATCH] x86: generalize gas documentation for disabling of ISA extensions
@ 2022-10-17 8:30 Jan Beulich
2022-10-17 22:28 ` H.J. Lu
0 siblings, 1 reply; 2+ messages in thread
From: Jan Beulich @ 2022-10-17 8:30 UTC (permalink / raw)
To: Binutils; +Cc: H.J. Lu
As of commit ae89daecb132 ("x86: generalize disabling of sub-
architectures") there's no arbitrary subset of ISAs which can also be
disabled. This should have been reflected in documentation right away.
Since I failed to do so, correct this now.
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -137,16 +137,9 @@ accept various extension mnemonics. For
@code{287},
@code{387},
@code{687},
-@code{no87},
-@code{no287},
-@code{no387},
-@code{no687},
@code{cmov},
-@code{nocmov},
@code{fxsr},
-@code{nofxsr},
@code{mmx},
-@code{nommx},
@code{sse},
@code{sse2},
@code{sse3},
@@ -155,18 +148,8 @@ accept various extension mnemonics. For
@code{sse4.1},
@code{sse4.2},
@code{sse4},
-@code{nosse},
-@code{nosse2},
-@code{nosse3},
-@code{nosse4a},
-@code{nossse3},
-@code{nosse4.1},
-@code{nosse4.2},
-@code{nosse4},
@code{avx},
@code{avx2},
-@code{noavx},
-@code{noavx2},
@code{adx},
@code{rdseed},
@code{prfchw},
@@ -189,9 +172,7 @@ accept various extension mnemonics. For
@code{serialize},
@code{tsxldtrk},
@code{kl},
-@code{nokl},
@code{widekl},
-@code{nowidekl},
@code{hreset},
@code{avx512f},
@code{avx512cd},
@@ -213,37 +194,9 @@ accept various extension mnemonics. For
@code{avx512_bf16},
@code{avx_vnni},
@code{avx512_fp16},
-@code{noavx512f},
-@code{noavx512cd},
-@code{noavx512er},
-@code{noavx512pf},
-@code{noavx512vl},
-@code{noavx512bw},
-@code{noavx512dq},
-@code{noavx512ifma},
-@code{noavx512vbmi},
-@code{noavx512_4fmaps},
-@code{noavx512_4vnniw},
-@code{noavx512_vpopcntdq},
-@code{noavx512_vbmi2},
-@code{noavx512_vnni},
-@code{noavx512_bitalg},
-@code{noavx512_vp2intersect},
-@code{notdx},
-@code{noavx512_bf16},
-@code{noavx_vnni},
-@code{noavx512_fp16},
-@code{noenqcmd},
-@code{noserialize},
-@code{notsxldtrk},
@code{amx_int8},
-@code{noamx_int8},
@code{amx_bf16},
-@code{noamx_bf16},
@code{amx_tile},
-@code{noamx_tile},
-@code{nouintr},
-@code{nohreset},
@code{vmx},
@code{vmfunc},
@code{smx},
@@ -291,8 +244,8 @@ accept various extension mnemonics. For
@code{tlbsync},
@code{svme} and
@code{padlock}.
-Note that rather than extending a basic instruction set, the extension
-mnemonics starting with @code{no} revoke the respective functionality.
+Note that these extension mnemonics can be prefixed with @code{no} to revoke
+the respective (and any dependent) functionality.
When the @code{.arch} directive is used with @option{-march}, the
@code{.arch} directive will take precedent.
@@ -1559,6 +1512,9 @@ conditional jumps will be promoted when
sequence consisting of a conditional jump of the opposite sense around
an unconditional jump to the target.
+Note that the sub-architecture specifiers (starting with a dot) can be prefixed
+with @code{no} to revoke the respective (and any dependent) functionality.
+
Following the CPU architecture (but not a sub-architecture, which are those
starting with a dot), you may specify @samp{jumps} or @samp{nojumps} to
control automatic promotion of conditional jumps. @samp{jumps} is the
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] x86: generalize gas documentation for disabling of ISA extensions
2022-10-17 8:30 [PATCH] x86: generalize gas documentation for disabling of ISA extensions Jan Beulich
@ 2022-10-17 22:28 ` H.J. Lu
0 siblings, 0 replies; 2+ messages in thread
From: H.J. Lu @ 2022-10-17 22:28 UTC (permalink / raw)
To: Jan Beulich; +Cc: Binutils
On Mon, Oct 17, 2022 at 1:30 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> As of commit ae89daecb132 ("x86: generalize disabling of sub-
> architectures") there's no arbitrary subset of ISAs which can also be
> disabled. This should have been reflected in documentation right away.
> Since I failed to do so, correct this now.
>
> --- a/gas/doc/c-i386.texi
> +++ b/gas/doc/c-i386.texi
> @@ -137,16 +137,9 @@ accept various extension mnemonics. For
> @code{287},
> @code{387},
> @code{687},
> -@code{no87},
> -@code{no287},
> -@code{no387},
> -@code{no687},
> @code{cmov},
> -@code{nocmov},
> @code{fxsr},
> -@code{nofxsr},
> @code{mmx},
> -@code{nommx},
> @code{sse},
> @code{sse2},
> @code{sse3},
> @@ -155,18 +148,8 @@ accept various extension mnemonics. For
> @code{sse4.1},
> @code{sse4.2},
> @code{sse4},
> -@code{nosse},
> -@code{nosse2},
> -@code{nosse3},
> -@code{nosse4a},
> -@code{nossse3},
> -@code{nosse4.1},
> -@code{nosse4.2},
> -@code{nosse4},
> @code{avx},
> @code{avx2},
> -@code{noavx},
> -@code{noavx2},
> @code{adx},
> @code{rdseed},
> @code{prfchw},
> @@ -189,9 +172,7 @@ accept various extension mnemonics. For
> @code{serialize},
> @code{tsxldtrk},
> @code{kl},
> -@code{nokl},
> @code{widekl},
> -@code{nowidekl},
> @code{hreset},
> @code{avx512f},
> @code{avx512cd},
> @@ -213,37 +194,9 @@ accept various extension mnemonics. For
> @code{avx512_bf16},
> @code{avx_vnni},
> @code{avx512_fp16},
> -@code{noavx512f},
> -@code{noavx512cd},
> -@code{noavx512er},
> -@code{noavx512pf},
> -@code{noavx512vl},
> -@code{noavx512bw},
> -@code{noavx512dq},
> -@code{noavx512ifma},
> -@code{noavx512vbmi},
> -@code{noavx512_4fmaps},
> -@code{noavx512_4vnniw},
> -@code{noavx512_vpopcntdq},
> -@code{noavx512_vbmi2},
> -@code{noavx512_vnni},
> -@code{noavx512_bitalg},
> -@code{noavx512_vp2intersect},
> -@code{notdx},
> -@code{noavx512_bf16},
> -@code{noavx_vnni},
> -@code{noavx512_fp16},
> -@code{noenqcmd},
> -@code{noserialize},
> -@code{notsxldtrk},
> @code{amx_int8},
> -@code{noamx_int8},
> @code{amx_bf16},
> -@code{noamx_bf16},
> @code{amx_tile},
> -@code{noamx_tile},
> -@code{nouintr},
> -@code{nohreset},
> @code{vmx},
> @code{vmfunc},
> @code{smx},
> @@ -291,8 +244,8 @@ accept various extension mnemonics. For
> @code{tlbsync},
> @code{svme} and
> @code{padlock}.
> -Note that rather than extending a basic instruction set, the extension
> -mnemonics starting with @code{no} revoke the respective functionality.
> +Note that these extension mnemonics can be prefixed with @code{no} to revoke
> +the respective (and any dependent) functionality.
>
> When the @code{.arch} directive is used with @option{-march}, the
> @code{.arch} directive will take precedent.
> @@ -1559,6 +1512,9 @@ conditional jumps will be promoted when
> sequence consisting of a conditional jump of the opposite sense around
> an unconditional jump to the target.
>
> +Note that the sub-architecture specifiers (starting with a dot) can be prefixed
> +with @code{no} to revoke the respective (and any dependent) functionality.
> +
> Following the CPU architecture (but not a sub-architecture, which are those
> starting with a dot), you may specify @samp{jumps} or @samp{nojumps} to
> control automatic promotion of conditional jumps. @samp{jumps} is the
OK.
Thanks.
--
H.J.
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2022-10-17 22:28 ` H.J. Lu
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