From: "H.J. Lu" <hjl.tools@gmail.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Binutils <binutils@sourceware.org>
Subject: Re: [PATCH] x86: drop stray NoRex64 from XBEGIN
Date: Tue, 28 Jun 2022 07:38:01 -0700 [thread overview]
Message-ID: <CAMe9rOrbVBOrPON9wAjRz1DFK-vx9sNKG88VAi-EmZa3C6ZQ2w@mail.gmail.com> (raw)
In-Reply-To: <60964c64-ce74-5f99-3323-3faa3ff1102f@suse.com>
On Tue, Jun 28, 2022 at 7:10 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> Presumably this being there was a result of taking CALL as a reference
> when adding the RTM insns. But with No_qSuf the attribute has no effect.
>
> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -1911,7 +1911,7 @@ xrelease, 0xf3, None, CpuHLE, No_bSuf|No
>
> // RTM instructions
> xabort, 0xc6f8, None, CpuRTM, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8 }
> -xbegin, 0xc7f8, None, CpuRTM, JumpDword|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Disp16|Disp32|Disp32S }
> +xbegin, 0xc7f8, None, CpuRTM, JumpDword|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp16|Disp32|Disp32S }
> xend, 0xf01d5, None, CpuRTM, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
> xtest, 0xf01d6, None, CpuHLE|CpuRTM, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
>
OK.
Thanks.
--
H.J.
prev parent reply other threads:[~2022-06-28 14:38 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-28 14:10 Jan Beulich
2022-06-28 14:38 ` H.J. Lu [this message]
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