Re: [PATCH] binutils: partially revert 17c6c3b99156fe82c1e637e1a5fd9f163ac788c8

["徐持恒 Xu Chiheng" <chiheng.xu@gmail.com>]

Sorry, but I really think this is a regression.
64 bit linker originally could do relocation on 32 bit object code. It
worked perfectly.
Setting src_mask to 0, ignores the addend value in the section content.

On Fri, Nov 18, 2022 at 4:15 AM 徐持恒 Xu Chiheng <chiheng.xu@gmail.com> wrote:
>
> Sorry, but I really think this is a regession.
> 64 bit linker orginally could do relocation on 32 bit object code. It worked perfectly.
> Setting src_mask to 0, ignore the addend value in the section content.
>
> ________________________________
> From: H.J. Lu <hjl.tools@gmail.com>
> Sent: Friday, November 18, 2022 03:51
> To: 徐持恒 Xu Chiheng <chiheng.xu@gmail.com>
> Cc: binutils@sourceware.org <binutils@sourceware.org>
> Subject: Re: [PATCH] binutils: partially revert 17c6c3b99156fe82c1e637e1a5fd9f163ac788c8
>
> On Thu, Nov 17, 2022 at 11:29 AM 徐持恒 Xu Chiheng <chiheng.xu@gmail.com> wrote:
> >
> > In developing some kernel like program. It start as 32 bit mode, then switch to 64 bit mode. All code are written in C++(only with inline assembly, with no assembly file).
> >
>
> Please compile C++ code to assembly code and add .code32 to assembly
> codes to tell
> assembler to generate 32-bit instructions.
>
> > ________________________________
> > From: H.J. Lu <hjl.tools@gmail.com>
> > Sent: Friday, November 18, 2022 03:11
> > To: 徐持恒 Xu Chiheng <chiheng.xu@gmail.com>
> > Cc: binutils@sourceware.org <binutils@sourceware.org>
> > Subject: Re: [PATCH] binutils: partially revert 17c6c3b99156fe82c1e637e1a5fd9f163ac788c8
> >
> > On Thu, Nov 17, 2022 at 11:01 AM 徐持恒 Xu Chiheng <chiheng.xu@gmail.com> wrote:
> > >
> > > binutils-2.36 and earlier works
> > > binutils-2.37 and later does not work.
> >
> > It worked by accident before.  May I ask why you want to do it this way?
> >
> > > ________________________________
> > > From: H.J. Lu <hjl.tools@gmail.com>
> > > Sent: Friday, November 18, 2022 02:50
> > > To: 徐持恒 Xu Chiheng <chiheng.xu@gmail.com>
> > > Cc: binutils@sourceware.org <binutils@sourceware.org>
> > > Subject: Re: [PATCH] binutils: partially revert 17c6c3b99156fe82c1e637e1a5fd9f163ac788c8
> > >
> > > On Thu, Nov 17, 2022 at 10:28 AM 徐持恒 Xu Chiheng <chiheng.xu@gmail.com> wrote:
> > > >
> > > > No. not using NASM.
> > > >
> > > > using x86_64-elf-g++ -m32 to generate 32 bit code(elf32).
> > > > using x86_64-elf-objcopy to convert it to elf64.
> > > > then link the 32 bit code(elf64) with 64 bit code.
> > > >
> > >
> > > This is an unsupported operation.
> > >
> > > H.J.
> > > >
> > > >
> > > > ________________________________
> > > > From: H.J. Lu <hjl.tools@gmail.com>
> > > > Sent: Friday, November 18, 2022 02:06
> > > > To: 徐持恒 Xu Chiheng <chiheng.xu@gmail.com>
> > > > Cc: binutils@sourceware.org <binutils@sourceware.org>
> > > > Subject: Re: [PATCH] binutils: partially revert 17c6c3b99156fe82c1e637e1a5fd9f163ac788c8
> > > >
> > > > On Thu, Nov 17, 2022 at 9:44 AM 徐持恒 Xu Chiheng via Binutils
> > > > <binutils@sourceware.org> wrote:
> > > > >
> > > > > Phenomenal:  In 32 bit and 64 bit mixed code,  ld can't do relocation
> > > > > for 32 bit code.
> > > > > It is caused by commit 17c6c3b99156fe82c1e637e1a5fd9f163ac788c8.
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >   /* src_mask selects the part of the instruction (or data) to be used
> > > > >      in the relocation sum.  If the target relocations don't have an
> > > > >      addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
> > > > >      dst_mask to extract the addend from the section contents.  If
> > > > >      relocations do have an addend in the reloc, eg. ELF USE_RELA, this
> > > > >      field should normally be zero.  Non-zero values for ELF USE_RELA
> > > > >      targets should be viewed with suspicion as normally the value in
> > > > >      the dst_mask part of the section contents should be ignored.  */
> > > > >   bfd_vma src_mask;
> > > > >
> > > > >
> > > > >
> > > > > Author: Jan Beulich <jbeulich@suse.com>  2021-05-07 18:05:12
> > > > > Committer: Jan Beulich <jbeulich@suse.com>  2021-05-07 18:05:12
> > > > > Parent: 98da05bf2698b55b73453480a3fbb92f163d2c7b (x86: don't mix disp
> > > > > and imm processing)
> > > > > Child:  4cf88725da1cb503be04d3237354105ec170bc86 ([gdb/symtab] Fix
> > > > > infinite recursion in dwarf2_cu::get_builder())
> > > > > Branches: master, test0558-01 and many more (41)
> > > > > Follows: gdb-10-branchpoint
> > > > > Precedes: binutils-2_37, gdb-11-branchpoint
> > > > >
> > > > >     x86-64/ELF: clear src_mask for all reloc types
> > > > >
> > > > >     x86-64 uses rela relocations. The comment next to the field's declaration
> > > > >     says "Non-zero values for ELF USE_RELA targets should be viewed with
> > > > >     suspicion ..." And indeed the fields being non-zero causes section
> > > > >     contents to be accumulated into the final relocated values in addition to
> > > > >     the relocations' addends, which is contrary to the ELF spec.
> > > >
> > > > Are you using NASM?
> > > >
> > > > --
> > > > H.J.
> > >
> > >
> > >
> > > --
> > > H.J.
> >
> >
> >
> > --
> > H.J.
>
>
>
> --
> H.J.