public inbox for binutils@sourceware.org
 help / color / mirror / Atom feed
From: Nelson Chu <nelson@rivosinc.com>
To: shihua@iscas.ac.cn
Cc: binutils@sourceware.org, kito.cheng@sifive.com,
	vineetg@rivosinc.com,  research_trasio@irq.a4lg.com,
	christoph.muellner@vrull.eu, palmer@dabbelt.com,
	 jiawei@iscas.ac.cn
Subject: Re: [PATCH V3]RISC-V: Implement Ztso extension
Date: Tue, 20 Sep 2022 16:27:40 +0800	[thread overview]
Message-ID: <CAPpQWtC7CBQ-nJQ-qfdUKn-2zzmwfdcAMasKK874AQP2cLM3oA@mail.gmail.com> (raw)
In-Reply-To: <20220920021855.2279-1-shihua@iscas.ac.cn>

On Tue, Sep 20, 2022 at 10:19 AM <shihua@iscas.ac.cn> wrote:
>
> From: Shihua <shihua@iscas.ac.cn>
>
>    This patch support ZTSO extension. It will turn on the tso flag for elf_flags once we have enabled Ztso extension.
>    This is intended to implement v0.1 of the proposed specification which can be found in Chapter 25 of https://github.com/riscv/riscv-isa-manual/releases/download/draft-20220723-10eea63/riscv-spec.pdf.
>
> V3:
>    According to Tsukasa OI's feedback ( https://sourceware.org/pipermail/binutils/2022-September/122915.html ),
>    * remove CLASS_INSN_ZTSO because it is not used.
>    * remove testsuite attribute-015.d, because it is not necessary.
>    * add testsuite ztso.d, to verify whether the flag TSO is generated.
>
>
> bfd\ChangeLog:
>
>         * elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Set TSO flag.
>         * elfxx-riscv.c: Add Ztso's arch
>
> binutils\ChangeLog:
>
>         * readelf.c (get_machine_flags):Set TSO flag.
>
> gas\ChangeLog:
>
>         * config/tc-riscv.c (struct riscv_set_options):Set TSO flag.
>         (riscv_set_tso):Set TSO flag.
>         (riscv_set_arch):Set TSO flag.
>         * testsuite/gas/riscv/ztso.d: New test.
>
> include\ChangeLog:
>
>         * elf/riscv.h (EF_RISCV_TSO) Set TSO flag.
>
> ---
>  bfd/elfnn-riscv.c              |  3 +++
>  bfd/elfxx-riscv.c              |  1 +
>  binutils/readelf.c             |  3 +++
>  gas/config/tc-riscv.c          | 18 ++++++++++++++++++
>  gas/testsuite/gas/riscv/ztso.d |  8 ++++++++
>  include/elf/riscv.h            |  3 +++
>  6 files changed, 36 insertions(+)
>  create mode 100644 gas/testsuite/gas/riscv/ztso.d
>
> diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
> index 0e0a0b09e24..3d2ddf4e651 100644
> --- a/bfd/elfnn-riscv.c
> +++ b/bfd/elfnn-riscv.c
> @@ -3872,6 +3872,9 @@ _bfd_riscv_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
>    /* Allow linking RVC and non-RVC, and keep the RVC flag.  */
>    elf_elfheader (obfd)->e_flags |= new_flags & EF_RISCV_RVC;
>
> +  /* Allow linking TSO and non-TSO, and keep the TSO flag.  */
> +  elf_elfheader (obfd)->e_flags |= new_flags & EF_RISCV_TSO;
> +
>    return true;
>
>   fail:
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index e03b312a381..3de8865a228 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1204,6 +1204,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
>    {"zvl16384b",                ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
>    {"zvl32768b",                ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
>    {"zvl65536b",                ISA_SPEC_CLASS_DRAFT,           1, 0,  0 },
> +  {"ztso",                   ISA_SPEC_CLASS_DRAFT,             0, 1,  0 },
>    {NULL, 0, 0, 0, 0}
>  };
>
> diff --git a/binutils/readelf.c b/binutils/readelf.c
> index cafba9a4f56..b1dbcad06f5 100644
> --- a/binutils/readelf.c
> +++ b/binutils/readelf.c
> @@ -4079,6 +4079,9 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
>           if (e_flags & EF_RISCV_RVE)
>             strcat (buf, ", RVE");
>
> +         if (e_flags & EF_RISCV_TSO)
> +           strcat (buf, ", TSO");
> +
>           switch (e_flags & EF_RISCV_FLOAT_ABI)
>             {
>             case EF_RISCV_FLOAT_ABI_SOFT:
> diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
> index 2f5ee18e451..c025890ea74 100644
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -234,6 +234,7 @@ struct riscv_set_options
>    int relax; /* Emit relocs the linker is allowed to relax.  */
>    int arch_attr; /* Emit architecture and privileged elf attributes.  */
>    int csr_check; /* Enable the CSR checking.  */
> +  int tso; /* Use tso model.  */
>  };
>
>  static struct riscv_set_options riscv_opts =
> @@ -243,6 +244,7 @@ static struct riscv_set_options riscv_opts =
>    1, /* relax */
>    DEFAULT_RISCV_ATTR, /* arch_attr */
>    0, /* csr_check */
> +  0, /* tso */
>  };

Should we need to support tso for the .option directive?  Otherwise, LGTM.

Thanks
Nelson

>  /* Enable or disable the rvc flags for riscv_opts.  Turn on the rvc flag
> @@ -257,6 +259,18 @@ riscv_set_rvc (bool rvc_value)
>    riscv_opts.rvc = rvc_value;
>  }
>
> +/* Enable or disable the tso flags for riscv_opts.  Turn on the tso flag
> +   for elf_flags once we have enabled ztso extension.  */
> +
> +static void
> +riscv_set_tso (bool tso_value)
> +{
> +  if (tso_value)
> +    elf_flags |= EF_RISCV_TSO;
> +
> +  riscv_opts.tso = tso_value;

Likewise.

> +}
> +
>  /* This linked list records all enabled extensions, which are parsed from
>     the architecture string.  The architecture string can be set by the
>     -march option, the elf architecture attributes, and the --with-arch
> @@ -307,6 +321,10 @@ riscv_set_arch (const char *s)
>    riscv_set_rvc (false);
>    if (riscv_subset_supports (&riscv_rps_as, "c"))
>      riscv_set_rvc (true);
> +
> +  riscv_set_tso (false);
> +  if (riscv_subset_supports (&riscv_rps_as, "ztso"))
> +    riscv_set_tso (true);
>  }
>
>  /* Indicate -mabi option is explictly set.  */
> diff --git a/gas/testsuite/gas/riscv/ztso.d b/gas/testsuite/gas/riscv/ztso.d
> new file mode 100644
> index 00000000000..cb038db89d3
> --- /dev/null
> +++ b/gas/testsuite/gas/riscv/ztso.d
> @@ -0,0 +1,8 @@
> +#as: -march=rv64i_ztso
> +#readelf: -h
> +#source: empty.s
> +
> +ELF Header:
> +#...
> +[      ]+Flags:[       ]+0x10, TSO.*
> +#...
> \ No newline at end of file
> diff --git a/include/elf/riscv.h b/include/elf/riscv.h
> index 9b3ea376ff3..d7b5c09d5c3 100644
> --- a/include/elf/riscv.h
> +++ b/include/elf/riscv.h
> @@ -121,6 +121,9 @@ END_RELOC_NUMBERS (R_RISCV_max)
>  /* RISC-V specific values for st_other.  */
>  #define STO_RISCV_VARIANT_CC 0x80
>
> +/* File uses the TSO model. */
> +#define EF_RISCV_TSO 0x0010
> +
>  /* Additional section types.  */
>  #define SHT_RISCV_ATTRIBUTES 0x70000003 /* Section holds attributes.  */
>
> --
> 2.37.1.windows.1
>

      reply	other threads:[~2022-09-20  8:27 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-20  2:18 shihua
2022-09-20  8:27 ` Nelson Chu [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAPpQWtC7CBQ-nJQ-qfdUKn-2zzmwfdcAMasKK874AQP2cLM3oA@mail.gmail.com \
    --to=nelson@rivosinc.com \
    --cc=binutils@sourceware.org \
    --cc=christoph.muellner@vrull.eu \
    --cc=jiawei@iscas.ac.cn \
    --cc=kito.cheng@sifive.com \
    --cc=palmer@dabbelt.com \
    --cc=research_trasio@irq.a4lg.com \
    --cc=shihua@iscas.ac.cn \
    --cc=vineetg@rivosinc.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).