From: "Joshi, Tejas Sanjay" <TejasSanjay.Joshi@amd.com>
To: "H.J. Lu" <hjl.tools@gmail.com>,
"binutils@sourceware.org" <binutils@sourceware.org>
Cc: Jan Beulich <jbeulich@suse.com>,
"Gopalasubramanian, Ganesh" <Ganesh.Gopalasubramanian@amd.com>
Subject: RE: [PATCH] Add znver4 processor support
Date: Tue, 15 Nov 2022 17:51:09 +0000 [thread overview]
Message-ID: <DM6PR12MB4795E11A053717ECABE7B4E1E3049@DM6PR12MB4795.namprd12.prod.outlook.com> (raw)
In-Reply-To: <CAMe9rOpHv3T6E7n=B14Y5EA2nLAZnCGxr0V5hYZZDx9poeT6MQ@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 218 bytes --]
[Public]
Hi,
> Please rebase your patch.
I have rebased the patch, PFA. It built successfully and I also ran make check, did not see any issues. Please check if it applies now.
Thanks and Regards,
Tejas
[-- Attachment #2: 0002-Add-AMD-znver4-processor-support.patch --]
[-- Type: application/octet-stream, Size: 17562 bytes --]
From b2825993eff4d2225da98849c0bd49cbfa2123fb Mon Sep 17 00:00:00 2001
From: Tejas Joshi <TejasSanjay.Joshi@amd.com>
Date: Tue, 15 Nov 2022 21:56:37 +0530
Subject: [PATCH] Add AMD znver4 processor support
2022-09-28 Tejas Joshi <TejasSanjay.Joshi@amd.com>
gas/
* config/tc-i386.c (cpu_arch): Add znver4 ARCH and rmpquery SUBARCH.
(md_assemble): Expand comment before swap_operands() with rmpquery.
* doc/c-i386.texi: Add znver4.
* testsuite/gas/i386/arch-14-1.d: New.
* testsuite/gas/i386/arch-14-1.s: New.
* testsuite/gas/i386/arch-14-znver4.d: New.
* testsuite/gas/i386/i386.exp: Add new znver4 test cases.
* testsuite/gas/i386/rmpquery.d: New.
* testsuite/gas/i386/rmpquery.s: New.
* testsuite/gas/i386/x86-64-arch-4-1.d: New.
* testsuite/gas/i386/x86-64-arch-4-1.s: New.
* testsuite/gas/i386/x86-64-arch-4-znver4.d: New.
opcodes/
* i386-dis.c (x86_64_table): Add rmpquery.
* i386-gen.c (cpu_flag_init): Add CPU_ZNVER4_FLAGS and
CPU_RMPQUERY_FLAGS.
(cpu_flags): Add CpuRMPQUERY.
* i386-opc.h (enum): Add CpuRMPQUERY.
(i386_cpu_flags): Add cpurmpquery.
* i386-opc.tbl: Add rmpquery insn.
* i386-init.h: Re-generated.
* i386-tbl.h: Re-generated.
---
gas/config/tc-i386.c | 9 +++++---
gas/doc/c-i386.texi | 5 ++--
gas/testsuite/gas/i386/arch-14-1.d | 22 ++++++++++++++++++
gas/testsuite/gas/i386/arch-14-1.s | 16 +++++++++++++
gas/testsuite/gas/i386/arch-14-znver4.d | 5 ++++
gas/testsuite/gas/i386/i386.exp | 5 ++++
gas/testsuite/gas/i386/rmpquery.d | 20 ++++++++++++++++
gas/testsuite/gas/i386/rmpquery.s | 13 +++++++++++
gas/testsuite/gas/i386/x86-64-arch-4-1.d | 23 +++++++++++++++++++
gas/testsuite/gas/i386/x86-64-arch-4-1.s | 18 +++++++++++++++
gas/testsuite/gas/i386/x86-64-arch-4-znver4.d | 5 ++++
opcodes/i386-dis.c | 16 ++++++++++++-
opcodes/i386-gen.c | 5 ++++
opcodes/i386-opc.h | 3 +++
opcodes/i386-opc.tbl | 7 ++++++
15 files changed, 166 insertions(+), 6 deletions(-)
create mode 100644 gas/testsuite/gas/i386/arch-14-1.d
create mode 100644 gas/testsuite/gas/i386/arch-14-1.s
create mode 100644 gas/testsuite/gas/i386/arch-14-znver4.d
create mode 100644 gas/testsuite/gas/i386/rmpquery.d
create mode 100644 gas/testsuite/gas/i386/rmpquery.s
create mode 100644 gas/testsuite/gas/i386/x86-64-arch-4-1.d
create mode 100644 gas/testsuite/gas/i386/x86-64-arch-4-1.s
create mode 100644 gas/testsuite/gas/i386/x86-64-arch-4-znver4.d
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 71437d4ab79..a5ea9b16c9e 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -978,6 +978,7 @@ static const arch_entry cpu_arch[] =
ARCH (znver1, ZNVER, ZNVER1, false),
ARCH (znver2, ZNVER, ZNVER2, false),
ARCH (znver3, ZNVER, ZNVER3, false),
+ ARCH (znver4, ZNVER, ZNVER4, false),
ARCH (btver1, BT, BTVER1, false),
ARCH (btver2, BT, BTVER2, false),
@@ -1106,6 +1107,7 @@ static const arch_entry cpu_arch[] =
SUBARCH (msrlist, MSRLIST, ANY_MSRLIST, false),
SUBARCH (avx_ne_convert, AVX_NE_CONVERT, ANY_AVX_NE_CONVERT, false),
SUBARCH (rao_int, RAO_INT, ANY_RAO_INT, false),
+ SUBARCH (rmpquery, RMPQUERY, RMPQUERY, false),
};
#undef SUBARCH
@@ -4875,9 +4877,10 @@ md_assemble (char *line)
/* All Intel opcodes have reversed operands except for "bound", "enter",
"invlpg*", "monitor*", "mwait*", "tpause", "umwait", "pvalidate",
- "rmpadjust", and "rmpupdate". We also don't reverse intersegment "jmp"
- and "call" instructions with 2 immediate operands so that the immediate
- segment precedes the offset consistently in Intel and AT&T modes. */
+ "rmpadjust", "rmpupdate", and "rmpquery". We also don't reverse
+ intersegment "jmp" and "call" instructions with 2 immediate operands so
+ that the immediate segment precedes the offset consistently in Intel and
+ AT&T modes. */
if (intel_syntax
&& i.operands > 1
&& (strcmp (mnemonic, "bound") != 0)
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 6fa1199f328..feca644fa0b 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -124,6 +124,7 @@ processor names are recognized:
@code{znver1},
@code{znver2},
@code{znver3},
+@code{znver4},
@code{btver1},
@code{btver2},
@code{generic32} and
@@ -1475,8 +1476,8 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{k6} @tab @samp{k6_2} @tab @samp{athlon} @tab @samp{k8}
@item @samp{amdfam10} @tab @samp{bdver1} @tab @samp{bdver2} @tab @samp{bdver3}
@item @samp{bdver4} @tab @samp{znver1} @tab @samp{znver2} @tab @samp{znver3}
-@item @samp{btver1} @tab @samp{btver2} @tab @samp{generic32} @tab @samp{generic64}
-@item @samp{.cmov} @tab @samp{.fxsr} @tab @samp{.mmx}
+@item @samp{znver4} @tab @samp{btver1} @tab @samp{btver2} @tab @samp{generic32}
+@item @samp{generic64} @tab @samp{.cmov} @tab @samp{.fxsr} @tab @samp{.mmx}
@item @samp{.sse} @tab @samp{.sse2} @tab @samp{.sse3} @tab @samp{.sse4a}
@item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4}
@item @samp{.avx} @tab @samp{.vmx} @tab @samp{.smx} @tab @samp{.ept}
diff --git a/gas/testsuite/gas/i386/arch-14-1.d b/gas/testsuite/gas/i386/arch-14-1.d
new file mode 100644
index 00000000000..649c71c0f44
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-14-1.d
@@ -0,0 +1,22 @@
+#objdump: -dw
+#name: i386 arch 14-1
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+:[ ]*62 f1 d5 48 58 f4[ ]*vaddpd %zmm4,%zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 1b 31[ ]*vbroadcastf32x8 \(%ecx\),%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 d5 48 b4 f4[ ]*vpmadd52luq %zmm4,%zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 c4 f5[ ]*vpconflictd %zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 1c f5[ ]*vpabsb %zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f1 d5 0f 58 f4[ ]*vaddpd %xmm4,%xmm5,%xmm6\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 f2 57 48 72 f4[ ]*vcvtne2ps2bf16 %zmm4,%zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8d f4[ ]*vpermb %zmm4,%zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 4f 63 31[ ]*vpcompressb %zmm6,\(%ecx\)\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 f2 75 48 52 e3[ ]*vpdpwssd %zmm3,%zmm1,%zmm4
+[ ]*[a-f0-9]+:[ ]*62 f2 55 48 8f ec[ ]*vpshufbitqmb %zmm4,%zmm5,%k5
+[ ]*[a-f0-9]+:[ ]*62 f2 7d 48 55 f5[ ]*vpopcntd %zmm5,%zmm6
+[ ]*[a-f0-9]+:[ ]*66 0f 38 cf ec[ ]*gf2p8mulb %xmm4,%xmm5
+#pass
diff --git a/gas/testsuite/gas/i386/arch-14-1.s b/gas/testsuite/gas/i386/arch-14-1.s
new file mode 100644
index 00000000000..59e3a687dbe
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-14-1.s
@@ -0,0 +1,16 @@
+# Test -march=
+ .text
+
+ vaddpd %zmm4, %zmm5, %zmm6 # AVX512F
+ vbroadcastf32x8 (%ecx), %zmm6 # AVX512DQ
+ vpmadd52luq %zmm4, %zmm5, %zmm6 # AVX512IFMA
+ vpconflictd %zmm5, %zmm6 # AVX512CD
+ vpabsb %zmm5, %zmm6 # AVX512BW
+ vaddpd %xmm4, %xmm5, %xmm6{%k7} # AVX512{F,VL}
+ vcvtne2ps2bf16 %zmm4, %zmm5, %zmm6 #AVX512_BF16
+ vpermb %zmm4, %zmm5, %zmm6 # AVX512VBMI
+ vpcompressb %zmm6, (%ecx){%k7} # AVX512VBMI2
+ vpdpwssd %zmm3, %zmm1, %zmm4 # AVX512VNNI
+ vpshufbitqmb %zmm4, %zmm5, %k5 # AVX512BITALG
+ vpopcntd %zmm5, %zmm6 # AVX512_VPOPCNTDQ
+ gf2p8mulb %xmm4, %xmm5 # GFNI
diff --git a/gas/testsuite/gas/i386/arch-14-znver4.d b/gas/testsuite/gas/i386/arch-14-znver4.d
new file mode 100644
index 00000000000..3ae309f9988
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-14-znver4.d
@@ -0,0 +1,5 @@
+#source: arch-14-1.s
+#as: -march=znver4
+#objdump: -dw
+#name: i386 arch 14 (znver4)
+#dump: arch-14-1.d
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index cad783e46fd..f989e56a578 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -196,6 +196,7 @@ if [gas_32_check] then {
run_dump_test "arch-13-znver1"
run_dump_test "arch-13-znver2"
run_dump_test "arch-14-znver3"
+ run_dump_test "arch-14-znver4"
run_dump_test "arch-10-btver1"
run_dump_test "arch-10-btver2"
run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al"
@@ -207,6 +208,7 @@ if [gas_32_check] then {
run_dump_test "arch-12"
run_dump_test "arch-13"
run_dump_test "arch-14"
+ run_dump_test "arch-14-1"
run_list_test "arch-dflt" "-march=generic32 -al"
run_list_test "arch-stk" "-march=generic32 -al"
run_dump_test "8087"
@@ -913,6 +915,8 @@ if [gas_64_check] then {
run_dump_test "x86-64-arch-2"
run_dump_test "x86-64-arch-3"
run_dump_test "x86-64-arch-4"
+ run_dump_test "x86-64-arch-4-1"
+ run_dump_test "rmpquery"
run_dump_test "x86-64-arch-2-lzcnt"
run_dump_test "x86-64-arch-2-prefetchw"
run_dump_test "x86-64-arch-2-bdver1"
@@ -922,6 +926,7 @@ if [gas_64_check] then {
run_dump_test "x86-64-arch-3-znver1"
run_dump_test "x86-64-arch-3-znver2"
run_dump_test "x86-64-arch-4-znver3"
+ run_dump_test "x86-64-arch-4-znver4"
run_dump_test "x86-64-arch-2-btver1"
run_dump_test "x86-64-arch-2-btver2"
run_list_test "x86-64-arch-2-1" "-march=generic64 -I${srcdir}/$subdir -al"
diff --git a/gas/testsuite/gas/i386/rmpquery.d b/gas/testsuite/gas/i386/rmpquery.d
new file mode 100644
index 00000000000..4d937685612
--- /dev/null
+++ b/gas/testsuite/gas/i386/rmpquery.d
@@ -0,0 +1,20 @@
+#as: -march=generic64+rmpquery
+#objdump: -dw
+#name: 64-bit RMPQUERY insn
+#source: rmpquery.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <att>:
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 fd[ ]+rmpquery[ ]*
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 fd[ ]+rmpquery[ ]*
+[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 fd[ ]+addr32 rmpquery[ ]*
+
+[0-9a-f]+ <intel>:
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 fd[ ]+rmpquery[ ]*
+[ ]*[a-f0-9]+:[ ]+f3 0f 01 fd[ ]+rmpquery[ ]*
+[ ]*[a-f0-9]+:[ ]+67 f3 0f 01 fd[ ]+addr32 rmpquery[ ]*
+#pass
diff --git a/gas/testsuite/gas/i386/rmpquery.s b/gas/testsuite/gas/i386/rmpquery.s
new file mode 100644
index 00000000000..75393734648
--- /dev/null
+++ b/gas/testsuite/gas/i386/rmpquery.s
@@ -0,0 +1,13 @@
+# Check RMPQUERY instruction
+
+ .text
+att:
+ rmpquery
+ rmpquery %rax, %rcx, %rdx
+ rmpquery %eax, %rcx, %rdx
+
+ .intel_syntax noprefix
+intel:
+ rmpquery
+ rmpquery rax, rcx, rdx
+ rmpquery eax, rcx, rdx
diff --git a/gas/testsuite/gas/i386/x86-64-arch-4-1.d b/gas/testsuite/gas/i386/x86-64-arch-4-1.d
new file mode 100644
index 00000000000..f33cd6bc297
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-4-1.d
@@ -0,0 +1,23 @@
+#objdump: -dw
+#name: x86-64 arch 4-1
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+:[ ]*62 01 95 40 58 f4[ ]*vaddpd %zmm28,%zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 48 1b 31[ ]*vbroadcastf32x8 \(%rcx\),%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 95 40 b4 f4[ ]*vpmadd52luq %zmm28,%zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 7d 48 c4 f5[ ]*vpconflictd %zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 7d 48 1c f5[ ]*vpabsb %zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 01 95 00 58 f4[ ]*vaddpd %xmm28,%xmm29,%xmm30
+[ ]*[a-f0-9]+:[ ]*62 02 17 40 72 f4[ ]*vcvtne2ps2bf16 %zmm28,%zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 02 15 40 8d f4[ ]*vpermb %zmm28,%zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*62 62 7d 4f 63 31[ ]*vpcompressb %zmm30,\(%rcx\)\{%k7\}
+[ ]*[a-f0-9]+:[ ]*62 a2 6d 40 52 d1[ ]*vpdpwssd %zmm17,%zmm18,%zmm18
+[ ]*[a-f0-9]+:[ ]*62 92 15 40 8f ec[ ]*vpshufbitqmb %zmm28,%zmm29,%k5
+[ ]*[a-f0-9]+:[ ]*62 02 7d 48 55 f5[ ]*vpopcntd %zmm29,%zmm30
+[ ]*[a-f0-9]+:[ ]*66 0f 38 cf ec[ ]*gf2p8mulb %xmm4,%xmm5
+[ ]*[a-f0-9]+:[ ]*f3 0f 01 fd[ ]*rmpquery
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-4-1.s b/gas/testsuite/gas/i386/x86-64-arch-4-1.s
new file mode 100644
index 00000000000..57a370fa752
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-4-1.s
@@ -0,0 +1,18 @@
+# Test -march=
+ .text
+
+ vaddpd %zmm28, %zmm29, %zmm30 # AVX512F
+ vbroadcastf32x8 (%rcx), %zmm30 # AVX512DQ
+ vpmadd52luq %zmm28, %zmm29, %zmm30 # AVX512IFMA
+ vpconflictd %zmm29, %zmm30 # AVX512CD
+ vpabsb %zmm29, %zmm30 # AVX512BW
+ vaddpd %xmm28, %xmm29, %xmm30 # AVX512{F,VL}
+ vcvtne2ps2bf16 %zmm28, %zmm29, %zmm30 #AVX512_BF16
+ vpermb %zmm28, %zmm29, %zmm30 # AVX512VBMI
+ vpcompressb %zmm30, (%rcx){%k7} # AVX512VBMI2
+ vpdpwssd %zmm17, %zmm18, %zmm18 # AVX512VNNI
+ vpshufbitqmb %zmm28, %zmm29, %k5 # AVX512BITALG
+ vpopcntd %zmm29, %zmm30 # AVX512_VPOPCNTDQ
+ gf2p8mulb %xmm4, %xmm5
+# RMPQUERY
+ rmpquery
diff --git a/gas/testsuite/gas/i386/x86-64-arch-4-znver4.d b/gas/testsuite/gas/i386/x86-64-arch-4-znver4.d
new file mode 100644
index 00000000000..d64c96f0d40
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-4-znver4.d
@@ -0,0 +1,5 @@
+#source: x86-64-arch-4-1.s
+#as: -march=znver4
+#objdump: -dw
+#name: x86-64 arch 4 (znver4)
+#dump: x86-64-arch-4-1.d
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index b724f78b981..e43666af841 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1001,6 +1001,7 @@ enum
PREFIX_0F01_REG_5_MOD_3_RM_6,
PREFIX_0F01_REG_5_MOD_3_RM_7,
PREFIX_0F01_REG_7_MOD_3_RM_2,
+ PREFIX_0F01_REG_7_MOD_3_RM_5,
PREFIX_0F01_REG_7_MOD_3_RM_6,
PREFIX_0F01_REG_7_MOD_3_RM_7,
PREFIX_0F09,
@@ -1281,6 +1282,7 @@ enum
X86_64_0F01_REG_5_MOD_3_RM_5_PREFIX_1,
X86_64_0F01_REG_5_MOD_3_RM_6_PREFIX_1,
X86_64_0F01_REG_5_MOD_3_RM_7_PREFIX_1,
+ X86_64_0F01_REG_7_MOD_3_RM_5_PREFIX_1,
X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1,
X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_3,
X86_64_0F01_REG_7_MOD_3_RM_7_PREFIX_1,
@@ -3073,6 +3075,12 @@ static const struct dis386 prefix_table[][4] = {
{ "mcommit", { Skip_MODRM }, 0 },
},
+ /* PREFIX_0F01_REG_7_MOD_3_RM_5 */
+ {
+ { "rdpru", { Skip_MODRM }, 0 },
+ { X86_64_TABLE (X86_64_0F01_REG_7_MOD_3_RM_5_PREFIX_1) },
+ },
+
/* PREFIX_0F01_REG_7_MOD_3_RM_6 */
{
{ "invlpgb", { Skip_MODRM }, 0 },
@@ -4400,6 +4408,12 @@ static const struct dis386 x86_64_table[][2] = {
{ "stui", { Skip_MODRM }, 0 },
},
+ /* X86_64_0F01_REG_7_MOD_3_RM_5_PREFIX_1 */
+ {
+ { Bad_Opcode },
+ { "rmpquery", { Skip_MODRM }, 0 },
+ },
+
/* X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1 */
{
{ Bad_Opcode },
@@ -8777,7 +8791,7 @@ static const struct dis386 rm_table[][8] = {
{ PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_2) },
{ "mwaitx", { { OP_Mwait, eBX_reg } }, PREFIX_OPCODE },
{ "clzero", { Skip_MODRM }, 0 },
- { "rdpru", { Skip_MODRM }, 0 },
+ { PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_5) },
{ PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_6) },
{ PREFIX_TABLE (PREFIX_0F01_REG_7_MOD_3_RM_7) },
},
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 48c15844ce3..4115c131fd1 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -105,6 +105,8 @@ static initializer cpu_flag_init[] =
"CPU_ZNVER1_FLAGS|CpuCLWB|CpuRDPID|CpuRDPRU|CpuMCOMMIT|CpuWBNOINVD" },
{ "CPU_ZNVER3_FLAGS",
"CPU_ZNVER2_FLAGS|CpuINVLPGB|CpuTLBSYNC|CpuVAES|CpuVPCLMULQDQ|CpuINVPCID|CpuSNP|CpuOSPKE" },
+ { "CPU_ZNVER4_FLAGS",
+ "CPU_ZNVER3_FLAGS|CpuAVX512F|CpuAVX512DQ|CpuAVX512IFMA|CpuAVX512CD|CpuAVX512BW|CpuAVX512VL|CpuAVX512_BF16|CpuAVX512VBMI|CpuAVX512_VBMI2|CpuAVX512_VNNI|CpuAVX512_BITALG|CpuAVX512_VPOPCNTDQ|CpuGFNI|CpuRMPQUERY" },
{ "CPU_BTVER1_FLAGS",
"CPU_GENERIC64_FLAGS|CpuFISTTP|CpuCX16|CpuRdtscp|CPU_SSSE3_FLAGS|CpuSSE4A|CpuLZCNT|CpuPOPCNT|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME" },
{ "CPU_BTVER2_FLAGS",
@@ -357,6 +359,8 @@ static initializer cpu_flag_init[] =
"CpuTLBSYNC" },
{ "CPU_SNP_FLAGS",
"CpuSNP" },
+ { "CPU_RMPQUERY_FLAGS",
+ "CpuRMPQUERY" },
{ "CPU_ANY_X87_FLAGS",
"CPU_ANY_287_FLAGS|Cpu8087" },
{ "CPU_ANY_287_FLAGS",
@@ -711,6 +715,7 @@ static bitfield cpu_flags[] =
BITFIELD (CpuINVLPGB),
BITFIELD (CpuTLBSYNC),
BITFIELD (CpuSNP),
+ BITFIELD (CpuRMPQUERY),
BITFIELD (Cpu64),
BITFIELD (CpuNo64),
#ifdef CpuUnused
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h
index fd3675a58d4..168729fec62 100644
--- a/opcodes/i386-opc.h
+++ b/opcodes/i386-opc.h
@@ -290,6 +290,8 @@ enum
CpuTLBSYNC,
/* SNP instructions required */
CpuSNP,
+ /* RMPQUERY instruction required */
+ CpuRMPQUERY,
/* NOTE: These last three items need to remain last and in this order. */
@@ -447,6 +449,7 @@ typedef union i386_cpu_flags
unsigned int cpuinvlpgb:1;
unsigned int cputlbsync:1;
unsigned int cpusnp:1;
+ unsigned int cpurmpquery:1;
/* NOTE: These last three fields need to remain last and in this order. */
unsigned int cpu64:1;
unsigned int cpuno64:1;
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 7202f3f74f2..eae3e53f778 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3113,6 +3113,13 @@ rmpadjust, 0xf30f01fe, None, CpuSNP|Cpu64, AddrPrefixOpReg, { Acc|Dword|Qword }
// SNP instructions end
+// RMPQUERY instruction
+
+rmpquery, 0xf30f01fd, None, CpuRMPQUERY|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
+rmpquery, 0xf30f01fd, None, CpuRMPQUERY|Cpu64, AddrPrefixOpReg, { Acc|Dword|Qword, RegC|Qword, RegD|Qword }
+
+// RMPQUERY instruction end
+
// RDPRU instruction
rdpru, 0x0f01fd, None, CpuRDPRU, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, {}
--
2.25.1
prev parent reply other threads:[~2022-11-15 17:51 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-28 7:20 [PATCH] Joshi, Tejas Sanjay
2022-10-28 7:22 ` [PATCH] Add znver4 processor support Joshi, Tejas Sanjay
2022-10-28 8:15 ` [PATCH] Jan Beulich
2022-10-28 15:45 ` [PATCH] H.J. Lu
2022-10-31 4:37 ` [PATCH] Joshi, Tejas Sanjay
2022-10-31 9:37 ` [PATCH] Jan Beulich
2022-11-08 10:18 ` [PATCH] Add znver4 processor support Jan Beulich
2022-11-09 7:14 ` Joshi, Tejas Sanjay
2022-11-09 20:18 ` H.J. Lu
2022-11-12 19:00 ` Joshi, Tejas Sanjay
2022-11-14 22:58 ` H.J. Lu
2022-11-15 5:20 ` Joshi, Tejas Sanjay
2022-11-15 16:12 ` H.J. Lu
2022-11-15 17:51 ` Joshi, Tejas Sanjay [this message]
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