From: "Jiang, Haochen" <haochen.jiang@intel.com>
To: "Beulich, Jan" <JBeulich@suse.com>, Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: RE: [PATCH 2/2] x86: adjust disassembly of insns operating on selector values
Date: Mon, 17 Jul 2023 02:04:04 +0000 [thread overview]
Message-ID: <SA1PR11MB594681AAD11A319BE1B67C65EC3BA@SA1PR11MB5946.namprd11.prod.outlook.com> (raw)
In-Reply-To: <7cc1eda0-713d-9172-c3ed-078e0899b0c4@suse.com>
> --- a/gas/testsuite/gas/i386/opcode-suffix.d
> +++ b/gas/testsuite/gas/i386/opcode-suffix.d
> @@ -102,7 +102,7 @@ Disassembly of section .text:
> *[0-9a-f]+: 60[ ]+pushal
> *[0-9a-f]+: 61[ ]+popal
> *[0-9a-f]+: 62 90 90 90 90 90[ ]+boundl %edx,-0x6f6f6f70\(%eax\)
> - *[0-9a-f]+: 63 90 90 90 90 90[ ]+arpl[ ]+%dx,-0x6f6f6f70\(%eax\)
> + *[0-9a-f]+: 63 90 90 90 90 90[ ]+arpll[ ]+%edx,-
> 0x6f6f6f70\(%eax\)
> *[0-9a-f]+: 68 90 90 90 90[ ]+pushl[ ]+\$0x90909090
> *[0-9a-f]+: 69 90 90 90 90 90 90 90 90 90[ ]+imull[
> ]+\$0x90909090,-0x6f6f6f70\(%eax\),%edx
> *[0-9a-f]+: 6a 90[ ]+pushl[ ]+\$0xffffff90
> @@ -248,7 +248,7 @@ Disassembly of section .text:
> *[0-9a-f]+: fc[ ]+cld
> *[0-9a-f]+: fd[ ]+std
> *[0-9a-f]+: ff 90 90 90 90 90[ ]+calll[ ]+\*-0x6f6f6f70\(%eax\)
> - *[0-9a-f]+: 0f 00 90 90 90 90 90[ ]+lldt[ ]+-0x6f6f6f70\(%eax\)
> + *[0-9a-f]+: 0f 00 90 90 90 90 90[ ]+lldtw[ ]+-0x6f6f6f70\(%eax\)
H.J. is on vacation till Wednesday but I suppose H.J. has this question in my patch
before and he might raise again if he is here.
Is this suffix needed since m16 is the only allowed memory here?
Thx,
Haochen
> *[0-9a-f]+: 0f 01 90 90 90 90 90[ ]+lgdtl[ ]+-0x6f6f6f70\(%eax\)
> *[0-9a-f]+: 0f 02 90 90 90 90 90[ ]+larl[ ]+-0x6f6f6f70\(%eax\),%edx
> *[0-9a-f]+: 0f 03 90 90 90 90 90[ ]+lsll[ ]+-0x6f6f6f70\(%eax\),%edx
next prev parent reply other threads:[~2023-07-17 2:04 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-14 10:01 [PATCH 0/2] x86: adjust disassembling of selector-access insns Jan Beulich
2023-07-14 10:02 ` [PATCH 1/2] x86: simplify disassembly of LAR/LSL Jan Beulich
2023-07-14 10:02 ` [PATCH 2/2] x86: adjust disassembly of insns operating on selector values Jan Beulich
2023-07-17 2:04 ` Jiang, Haochen [this message]
2023-07-17 7:08 ` Jan Beulich
2023-07-21 1:20 ` H.J. Lu
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