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From: Jan Beulich <jbeulich@suse.com>
To: Binutils <binutils@sourceware.org>
Cc: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH 1/2] x86: simplify disassembly of LAR/LSL
Date: Fri, 14 Jul 2023 12:02:17 +0200	[thread overview]
Message-ID: <40ab94c5-d0c4-ee01-a53b-dbc6e5f3f9d2@suse.com> (raw)
In-Reply-To: <3f44f9a7-2f4c-d92d-ec19-5023f317357a@suse.com>

For whatever reason in c9f5b96bdab0 ("x86: correct handling of LAR and
LSL") I didn't realize that we can easily use Sv instead of going
through mod_table[]. Redo this aspect of that change.

--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -867,8 +867,6 @@ enum
   MOD_0F01_REG_3,
   MOD_0F01_REG_5,
   MOD_0F01_REG_7,
-  MOD_0F02,
-  MOD_0F03,
   MOD_0F12_PREFIX_0,
   MOD_0F16_PREFIX_0,
   MOD_0F18_REG_0,
@@ -2018,8 +2016,8 @@ static const struct dis386 dis386_twobyt
   /* 00 */
   { REG_TABLE (REG_0F00 ) },
   { REG_TABLE (REG_0F01 ) },
-  { MOD_TABLE (MOD_0F02) },
-  { MOD_TABLE (MOD_0F03) },
+  { "larS",		{ Gv, Sv }, 0 },
+  { "lslS",		{ Gv, Sv }, 0 },
   { Bad_Opcode },
   { "syscall",		{ XX }, 0 },
   { "clts",		{ XX }, 0 },
@@ -7895,16 +7893,6 @@ static const struct dis386 mod_table[][2
     { RM_TABLE (RM_0F01_REG_7_MOD_3) },
   },
   {
-    /* MOD_0F02 */
-    { "larS",		{ Gv, Mw }, 0 },
-    { "larS",		{ Gv, Ev }, 0 },
-  },
-  {
-    /* MOD_0F03 */
-    { "lslS",		{ Gv, Mw }, 0 },
-    { "lslS",		{ Gv, Ev }, 0 },
-  },
-  {
     /* MOD_0F12_PREFIX_0 */
     { "%XEVmovlpYX",	{ XM, Vex, EXq }, 0 },
     { "%XEVmovhlpY%XS",	{ XM, Vex, EXq }, 0 },


  reply	other threads:[~2023-07-14 10:02 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-14 10:01 [PATCH 0/2] x86: adjust disassembling of selector-access insns Jan Beulich
2023-07-14 10:02 ` Jan Beulich [this message]
2023-07-14 10:02 ` [PATCH 2/2] x86: adjust disassembly of insns operating on selector values Jan Beulich
2023-07-17  2:04   ` Jiang, Haochen
2023-07-17  7:08     ` Jan Beulich
2023-07-21  1:20       ` H.J. Lu

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