RE: [PATCH v2 2/4] x86/APX: extend SSE2AVX coverage

["Cui, Lili" <lili.cui@intel.com>]

> Legacy encoded SIMD insns are converted to AVX ones in that mode. When
> eGPR-s are in use, i.e. with APX, convert to AVX10 insns (where
> available; there are quite a few which can't be converted).
> 
> Note that LDDQU is represented as VMOVDQU32 (and the prior use of the
> sse3 template there needs dropping, to get the order right).
> 
> Note further that in a few cases, due to the use of templates, AVX512VL
> is used when AVX512F would suffice. Since AVX10 is the main reference,
> this shouldn't be too much of a problem.
> ---
> To preempt the question: If we weren't to do this (i.e. leave legacy-
> encoded SIMD insns using eGPR-s alone), I'd raise the counter question
> of why these insns are supported by APX then in the first place.
> 
> By using a mask register (which supposedly shouldn't be used by legacy
> SIMD code) we could likely convert further insns (by emitting a pair of
> replacement ones).

Do you mean you want to allow adding "Masking" to legacy SIMD code? Like you did with Disp8MemShift?

> ---
> v2: Correct MOVSD. Also deal with RCP{P,S}S and RSQRT{P,S}S. Re-work
>     <gfni>. Re-base.

These changes are ok for me.

Lili.